- 02 2月, 2013 1 次提交
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由 Marc Zyngier 提交于
Add support for the smallest, dumbest possible platform, to be used as a guest for KVM or other hypervisors. It only mandates a GIC and architected timers. Fits nicely with a multiplatform zImage. Uses very little silicon area. Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> [will: fixed up conflicts with GIC move to drivers/irqchip/] Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 01 2月, 2013 2 次提交
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由 Mark Rutland 提交于
Implement timer_broadcast for the arm architecture, allowing for the use of clock_event_device_drivers decoupled from the timer tick broadcast mechanism. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Mark Rutland 提交于
Currently, the ARM backend must maintain a redundant list of timers for the purpose of centralising timer broadcast functionality. This prevents sharing timer drivers across architectures. This patch moves the pain of dealing with timer broadcasts to the core clockevents tick broadcast code, which already maintains its own list of timers. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
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- 31 1月, 2013 10 次提交
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由 Mark Rutland 提交于
The core functionality of the arch_timer driver is not directly tied to anything under arch/arm, and can be split out. This patch factors out the core of the arch_timer driver, so it can be shared with other architectures. A couple of functions are added so that architecture-specific code can interact with the driver without needing to touch its internals. The ARM_ARCH_TIMER config variable is moved out to drivers/clocksource/Kconfig, existing uses in arch/arm are replaced with HAVE_ARM_ARCH_TIMER, which selects it. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Mark Rutland 提交于
Several bits in CNTKCTL reset to 0, including PL0VTEN. For architectures using the generic timer which wish to have a fast gettimeofday vDSO implementation, these bits must be set to 1 by the kernel. For architectures without a vDSO, it's best to leave the bits set to 0 for now to ensure that if and when support is added, it's implemented sanely architecture wide. As the bootloader might set PL0VTEN to a value that doesn't correspond to that which the kernel prefers, we must explicitly set it to the architecture port's preferred value. This patch adds arch_counter_set_user_access, which sets the PL0 access permissions to that required by the architecture. For arch/arm, this currently means disabling all userspace access. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Mark Rutland 提交于
Currently, the arch_timer driver is tied to the arm port, as it relies on code in arch/arm/smp.c to setup and teardown timers as cores are hotplugged on and off. The timer is registered through an arm-specific registration mechanism, preventing sharing the driver with the arm64 port. This patch moves the driver to using a cpu notifier instead, making it easier to port. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Mark Rutland 提交于
Without the isbs in arch_timer_get_cnt{p,v}ct the cpu may speculate reads and return stale values. This could be bad for code sensitive to changes in expected deltas between calls (e.g. the delay loop). Without isbs in arch_timer_reg_write the processor may reorder instructions around enabling/disabling of the timer or writing the compare value, which we probably don't want. This patch adds isbs to prevent those issues. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Mark Rutland 提交于
Currently the arch_timer register accessors are thrown together with the main driver, preventing us from porting the driver to other architectures. This patch moves the register accessors into a header file, as with the arm64 version. Constants required by the accessors are also moved. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Mark Rutland 提交于
The CNTFRQ register is not duplicated for physical and virtual timers, and accessing it as if it were is confusing. Instead, use a separate accessor which doesn't take the access type as a parameter. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Mark Rutland 提交于
We're currently inconsistent with respect to our accesses to the physical and virtual counters, mixing and matching the two. This patch introduces and uses a function pointer for accessing the correct counter based on whether we're using physical or virtual interrupts. All current accesses to the counter accessors are redirected through it. When the driver is moved out to drivers/clocksource, there's the possibility that code called before the timer code is initialised will attempt to call arch_timer_read_counter (e.g. sched_clock for AArch64). To avoid having to have to check whether the timer has been initialised either in arch_timer_read_counter or one of it's callers, a default implementation is assigned that simply returns 0. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
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由 Mark Rutland 提交于
To ensure the correct size of types, use u64 for the return value of arch_timer_get_cnt{p,v}ct, and u32 for arch_timer_rate, matching the size of the registers these values are taken from. While we're changing them anyway, simplify the implementation of arch_timer_get_cnt{p,v}ct. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Mark Rutland 提交于
This check is a holdover from the pre-devicetree days. As the timer is not probed except by platforms which register it via devicetree, it's not strictly necessary. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Mark Rutland 提交于
When we get the device_node for the arch timer, it's refcount is automatically incremented in of_find_matching_node, but it is never decremented. This patch decrements the refcount on the node after we're finished using it. Reported-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 24 1月, 2013 2 次提交
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由 Pawel Moll 提交于
As the kernel is able to cope with multiple clusters, uncomment the A7 cores in the Device Tree for V2P-CA15_A7 tile, making all 5 cores available to the user. Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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由 Lorenzo Pieralisi 提交于
In ARM multi-cluster systems the MPIDR affinity level 0 cannot be used as a single cpu identifier, affinity levels 1 and 2 must be taken into account as well. This patch extends the MPIDR usage to affinity levels 1 and 2 in versatile secondary cores start up code in order to compare the passed pen_release value with the full-blown affinity mask. Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NLiviu Dudau <liviu.dudau@arm.com> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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- 23 1月, 2013 9 次提交
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由 Douglas Gilbert 提交于
Concerning pinctrl_macb0_rmii_mii, values were okay, but not comments. Signed-off-by: NDouglas Gilbert <dgilbert@interlog.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Reported-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
No need for this cmdline option as we are using DT. Moreover this defconfig is targeted to multiple SoC/boards: this option was nonsense. Reported-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris BREZILLON 提交于
This patch overrides default macb pinctrl config defined in at91sam9260.dtsi (pinctrl_macb_rmii) with kizbox board config (pinctrl_macb_rmii + pinctrl_macb_rmii_mii_alt). Signed-off-by: NBoris BREZILLON <linux-arm@overkiz.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Make BGA as the default version as we are supposed to just have to specify when we use the PQFP version. Issue was existing since commit: 3e90772f (ARM: at91: fix at91rm9200 soc subtype handling). Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org> [v3.3] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Joachim Eastwood 提交于
Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Richard Genoud 提交于
The SCK pins where missing in usarts pinctrl. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Richard Genoud 提交于
The PIN_BANK 3 is for PDxx pins, not PCxx pins. And PIN_BANK 1 is for PBxx, not PIN_BANK 0. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Sebastian Hesselbarth 提交于
The gpio controller on kirkwood can provide interrupts but is missing the #interrupt-cells property. This patch just adds it to both gpio controllers. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 22 1月, 2013 4 次提交
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由 Luciano Coelho 提交于
Add the UART2 muxing data to the board file (this used to be, erroneously, done in the bootloader). Cc: stable <stable@vger.kernel.org> [3.7] Signed-off-by: NLuciano Coelho <coelho@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Pantelis Antoniou 提交于
The iterator correctly handles of_node_put() calls. Remove it before continue'ing the loop. Without this patch you get the following with CONFIG_OF_DYNAMIC set: ERROR: Bad of_node_put() on /ocp/timer@44e31000! [<c001329c>] (unwind_backtrace+0x0/0xe0) from [<c03dd8f0>] (of_node_release+0x2c/0xa0)! [<c03dd8f0>] (of_node_release+0x2c/0xa0) from [<c03ddea0>] (of_find_matching_node_and_match+0x78/0x90)! [<c03ddea0>] (of_find_matching_node_and_match+0x78/0x90) from [<c06d349c>] (omap_get_timer_dt+0x78/0x90)! [<c06d349c>] (omap_get_timer_dt+0x78/0x90) from [<c06d3664>] (omap_dm_timer_init_one.clone.2+0x34/0x2bc)! [<c06d3664>] (omap_dm_timer_init_one.clone.2+0x34/0x2bc) from [<c06d3a2c>] (omap2_gptimer_clocksource_init.clone.4+0x24/0xa8)! [<c06d3a2c>] (omap2_gptimer_clocksource_init.clone.4+0x24/0xa8) from [<c06cca58>] (time_init+0x20/0x30)! [<c06cca58>] (time_init+0x20/0x30) from [<c06c9690>] (start_kernel+0x1a8/0x2fc)! Signed-off-by: NPantelis Antoniou <panto@antoniou-consulting.com> Acked-by: NJon Hunter <jon-hunter@ti.com> [tony@atomide.com: updated description per Jon] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Otherwise we will get: WARNING: vmlinux.o(.text+0x1d4f0): Section mismatch in reference from the function omap_init_ocp2scp() to the function .init.text:omap_device_build() The function omap_init_ocp2scp() references the function __init omap_device_build(). This is often because omap_init_ocp2scp lacks a __init annotation or the annotation of omap_device_build is wrong. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Rob Clark 提交于
Fixes compile break with 3.8-rc4. Signed-off-by: NRob Clark <robdclark@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 19 1月, 2013 5 次提交
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由 Santosh Shilimkar 提交于
Commit 8fb54284 {ARM: mm: Add strongly ordered descriptor support} added XN flag at section level but missed it at PTE level. Fix it by adding the L_PTE_XN to MT_MEMORY_SO PTE descriptor. Reported-by: NRichard Woodruff <r-woodruff2@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Subhash Jadavani reported this partial backtrace: Now consider this call stack from MMC block driver (this is on the ARMv7 based board): [<c001b50c>] (v7_dma_inv_range+0x30/0x48) from [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c) [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c) from [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c) [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c) from [<c0017ff8>] (dma_map_sg+0x3c/0x114) This is caused by incrementing the struct page pointer, and running off the end of the sparsemem page array. Fix this by incrementing by pfn instead, and convert the pfn to a struct page. Cc: <stable@vger.kernel.org> Suggested-by: NJames Bottomley <JBottomley@Parallels.com> Tested-by: NSubhash Jadavani <subhashj@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Jon Hunter 提交于
During the migration to the common clock framework, calls to the functions omap2xxx_clkt_vps_late_init() were not preserved for OMAP2420 and OMAP2430. This causes the variables "sys_ck_rate" and "curr_prcm_set" to be uninitialised on boot. On reboot, this causes the following error message to be displayed because the appropriate MPU clock frequency (derived from sys_ck_rate) cannot be found. "Could not set MPU rate to 4294MHz" Fix this by adding back calls to omap2xxx_clkt_vps_late_init() in the OMAP2420 and OMAP2430 clock initialisation code. Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: dropped the duplicated call to omap2xxx_clkt_vps_check_bootloader_rates() after consultation with Jon; updated patch description] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Peter Ujfalusi 提交于
McPDM need to be configured to NO_IDLE mode when it is in used otherwise vital clocks will be gated which results 'slow motion' audio playback. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> [paul@pwsan.com: copy patch description into hwmod data comments] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Peter Ujfalusi 提交于
To avoid issues with audio caused by non locked ABE DPLL we should make sure it is locked in all OMAP4 revisions. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: cleaned up patch description] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 18 1月, 2013 2 次提交
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由 Peter Chen 提交于
As we use platform_device_id for fsl-usb2-udc driver, it needs to change clk connection-id, or the related devm_clk_get will be failed. Signed-off-by: NPeter Chen <peter.chen@freescale.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Peter Chen 提交于
As mach/hardware.h is deleted, we need to use platform_device_id to differentiate SoCs. Besides, one cpu_is_mx35 is useless as it has already used pdata to differentiate runtime Meanwhile we update the platform code accordingly. Signed-off-by: NPeter Chen <peter.chen@freescale.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 17 1月, 2013 5 次提交
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由 Dimitris Papastamos 提交于
We are using S3C_EINT(4) instead of S3C_EINT(5). Signed-off-by: NDimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Alim Akhtar 提交于
As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com> Tested-by: NDoug Anderson <dianders@chromium.org> Acked-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
If there is no board selecting CONFIG_S3C_DEV_FB enabled, build will fail on arch/arm/mach-s3c64xx/pm.c, where s3c_device_fb is referenced. This patch adds ifdef guard around the code making it compile only when CONFIG_S3C_DEV_FB is enabled. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Uwe Kleine-König 提交于
debug_ll_addr is only used on machines with an MMU so it can be #ifdef'ed out safely. This fixes: arch/arm/kernel/debug.S: Assembler messages: arch/arm/kernel/debug.S:104: Error: too many positional arguments The problem was introduced in e5c5f2ad ARM: implement debug_ll_io_init(). Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: NStephen Warren <swarren@nvidia.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Maxime Ripard 提交于
The UART controller used in the A10/A13 is the Synopsys DesignWare 8250. The wrong use of a regular 8250 driver may lead to a oops during kernel boot with "irq 17: nobody cared", because the apb UART as an extra interrupt that gets raised when writing to the LCR when busy. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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