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  1. 09 8月, 2011 2 次提交
    • S
      ASoC: Tegra: wm8903 machine driver: Allow re-insertion of module · 29591ed4
      由 Stephen Warren 提交于 
      Two issues were preventing module snd-soc-tegra-wm8903.ko from being
removed and re-inserted:

a) The speaker-enable GPIO is hosted by the WM8903 chip. This GPIO must
   be freed before snd_soc_unregister_card() is called, because that
   triggers wm8903.c:wm8903_remove(), which calls gpiochip_remove(), which
   then fails if any of the GPIOs are in use. To solve this, free all GPIOs
   first, so the code doesn't care where they come from.

b) We need to call snd_soc_jack_free_gpios() to match the call to
   snd_soc_jack_add_gpios() during initialization. Without this, the
   call to snd_soc_jack_add_gpios() fails during any subsequent modprobe
   and initialization, since the GPIO and IRQ are already registered. In
   turn, this causes the headphone state not to be monitored, so the
   headphone is assumed not to be plugged in, and the audio path to it is
   never enabled.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Cc: stable@kernel.org
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      29591ed4
    • S
      ASoC: Tegra: tegra_pcm_deallocate_dma_buffer: Don't OOPS · a96edd59
      由 Stephen Warren 提交于 
      Not all PCM devices have all sub-streams. Specifically, the SPDIF driver
only supports playback and hence has no capture substream. Check whether
a substream exists before dereferencing it, when de-allocating DMA
buffers in tegra_pcm_deallocate_dma_buffer.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NLiam Girdwood <lrg@ti.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
      a96edd59
  3. 08 8月, 2011 2 次提交
  5. 03 8月, 2011 1 次提交
    • W
      ASoC: sgtl5000: fix cache handling · 151798f8
      由 Wolfram Sang 提交于 
      Cache handling in this driver is broken. The chip has 16-bit registers, yet the
register numbers also increase by 2 per register, i.e.  there are only
even-numbered registers. The cache in this driver, though, simply increments
register numbers, so it does need some mapping as seen in
sgtl5000_restore_regs(), note the '>> 1':

	snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL,
                        cache[SGTL5000_CHIP_LINREG_CTRL >> 1]);

That, of course, won't work with snd_soc_update_bits(). (Thus, we won't even
notice the missing register 0x1c in the default regs which shifted all follwing
registers to wrong values.) Noticed on the MX28EVK where enabling the regulators
simply locked up the chip.

Refactor the routines and use a properly sized default_regs array which matches
the register layout of the underlying chip, i.e. create a truly flat cache.
This also saves some code which should make up for the bigger array a little.
When soc-core will somewhen have another cache type which handles a step size,
this conversion will also ease the transition.
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Tested-by: NDong Aisheng <b29396@freescale.com>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NLiam Girdwood <lrg@ti.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
      151798f8
  7. 02 8月, 2011 1 次提交
  9. 01 8月, 2011 1 次提交
  11. 30 7月, 2011 1 次提交
  13. 29 7月, 2011 5 次提交
  15. 28 7月, 2011 6 次提交
  17. 27 7月, 2011 7 次提交
  19. 26 7月, 2011 6 次提交
  21. 25 7月, 2011 1 次提交
  23. 24 7月, 2011 4 次提交
  25. 22 7月, 2011 3 次提交