Sometimes clk drivers are attached to devices which are children of a
parent device that is connected to a node in DT. This happens when
devices are MFD-ish and the parent device driver mostly registers child
devices to match against drivers placed in their respective subsystem
directories like drivers/clk, drivers/regulator, etc. When the clk
driver calls clk_register() with a device pointer, that struct device
pointer won't have a device_node associated with it because it was
created purely in software as a way to partition logic to a subsystem.

This causes problems for the way we find parent clks for the clks
registered by these child devices because we look at the registering
device's device_node pointer to lookup 'clocks' and 'clock-names'
properties. Let's use the parent device's device_node pointer if the
registering device doesn't have a device_node but the parent does. This
simplifies clk registration code by avoiding the need to assign some
device_node to the device registering the clk.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Reported-by: NNiklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20191230190455.141339-1-sboyd@kernel.org
[sboyd@kernel.org: Fixup kernel-doc notation]
Reviewed-by: NNiklas Cassel <nks@flawful.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/clk/clk-bm1880.c: In function 'bm1880_pll_rate_calc':
drivers/clk/clk-bm1880.c:477:13: warning:
 variable 'fref' set but not used [-Wunused-but-set-variable]

It is never used, so remove it.
Reported-by: NHulk Robot <hulkci@huawei.com>
Signed-off-by: NYueHaibing <yuehaibing@huawei.com>
Link: https://lkml.kernel.org/r/20191129033534.188257-1-yuehaibing@huawei.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>

Add a terminate callback to the clk_ops to release the resources
claimed in .init()
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190924123954.31561-4-jbrunet@baylibre.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>

If the init callback is allowed to request resources, it needs a return
value to report the outcome of such a request.
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190924123954.31561-3-jbrunet@baylibre.comReviewed-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

 __clk_init_parent() will call the .get_parent() callback of the clock
 so .init() must run before.

Fixes: 541debae ("clk: call the clock init() callback before any other ops callback")
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190924123954.31561-2-jbrunet@baylibre.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>

RCLK is a fixed 50MHz clock derived from HPLL that is described by a
single gate for each MAC.
Signed-off-by: NAndrew Jeffery <andrew@aj.id.au>
Link: https://lkml.kernel.org/r/20191010020655.3776-3-andrew@aj.id.auReviewed-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Add common clock driver for Bitmain BM1880 SoC. The clock controller on
BM1880 has supplies clocks to all peripherals in the form of gate clocks
and composite clocks (fixed factor + gate).
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lkml.kernel.org/r/20191115162901.17456-7-manivannan.sadhasivam@linaro.orgSigned-off-by: NStephen Boyd <sboyd@kernel.org>

This function has been delcared but not defined anywhere. Hence, this
commit adds definition for it.

Fixes: 49cb392d ("clk: composite: Add hw based registration APIs")
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lkml.kernel.org/r/20191115162901.17456-3-manivannan.sadhasivam@linaro.orgSigned-off-by: NStephen Boyd <sboyd@kernel.org>

The clk_init_data struct needs to be initialized to zero for the new
parent_map implementation to work correctly. Otherwise, the member which
is available first will get processed.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lkml.kernel.org/r/20191115162901.17456-2-manivannan.sadhasivam@linaro.orgSigned-off-by: NStephen Boyd <sboyd@kernel.org>

We don't need the MIPS architecture or even a MIPS compiler to compile
test these drivers. Let's add a COMPILE_TEST possibility on the
menuconfig here so that we can build these drivers on more
configurations.

Cc: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20191114001925.159276-1-sboyd@kernel.orgReviewed-by: NPaul Cercueil <paul@crapouillou.net>

clk_disable_unused is only called once, as a late_initcall, so reclaim
a bit of memory by marking it (and the functions and data it is the
sole user of) as __init/__initdata. This moves ~1900 bytes from .text
to .init.text for a imx_v6_v7_defconfig.
Signed-off-by: NRasmus Villemoes <linux@rasmusvillemoes.dk>
Link: https://lkml.kernel.org/r/20191004094826.8320-1-linux@rasmusvillemoes.dkReviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Memory allocated in alloc_clk() for 'struct clk' and
'const char *con_id' while invoking clk_register() is never freed
in clk_unregister(), resulting in kmemleak showing the following
backtrace.

  backtrace:
    [<00000000546f5dd0>] kmem_cache_alloc+0x18c/0x270
    [<0000000073a32862>] alloc_clk+0x30/0x70
    [<0000000082942480>] __clk_register+0xc8/0x760
    [<000000005c859fca>] devm_clk_register+0x54/0xb0
    [<00000000868834a8>] 0xffff800008c60950
    [<00000000d5a80534>] platform_drv_probe+0x50/0xa0
    [<000000001b3889fc>] really_probe+0x108/0x348
    [<00000000953fa60a>] driver_probe_device+0x58/0x100
    [<0000000008acc17c>] device_driver_attach+0x6c/0x90
    [<0000000022813df3>] __driver_attach+0x84/0xc8
    [<00000000448d5443>] bus_for_each_dev+0x74/0xc8
    [<00000000294aa93f>] driver_attach+0x20/0x28
    [<00000000e5e52626>] bus_add_driver+0x148/0x1f0
    [<000000001de21efc>] driver_register+0x60/0x110
    [<00000000af07c068>] __platform_driver_register+0x40/0x48
    [<0000000060fa80ee>] 0xffff800008c66020

Fix it here.

Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Link: https://lkml.kernel.org/r/20191022071153.21118-1-kishon@ti.com
Fixes: 1df4046a ("clk: Combine __clk_get() and __clk_create_clk()")
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Add support for the clocks provided by the CGU in the Ingenic X1000
SoC, making use of the cgu code to do the heavy lifting.
Signed-off-by: NZhou Yanjie <zhouyanjie@zoho.com>
Link: https://lkml.kernel.org/r/1573378102-72380-3-git-send-email-zhouyanjie@zoho.comReviewed-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

match_string() returns the array index of a matching string.
Use it instead of the open-coded implementation.
Signed-off-by: NYueHaibing <yuehaibing@huawei.com>
Link: https://lkml.kernel.org/r/20191109034226.21044-1-yuehaibing@huawei.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>

The pxa27x platforms have a single IP with 2 drivers, sa1100-rtc and
rtc-pxa drivers.

A previous patch fixed the sa1100-rtc case, but the pxa-rtc wasn't
fixed. This patch completes the previous one.

Fixes: 8b6d1034 ("clk: pxa: add missing pxa27x clocks for Irda and sa1100-rtc")
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Link: https://lkml.kernel.org/r/20191026194420.11918-1-robert.jarzmik@free.frSigned-off-by: NStephen Boyd <sboyd@kernel.org>

The syscon_regmap_lookup_by_phandle() will never return NULL, thus use
IS_ERR() to validate the return value instead of IS_ERR_OR_NULL().

Fixes: d41f59fd ("clk: sprd: Add common infrastructure")
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Link: https://lkml.kernel.org/r/1995139bee5248ff3e9d46dc715968f212cfc4cc.1570520268.git.baolin.wang@linaro.orgSigned-off-by: NStephen Boyd <sboyd@kernel.org>

drivers/clk/mvebu/armada-xp.c:171:38: warning:
 mv98dx3236_coreclks defined but not used [-Wunused-const-variable=]
drivers/clk/mvebu/armada-xp.c:213:41: warning:
 mv98dx3236_gating_desc defined but not used [-Wunused-const-variable=]

They are not used since commit 33707260 ("clk: mvebu:
Expand mv98dx3236-core-clock support").
Reported-by: NHulk Robot <hulkci@huawei.com>
Signed-off-by: NYueHaibing <yuehaibing@huawei.com>
Link: https://lkml.kernel.org/r/20191111140420.36092-1-yuehaibing@huawei.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>

If CONFIG_PM_SLEEP is n, build fails:

drivers/clk/tegra/clk-tegra210.c:3426:13: error:
 tegra210_clk_suspend undeclared here (not in a function); did you mean tegra_clk_ndspeed?
  .suspend = tegra210_clk_suspend,
             ^~~~~~~~~~~~~~~~~~~~
             tegra_clk_ndspeed
drivers/clk/tegra/clk-tegra210.c:3427:12: error:
 tegra210_clk_resume undeclared here (not in a function); did you mean tegra210_clk_suspend?
  .resume = tegra210_clk_resume,

Use ifdef to guard this.
Reported-by: NHulk Robot <hulkci@huawei.com>
Fixes: 27d10d548c04 ("clk: tegra: Add suspend and resume support on Tegra210")
Signed-off-by: NYueHaibing <yuehaibing@huawei.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

There is no need to re-configure PLLX if its configuration in unchanged
on return from suspend / cpuidle, this saves 300us if PLLX is already
enabled (common case for cpuidle).
Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
Acked-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

All the CAR controller settings are lost on suspend when core power goes
off. This implement saving and restoring context for all PLLs and clocks
during system suspend and resume to have the clocks back to same state
for normal operation.

Clock driver suspend and resume are registered as syscore_ops as clocks
restore need to happen before the other drivers resume to have all their
clocks back to the same state as before suspend.
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Move CLK_OUT_ENB and RST_DEVICES registers to clk.h to share these with
Tegra clock driver.
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch uses fence_udelay rather than udelay during PLLU
initialization to ensure writes to clock registers happens before
waiting for specified delay.
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch implements DFLL suspend and resume operation.

During system suspend entry, CPU clock will switch CPU to safe
clock source of PLLP and disables DFLL clock output.

DFLL driver suspend confirms DFLL disable state and errors out on
being active.

DFLL is re-initialized during the DFLL driver resume as it goes
through complete reset during suspend entry.
Acked-by: NThierry Reding <treding@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch implements restore_context for clk_super_mux and clk_super.

During system supend, core power goes off the and context of Tegra
CAR registers is lost.

So on system resume, context of super clock registers are restored
to have them in same state as before suspend.
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch has a fix to enable PLLP branches to CPU before changing
the CPU cluster clock source to PLLP for Gen5 Super clock and
disables PLLP branches to CPU when not in use.

During system suspend entry and exit, CPU source will be switched
to PLLP and this needs PLLP branches to be enabled to CPU prior to
the switch.

On system resume, warmboot code enables PLLP branches to CPU and
powers up the CPU with PLLP clock source.
Acked-by: NThierry Reding <treding@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch implements restore_context support for clk-periph and
clk-sdmmc-mux clock operations to restore clock parent and rates
on system resume.

During system suspend, core power goes off and looses the context
of the Tegra clock controller registers.

So on system resume, clocks parent and rate are restored back to
the context before suspend based on cached data.
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch adds support for saving OSC clock frequency and the
drive-strength during OSC clock init and creates an API to restore
OSC control register value from the saved context.

This API is invoked by Tegra210 clock driver during system resume
to restore the  OSC clock settings.
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch implements save and restore of PLL context.

During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.

So during resume, pll context is restored based on cached rate
and state.
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch implements save and restore of pllout context.

During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.

So during suspend entry the state of pllout is saved and on resume
it is restored back to have pllout in same state as before suspend.

pllout rate is saved and restore in clock divider so it will be at
same rate as before suspend when pllout state is restored.
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch implements context restore for clock divider.

During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.

So on resume, clock dividers are restored back for normal operation.
Acked-by: NThierry Reding <treding@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

In order to allow the display driver to deal uniformly with all SOR
generations, implement the SOR clocks in a way that is compatible with
Tegra186 and later.
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>

In order to allow the display driver to deal uniformly with all SOR
generations, implement the SOR clocks in a way that is compatible with
Tegra186 and later.
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This makes Tegra124 and Tegra210 consistent with subsequent Tegra
generations.
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The SOR0 clock on Tegra210 is very different from the SOR0 clock found
on Tegra124. Move the Tegra124 implementation to the Tegra124 driver so
that a custom implementation can be provided on Tegra210 without
clashing with the existing clock.
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Later SoC generations implement this clock as SOR1_OUT. For consistency,
the Tegra210 implementation was adapted to match the same name in commit
4d1dc401 ("dt-bindings: clock: tegra: Add sor1_out clock").

Clean up the remaining pieces by adopting the new name for the internal
identifiers and remove the old alias. Note that since both SOR1_SRC and
SOR1_OUT were referring to the same device tree clock ID, this does not
break device tree ABI.
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>

A proper External Memory Controller clock rounding and parent selection
functionality is required by the EMC drivers, it is not available using
the generic clock implementation because only the Memory Controller driver
is aware of what clock rates are actually available for a particular
device. EMC drivers will have to register a Tegra-specific CLK-API
callback which will perform rounding of a requested rate. EMC clock users
won't be able to request EMC clock by getting -EPROBE_DEFER until EMC
driver is probed and the callback is set up.

The functionality is somewhat similar to the clk-emc.c which serves
Tegra124+ SoCs. The later HW generations support more parent clock sources
and the HW configuration / integration with the EMC drivers differs a tad
from the older gens, hence it's not really worth to try to squash
everything into a single source file.
Acked-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This patch adds a new clk_hw_get_parent_index() function that can be
used to retrieve the index of a given clock's parent. This can be useful
for restoring a clock on system resume.
Reviewed-by: NThierry Reding <treding@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

For an external clock source, which is gated via a GPIO, the
rate change should typically be propagated to the parent clock.

The situation where we are requiring this propagation, is when an
external clock is connected to override an internal clock (which typically
has a fixed rate). The external clock can have a different rate than the
internal one, and may also be variable, thus requiring the rate
propagation.

This rate change wasn't propagated until now, and it's unclear about cases
where this shouldn't be propagated. Thus, it's unclear whether this is
fixing a bug, or extending the current driver behavior. Also, it's unsure
about whether this may break any existing setups; in the case that it does,
a device-tree property may be added to disable this flag.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NAlexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lkml.kernel.org/r/20191108071718.17985-1-alexandru.ardelean@analog.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>

The SM8150 list of clks is almost the same as the list for SDM845,
except there isn't an IPA clk. Just point to the SDM845 clks from the
SM8150 list for now so we can reduce the amount of struct bloat in this
driver.
Suggested-by: NVinod Koul <vkoul@kernel.org>
Cc: Taniya Das <tdas@codeaurora.org>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20191107214018.184105-1-sboyd@kernel.orgReviewed-by: NVinod Koul <vkoul@kernel.org>

The buffer allocated in ti_adpll_clk_get_name doesn't account for the
terminating null. This patch switches to devm_kasprintf to avoid
overflowing.
Signed-off-by: NStephen Kitt <steve@sk2.org>
Link: https://lkml.kernel.org/r/20191019140634.15596-1-steve@sk2.orgAcked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>