- 26 10月, 2019 9 次提交
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由 Navid Emamdoost 提交于
In i40e_setup_macvlans if i40e_setup_channel fails the allocated memory for ch should be released. Signed-off-by: NNavid Emamdoost <navid.emamdoost@gmail.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Aleksandr Loktionov 提交于
This patch prepares ground for the next VF MAC address change fix. It lets untrusted VF to delete any VF mac filter, but it still doesn't let untrusted VF to add mac filter not setup by PF. It removes information duplication in num_mac mac filters counter. And improves exact h/w mac filters usage checking in the i40e_check_vf_permission() function by counting mac2add_cnt. It also improves logging because now all mac addresses will be validated first and corresponding messages will be logged. Signed-off-by: NAleksandr Loktionov <aleksandr.loktionov@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
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由 Damian Milosek 提交于
Add X710T*L device specific operations (in port LED detection and handling of GLGEN_GPIO_CTL.PIN_FUNC field) to enable LED blinking. Signed-off-by: NDamian Milosek <damian.milosek@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Piotr Kwapulinski 提交于
Let ethtool print driver and firmware versions when NIC is in recovery mode. Assign i40e_get_drvinfo() operation to ethtool recovery mode operations. Previously ethtool did not report driver and firmware versions when NIC was in recovery mode. Signed-off-by: NPiotr Kwapulinski <piotr.kwapulinski@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Nicholas Nunley 提交于
Since commit 92418fb1 ("i40e/i40evf: Use usec value instead of reg value for ITR defines") the driver tracks the interrupt throttling intervals in single usec units, although the actual ITRN/ITR0 registers are programmed in 2 usec units. Most register programming flows in the driver correctly handle the conversion, although it is currently not applied when the registers are initialized to their default values. Most of the time this doesn't present a problem since the default values are usually immediately overwritten through the standard adaptive throttling mechanism, or updated manually by the user, but if adaptive throttling is disabled and the interval values are left alone then the incorrect value will persist. Since the intended default interval of 50 usecs (vs. 100 usecs as programmed) performs better for most traffic workloads, this can lead to performance regressions. This patch adds the correct conversion when writing the initial values to the ITRN registers. Signed-off-by: NNicholas Nunley <nicholas.d.nunley@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Piotr Azarewicz 提交于
Currently FW use MDIO I/F number corresponded with current PF for PHY access. This code allow to specify used MDIO I/F number. Add new field - command flags with only one flag for now. Added flag tells FW that it shouldn't change page while accessing QSFP module, as it was set manually. Signed-off-by: NPiotr Azarewicz <piotr.azarewicz@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Piotr Azarewicz 提交于
Move code detecting HW flags based on device type and FW API version into a single function. Signed-off-by: NPiotr Azarewicz <piotr.azarewicz@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Jaroslaw Gawin 提交于
Fix display of parameters "Configured FEC encodings:" and "Advertised FEC modes:" in ethtool. Implemented by setting proper FEC bits in “advertising” bitmask of link_modes struct and “fec” bitmask in ethtool_fecparam struct. Without this patch wrong FEC settings can be shown. Signed-off-by: NJaroslaw Gawin <jaroslawx.gawin@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Sylwia Wnuczko 提交于
This patch fixes function to read NVM module data and uses it to read current LLDP agent configuration from NVM API version 1.8. Signed-off-by: NSylwia Wnuczko <sylwia.wnuczko@intel.com> Tested-by: NAndrew Bowers <andrewx.bowers@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 25 10月, 2019 21 次提交
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由 David S. Miller 提交于
Madalin Bucur says: ==================== DPAA Ethernet changes v3: add newline at the end of error messages v2: resending with From: field matching signed-off-by Here's a series of changes for the DPAA Ethernet, addressing minor or unapparent issues in the codebase, adding probe ordering based on a recently added DPAA QMan API, removing some redundant code. ==================== Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Madalin Bucur 提交于
Newline was missing at the end of the error message. Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Madalin Bucur 提交于
Remove unused struct member second_largest_buf_size. Also, an out of bounds access would have occurred in the removed code if there was only one buffer pool in use. Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Madalin Bucur 提交于
The DPAA Ethernet driver is using the FMan MAC as the device for DMA mapping. This is not actually correct, as the real DMA device is the FMan port (the FMan Rx port for reception and the FMan Tx port for transmission). Changing the device used for DMA mapping to the Fman Rx and Tx port devices. Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Laurentiu Tudor 提交于
Add an API that retrieves the 'struct device' that the specified FMan port probed against. The new API will be used in a subsequent patch that corrects the DMA devices used by the dpaa_eth driver. Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Madalin Bucur 提交于
Condition was previously checked, removing duplicate code. Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Laurentiu Tudor 提交于
If the DPAA 1 Ethernet driver gets probed before the QBMan driver it will cause a boot crash. Add predictability in the probing order by deferring the Ethernet driver probe after QBMan and portals by using the recently introduced QBMan APIs. Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Laurentiu Tudor 提交于
The liodn base registers are specific to PAMU based NXP systems and are reserved on SMMU based ones. Don't access them unless PAMU is compiled in. Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Igor Russkikh says: ==================== net: aquantia: PTP support for AQC devices This patchset introduces PTP feature support in Aquantia AQC atlantic driver. This implementation is a joined effort of aquantia developers: Egor is the main designer and driver/firmware architect on PTP, Sergey and Dmitry are included as co-developers. Dmitry also helped me in the overall patchset preparations. Feature was verified on AQC hardware with testptp tool, linuxptp, gptp and with Motu hardware unit. version3 updates: - Review comments applied: error handling, various fixes version2 updates: - Fixing issues from Andrew's review: replacing self with ptp var name, making ptp_clk_offset a field in the ptp instance. devm_kzalloc advice is actually non applicable, because ptp object gets created/destroyed on each network device close/open and it should not be linked with dev lifecycle. - Rearranging commit authorship, adding Egor as a ptp module main maintainer - Fixing kbuild 32bit division issues ==================== Acked-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
PTP implementation is designed and maintained by Egor Pomozov, adding him as this module maintainer. Egor is the author of the core functionality and the architect, and is to be contacted for all Aquantia PTP/AVB functionality. Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dmitry Bezrukov 提交于
Depending on FW configuration we can manage from 0 to 3 PINs for periodic output and from 0 to 1 ext ts PIN for getting TS for external event. Ext TS PIN functionality is implemented via periodic timestamps polling directly from PHY, because right now there is now way to receive the PIN trigger interrupt from phy. The polling interval is 15 milliseconds. Co-developed-by: NEgor Pomozov <epomozov@marvell.com> Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Co-developed-by: NPavel Belous <pavel.belous@aquantia.com> Signed-off-by: NPavel Belous <pavel.belous@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dmitry Bezrukov 提交于
GPIO PIN control and access is done by direct phy manipulation. Here we add an aq_phy module which is able to access phy registers via MDIO access mailbox. Access is controlled via HW semaphore. Co-developed-by: NNikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: NNikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Egor Pomozov 提交于
Ethtool callback with basic information on what PTP features are supported by the device. Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Co-developed-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Egor Pomozov 提交于
Here we add support for PTP specific IOCTLs of HW timestamp get/set. These will use filters to configure flows onto the required queue ids. Co-developed-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dmitry Bezrukov 提交于
We implement HW filter reservation for PTP traffic. Special location in filters table is marked as reserved, because incoming ptp traffic should be directed only to PTP designated queue. This way HW will do PTP timestamping and proper processing. Co-developed-by: NEgor Pomozov <epomozov@marvell.com> Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Co-developed-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Egor Pomozov 提交于
Here we do alloc/free IRQs for PTP rings. We also implement processing of PTP packets on TX and RX sides. Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Co-developed-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dmitry Bezrukov 提交于
Checkpatch and styling fixes on parts of code touched by ptp Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Egor Pomozov 提交于
Add implementations of PTP rings alloc/free. PTP desing on this device uses two separate rings on a separate traffic class for traffic rx/tx. Third ring (hwts) is not a traffic ring, but is used only to receive timestamps of the transmitted packets. Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Co-developed-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Egor Pomozov 提交于
Basic HW functions implemented for adjusting frequency, adjusting time, getting and setting time. With these callbacks we now do register ptp clock in the system. Firmware interface parts are defined for PTP requests and interactions. Enable/disable PTP counters in HW on clock register/unregister. Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Co-developed-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dmitry Bezrukov 提交于
Make some other bit-enums more clear about positioning, this helps on debugging and development Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Egor Pomozov 提交于
Here we add basic function for PTP clock register/unregister. We also declare FW/HW capability bits used to control PTP feature on device. PTP device is created if network card has appropriate FW that has PTP enabled in config. HW supports timestamping for PTPv2 802.AS1 and PTPv2 IPv4 UDP packets. It also supports basic PTP callbacks for getting/setting time, adjusting frequency and time as well. Signed-off-by: NEgor Pomozov <epomozov@marvell.com> Co-developed-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: NSergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NDmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: NIgor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 10月, 2019 9 次提交
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由 YueHaibing 提交于
Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/usb/lan78xx.c:3995:6: warning: variable event set but not used [-Wunused-but-set-variable] It is never used, so can be removed. Signed-off-by: NYueHaibing <yuehaibing@huawei.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Ido Schimmel says: ==================== mlxsw: Update main pool computation and pool size limits Petr says: In Spectrum ASICs, the shared buffer is an area of memory where packets are kept until they can be transmitted. There are two resources associated with shared buffer size: cap_total_buffer_size and cap_guaranteed_shared_buffer. So far, mlxsw has been using the former as a limit when validating shared buffer pool size configuration. However, the total size also includes headrooms and reserved space, which really cannot be used for shared buffer pools. Patch #1 mends this and has mlxsw use the guaranteed size. To configure default pool sizes, mlxsw has historically hard-coded one or two smallish pools, and one "main" pool that took most of the shared buffer (that would be pool 0 on ingress and pool 4 on egress). During the development of Spectrum-2, it became clear that the shared buffer size keeps shrinking as bugs are identified and worked around. In order to prevent having to tweak the size of pools 0 and 4 to catch up with updates to values reported by the FW, patch #2 changes the way these pools are set. Instead of hard-coding a fixed value, the main pool now takes whatever is left from the guaranteed size after the smaller pool(s) are taken into account. ==================== Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Petr Machata 提交于
Instead of hard-coding the size of the largest pool, calculate it from the reported guaranteed shared buffer size and sizes of other pools (currently only the CPU port pool). Signed-off-by: NPetr Machata <petrm@mellanox.com> Signed-off-by: NIdo Schimmel <idosch@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Petr Machata 提交于
There are two resources associated with shared buffer size: cap_total_buffer_size, and cap_guaranteed_shared_buffer. So far, mlxsw has been using the former as a limit to determine how large a pool size is allowed to be. However, the total size also includes headrooms and reserved space, which really cannot be used for shared buffer pools. Therefore convert mlxsw to use the latter resource as a limit. Adjust hard-coded pool sizes to be the guaranteed size minus 256000 bytes for CPU port pool. On Spectrum-1 that actually leads to an increase. A follow-up patch will have this size calculated automatically. Signed-off-by: NPetr Machata <petrm@mellanox.com> Signed-off-by: NIdo Schimmel <idosch@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Heiner Kallweit 提交于
Setting PCI_EXP_DEVCTL_NOSNOOP_EN for certain chip versions had been added to the vendor driver more than 10 years ago, and copied from there to r8169. It has been removed from the vendor driver meanwhile and I think we can safely remove this too. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Tao Ren says: ==================== net: phy: support 1000Base-X auto-negotiation for BCM54616S This patch series aims at supporting auto negotiation when BCM54616S is running in 1000Base-X mode: without the patch series, BCM54616S PHY driver would report incorrect link speed in 1000Base-X mode. Patch #1 (of 3) modifies assignment to OR when dealing with dev_flags in phy_attach_direct function, so that dev_flags updated in BCM54616S PHY's probe callback won't be lost. Patch #2 (of 3) adds several genphy_c37_* functions to support clause 37 1000Base-X auto-negotiation, and these functions are called in BCM54616S PHY driver. Patch #3 (of 3) detects BCM54616S PHY's operation mode and calls according genphy_c37_* functions to configure auto-negotiation and parse link attributes (speed, duplex, and etc.) in 1000Base-X mode. ==================== Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tao Ren 提交于
The BCM54616S PHY cannot work properly in RGMII->1000Base-X mode, mainly because genphy functions are designed for copper links, and 1000Base-X (clause 37) auto negotiation needs to be handled differently. This patch enables 1000Base-X support for BCM54616S by customizing 3 driver callbacks, and it's verified to be working on Facebook CMM BMC platform (RGMII->1000Base-KX): - probe: probe callback detects PHY's operation mode based on INTERF_SEL[1:0] pins and 1000X/100FX selection bit in SerDES 100-FX Control register. - config_aneg: calls genphy_c37_config_aneg when the PHY is running in 1000Base-X mode; otherwise, genphy_config_aneg will be called. - read_status: calls genphy_c37_read_status when the PHY is running in 1000Base-X mode; otherwise, genphy_read_status will be called. Note: BCM54616S PHY can also be configured in RGMII->100Base-FX mode, and 100Base-FX support is not available as of now. Signed-off-by: NTao Ren <taoren@fb.com> Acked-by: NVladimir Oltean <olteanv@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Heiner Kallweit 提交于
This patch adds support for clause 37 1000Base-X auto-negotiation. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NTao Ren <taoren@fb.com> Tested-by: NRené van Dorst <opensource@vdorst.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tao Ren 提交于
Modify the assignment to OR when dealing with phydev->dev_flags in phy_attach_direct function, and this is to make sure dev_flags set in driver's probe callback won't be lost. Suggested-by: NAndrew Lunn <andrew@lunn.ch> CC: Heiner Kallweit <hkallweit1@gmail.com> CC: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: NTao Ren <taoren@fb.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 10月, 2019 1 次提交
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由 Eric Dumazet 提交于
Since commit 342db221 ("sched: Call skb_get_hash_perturb in sch_fq_codel") we no longer need anything from this file. Signed-off-by: NEric Dumazet <edumazet@google.com> Signed-off-by: NJakub Kicinski <jakub.kicinski@netronome.com>
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