1. 27 10月, 2005 5 次提交
    • D
      [PATCH] powerpc: Merge parport.h · 2765ca25
      David Gibson 提交于
      Save for the header #define, ppc32 and ppc64 versions of parport.h are
      identical.  This patch merges them.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      2765ca25
    • D
      [PATCH] powerpc: Fix handling of fpscr on 64-bit · 25c8a78b
      David Gibson 提交于
      The recent merge of fpu.S broken the handling of fpscr for
      ARCH=powerpc and CONFIG_PPC64=y.  FP registers could be corrupted,
      leading to strange random application crashes.
      
      The confusion arises, because the thread_struct has (and requires) a
      64-bit area to save the fpscr, because we use load/store double
      instructions to get it in to/out of the FPU.  However, only the low
      32-bits are actually used, so we want to treat it as a 32-bit quantity
      when manipulating its bits to avoid extra load/stores on 32-bit.  This
      patch replaces the current definition with a structure of two 32-bit
      quantities (pad and val), to clarify things as much as is possible.
      The 'val' field is used when manipulating bits, the structure itself
      is used when obtaining the address for loading/unloading the value
      from the FPU.
      
      While we're at it, consolidate the 4 (!) almost identical versions of
      cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
      arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
      arch/powerpc/kernel/misc_64.S) into a single version in fpu.S.  The
      new version takes a pointer to thread_struct and applies the correct
      offset itself, rather than a pointer to the fpscr field itself, again
      to avoid confusion as to which is the correct field to use.
      
      Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
      code, which it previously did not.
      
      Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
      and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
      Booted on G5 (ARCH=powerpc) and things which previously fell over no
      longer do.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      25c8a78b
    • S
      [PATCH] powerpc: merge scatterlist.h · 89edce0b
      Stephen Rothwell 提交于
      This depends on the 64bit dma_addr_t patch.
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      89edce0b
    • S
      [PATCH] ppc64: make dma_addr_t 64 bits · 8168f902
      Stephen Rothwell 提交于
      There has been a need expressed for dma_addr_t to be 64 bits on PPC64.
      This patch does that.
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      8168f902
    • P
      powerpc: undeprecate the old OF device tree accessors for now · bf20a000
      Paul Mackerras 提交于
      The recent addition of __deprecated to the declarations for
      find_devices etc. produces a whole pile of warnings from the
      ppc32 code.  Since those functions still work perfectly well on
      ppc32, which doesn't have hotplug support for anything in the
      OF device tree, and we don't have time to fix that code now,
      remove the __deprecated markings for now.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      bf20a000
  2. 26 10月, 2005 10 次提交
  3. 24 10月, 2005 3 次提交
  4. 23 10月, 2005 1 次提交
    • P
      powerpc: Fix time code for 601 processors · 96c44507
      Paul Mackerras 提交于
      The 601 doesn't have the timebase register; instead it has an RTCL
      register that counts nanoseconds and wraps at 1000000000, and an
      RTCU register that counts seconds.  This makes the necessary changes
      for the merged time code to use the RTCL/U registers when the kernel
      is running on a 601.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      96c44507
  5. 22 10月, 2005 5 次提交
  6. 21 10月, 2005 4 次提交
  7. 20 10月, 2005 11 次提交
  8. 19 10月, 2005 1 次提交