1. 08 6月, 2023 1 次提交
  2. 07 6月, 2023 2 次提交
    • Z
      crypto: hisilicon/qm - save capability registers in qm init process · 3585bdaf
      Zhiqi Song 提交于
      driver inclusion
      category: bugfix
      bugzilla: https://gitee.com/openeuler/kernel/issues/I7BANJ
      CVE: NA
      
      ----------------------------------------------------------------------
      
      We find that in the reset scenario, if the reset failed and the MSE
      is disabled, the value of capability registers will became invalid.
      When we remove the device under this situation, the unregister process
      will read the related irq vector from the capability register directly
      with the mask. Then we will get an invalid value which is out of range
      and can not be used to get the right irq number by pci_irq_vector().
      This will cause the following call trace:
      
      	| Call trace:
      	|  pci_irq_vector+0xfc/0x140
      	|  hisi_qm_uninit+0x278/0x3b0 [hisi_qm]
      	|  hpre_remove+0x16c/0x1c0 [hisi_hpre]
      	|  pci_device_remove+0x6c/0x264
      	|  device_release_driver_internal+0x1ec/0x3e0
      	|  device_release_driver+0x3c/0x60
      	|  pci_stop_bus_device+0xfc/0x22c
      	|  pci_stop_and_remove_bus_device+0x38/0x70
      	|  pci_iov_remove_virtfn+0x108/0x1c0
      	|  sriov_disable+0x7c/0x1e4
      	|  pci_disable_sriov+0x4c/0x6c
      	|  hisi_qm_sriov_disable+0x90/0x160 [hisi_qm]
      	|  hpre_remove+0x1a8/0x1c0 [hisi_hpre]
      	|  pci_device_remove+0x6c/0x264
      	|  device_release_driver_internal+0x1ec/0x3e0
      	|  driver_detach+0x168/0x2d0
      	|  bus_remove_driver+0xc0/0x230
      	|  driver_unregister+0x58/0xdc
      	|  pci_unregister_driver+0x40/0x220
      	|  hpre_exit+0x34/0x64 [hisi_hpre]
      	|  __arm64_sys_delete_module+0x374/0x620
      	[...]
      
      	| Call trace:
      	|  free_msi_irqs+0x25c/0x300
      	|  pci_disable_msi+0x19c/0x264
      	|  pci_free_irq_vectors+0x4c/0x70
      	|  hisi_qm_pci_uninit+0x44/0x90 [hisi_qm]
      	|  hisi_qm_uninit+0x28c/0x3b0 [hisi_qm]
      	|  hpre_remove+0x16c/0x1c0 [hisi_hpre]
      	|  pci_device_remove+0x6c/0x264
      	[...]
      So we pre-store the valid value of the capability register to a global
      array in qm init process, and read the register value from this array
      when we need it. This ensures we can always get valid values.
      Signed-off-by: NZhiqi Song <songzhiqi1@huawei.com>
      Signed-off-by: NJiangShui Yang <yangjiangshui@h-partners.com>
      3585bdaf
    • W
      crypto: hisilicon/qm - add a function to set qm algs · c1e54cbb
      Wenkai Lin 提交于
      driver inclusion
      category: bugfix
      bugzilla: https://gitee.com/openeuler/kernel/issues/I7BANJ
      CVE: NA
      
      ----------------------------------------------------------------------
      
      Extract a public function to set qm algs and
      remove the similar code for setting qm algs
      in each module.
      Signed-off-by: NHao Fang <fanghao11@huawei.com>
      Signed-off-by: NWenkai Lin <linwenkai6@hisilicon.com>
      Signed-off-by: NJiangShui Yang <yangjiangshui@h-partners.com>
      c1e54cbb
  3. 06 6月, 2023 1 次提交
  4. 02 6月, 2023 1 次提交
    • L
      crypto:hisilicon/qm: bugfix queue parameter issue · 017eb679
      Longfang Liu 提交于
      driver inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I79JRM
      CVE: NA
      
      ----------------------------------------------------------------------
      
      After the queue isolation function is enabled in the BIOS.
      If the current default number of queues is used to enable PF,
      the default number of queues will be greater than the number of
      queues supported by the function set in the BIOS, which will cause
      the driver to fail to load.
      After modification. If queue isolation is enabled. When the default
      queue parameter is larger than the number supported by the function.
      The number of enabled queues will be changed to the number supported
      by the function.
      So that the driver can be loaded normally.
      Signed-off-by: NLongfang Liu <liulongfang@huawei.com>
      Signed-off-by: NJiangShui Yang <yangjiangshui@h-partners.com>
      (cherry picked from commit 9bcf38ed)
      017eb679
  5. 30 5月, 2023 1 次提交
  6. 22 5月, 2023 1 次提交
  7. 15 5月, 2023 5 次提交
  8. 19 10月, 2022 3 次提交
  9. 11 10月, 2022 1 次提交
  10. 19 7月, 2022 8 次提交
  11. 26 9月, 2021 4 次提交
  12. 22 7月, 2021 12 次提交