Some BIOSes hide 'overflow' device (dev #6) for i82875P/PE chipsets.
The same happens for i82865P/PE. Add a quirk to enable this device.
This allows i82875 EDAC driver to bind to chipset's dev #6 and not
dev #0 as the latter is used by AGP driver.

On my laptop (i82865P based) ACPI code is disabling this device
again in \_SB.PCI0._CRS method (called at least at PNP init time).
This can be easily worked around by patching DSDT.

[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: NMichal Miroslaw <mirq-linux@rere.qmqm.pl>
Acked-by: NDoug Thompson <norsk5@yahoo.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Addition of one unknown subsystem identifier to the quirks handler for
chipset i82855GM_HB on notebook Asus A6L. This exposes the otherwise
hidden SMBus controller within the south bridge ICH4-M.
Signed-off-by: NMats Erik Andersson <mats.andersson@gisladisker.se>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Without this patch, Broadcom BCM5906 Ethernet controllers set up via MSI
cause the machine to hang.  Tejun agreed that the best is to blacklist
the whole chipset and after adding it, seeing the other VIA quirks
disabling MSI, this very much looks like the right way.

Cc: <stable@kernel.org>
Signed-off-by: NThomas Renninger <trenn@suse.de>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This patch fixes breakage of of enable_cnt in quirk_resource_alignment.

Currently, quirk_resource_alignment calls pci_disable_device.
pci_disable_device decrements enable_cnt, so that enable_cnt becomes -1.

The patch disables memory decoding, writing command register directly.
So enable_cnt is not broken.
Signed-off-by: NYuji Shimada <shimada-yxb@necst.nec.co.jp>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

If BIOS doesn't allocate resources for the SR-IOV BARs, zero the Flash
BAR and program the SR-IOV BARs to use the old Flash Memory Space.

Please refer to Intel 82576 Gigabit Ethernet Controller Datasheet
section 7.9.2.14.2 for details.
http://download.intel.com/design/network/datashts/82576_Datasheet.pdfSigned-off-by: NYu Zhao <yu.zhao@intel.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Impact: fix bug

This patch reworks the nv_msi_ht_cap_quirk() and will only try to avoid
to enable ht_msi on device following that root dev, and don't touch that
root dev, but only do that trick with end_device on the chain.
Reported-by: NPrakash Punnoor <prakash@punnoor.de>
Tested-by: NPrakash Punnoor <prakash@punnoor.de>
Signed-off-by: NYinghai Lu <yinghai@kernel.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Impact: fix bug

Prakash reported that his c51-mcp51 system ondie sound card doesn't work
MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with
sound card.

This patch reworks nv_msi_ht_cap_quirk() and will only avoid enabling
ht_msi on devices following that root device.
Reported-by: NPrakash Punnoor <prakash@punnoor.de>
Signed-off-by: NYinghai Lu <yinghai@kernel.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

On the Compaq Evo D510 SFF/CMT, a PCI quirk activated the SMBus device
based on detection of the on-board VGA controller, but the on-board
VGA is disabled if an AGP card is inserted, so look for one of the USB
controllers instead.
Signed-off-by: NDavid O'Shea <dcoshea@hotmail.com>
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This patch allows memory resources to be assigned with a specified
alignment at boot-time or run-time. The patch is useful when we use PCI
pass-through, because page-aligned memory resources are required to
securely share PCI resources with guest drivers.

If you want to assign the resource at boot time, please set
"pci=resource_alignment=" boot parameter.

This is format of "pci=resource_alignment=" boot parameter:

        [<order of align>@][<domain>:]<bus>:<slot>.<func>[; ...]
                Specifies alignment and device to reassign
                aligned memory resources.
                If <order of align> is not specified, PAGE_SIZE is
                used as alignment.
                PCI-PCI bridge can be specified, if resource
                windows need to be expanded.

This is example:

        pci=resource_alignment=20@07:00.0;18@0f:00.0;00:1d.7

If you want to assign the resource at run-time, please set
"/sys/bus/pci/resource_alignment" file, and hot-remove the device and
hot-add the device.  For this purpose, fakephp or PCI hotplug interfaces
can be used.

The format of "/sys/bus/pci/resource_alignment" file is the same with
boot parameter. You can use "," instead of ";".

For example:

        # cd /sys/bus/pci
        # echo -n 20@12:00.0 > resource_alignment
        # echo 1 > devices/0000:12:00.0/remove
        # echo 1 > rescan
Reviewed-by: NAlex Chiang <achiang@hp.com>
Reviewed-by: NYu Zhao <yu.zhao@intel.com>
Signed-off-by: NYuji Shimada <shimada-yxb@necst.nec.co.jp>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Let it stay as serial, since it doesn't have subdevice in the form of 0x00PS.
Signed-off-by: NJiri Slaby <jirislaby@gmail.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

"Enabling" should read "Disabling"
Signed-off-by: NPrakash Punnoor <prakash@punnoor.de>
Signed-off-by: NMatthew Wilcox <willy@linux.intel.com>

Prakash's system needs MSI disabled on some bridges, but not all.
This seems to be the minimal fix for 2.6.29, but should be replaced
during 2.6.30.
Signed-off-by: NPrakash Punnoor <prakash@punnoor.de>
Signed-off-by: NMatthew Wilcox <willy@linux.intel.com>

This patch is intended to disable L0s ASPM link state for 82598 (ixgbe)
parts due to the fact that it is possible to corrupt TX data when coming
back out of L0s on some systems.  The workaround had been added for 82575
(igb) previously, but did not use the ASPM api.  This quirk uses the ASPM
api to prevent the ASPM subsystem from re-enabling the L0s state.

Instead of adding the fix in igb to the ixgbe driver as well it was
decided to move it into a pci quirk.  It is necessary to move the fix out
of the driver and into a pci quirk in order to prevent the issue from
occuring prior to driver load to handle the possibility of the device being
passed to a VM via direct assignment.
Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: NMatthew Wilcox <willy@linux.intel.com>

Turns out that the new AMD 813x devices do not need the
quirk_disable_amd_813x_boot_interrupt quirk to be run on them.  If it
is, no interrupts are seen on the PCI-X adapter.

From: Stefan Assmann <sassmann@novell.com>
Reported-by: NJamie Wellnitz <Jamie.Wellnitz@emulex.com>
Tested-by: NJamie Wellnitz <Jamie.Wellnitz@emulex.com>
Cc: stable <stable@kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: NJesse Barnes <jbarnes@hobbes.lan>

Prakash reported that his c51-mcp51 ondie sound card doesn't work with
MSI.  But if he hacks out the HT-MSI quirk, MSI works fine.

So this patch reworks the nv_msi_ht_cap_quirk().  It will now only
enable ht_msi on own its root device, avoiding enabling it on devices
following that root dev.
Reported-by: NPrakash Punnoor <prakash@punnoor.de>
Tested-by: NPrakash Punnoor <prakash@punnoor.de>
Signed-off-by: NYinghai Lu <yinghai@kernel.org>
Signed-off-by: NJesse Barnes <jbarnes@hobbes.lan>

David reported that LSI SAS doesn't work with MSI.  It turns out that
his BIOS doesn't enable it, but the HT MSI 8132 does support HT MSI.
Add quirk to enable it

Cc: stable@kernel.org
Reported-by: NDavid Lang <david@lang.hm>
Signed-off-by: NYinghai Lu <yinghai@kernel.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

All the other quirks are dev_info() not dev_err(), this one isn't special.
This makes 'quiet' boot in qemu really quiet.
Signed-off-by: NAdam Jackson <ajax@redhat.com>
Cc: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Tejun Heo <htejun@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This adds more LPC controller IO range decode quirks for the Intel ICH
family of chipsets. They differ a bit between the older ICH6 chipset and
the more modern layout of the ICH7-ICH10 chipsets.

This patch just prints out the IO decode information found by the quirks,
but eventually we may want to add them to the resource tree, in order to
know to avoid allocating things over them.

That's especially true if it turns out that any firmware ends up putting
the magic motherboard resources in an address range that we use for
dynamic allocations (ie above PCIBIOS_MIN_IO, which is 0x1000 on x86).
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Greg KH <greg@kroah.com>
Cc: Frans Pop <elendil@planet.nl>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Had a space before tab in do_fixups, prototype wasn't wrapped properly either.
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Signed-off-by: NAndreas Petlund <andreas@petlund.no>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

VPD quirks need to be called after the VPD capability is initialized.
Since VPD initialization now runs after pci_fixup_header (due to the
capabilities consolidation), VPD quirks should be done at
pci_fixup_final stage correspondingly.
Tested-by: NEric Dumazet <dada1@cosmosbay.com>
Signed-off-by: NYu Zhao <yu.zhao@intel.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

On Thu, Oct 23, 2008 at 04:09:52PM -0700, Alexander Beregalov wrote:
> arch/x86/kernel/built-in.o: In function `iommu_setup':
> pci-dma.c:(.init.text+0x36ad): undefined reference to `forbid_dac'
> pci-dma.c:(.init.text+0x36cc): undefined reference to `forbid_dac'
> pci-dma.c:(.init.text+0x3711): undefined reference to `forbid_dac

This patch partially reverts a patch to add IOMMU support to ia64.  The
forbid_dac variable was incorrectly moved to quirks.c, which isn't built
when PCI is disabled.
Tested-by: N"Alexander Beregalov" <a.beregalov@gmail.com>
Acked-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

No longer needed since we don't use the function symbol stuff anymore.
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Use %pF instead of print_fn_descriptor_symbol() in quirks.c to get the name of
the hook we're calling.
Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This patch adds the CONFIG_PCI_QUIRKS option which allows to remove all
the PCI quirks, which are not necessarily used on embedded systems when
PCI is working properly. As this is a size-reduction option, it depends
on CONFIG_EMBEDDED. It allows to save almost 12 kilobytes of kernel
code:

   text	   data	    bss	    dec	    hex	filename
1287806	 123596	 212992	1624394	 18c94a	vmlinux.old
1275854	 123596	 212992	1612442	 189a9a	vmlinux
 -11952       0       0  -11952   -2EB0 +/-

This patch has originally been written by Zwane Mwaikambo
<zwane@arm.linux.org.uk> and is part of the Linux Tiny project.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

The current Intel IOMMU code assumes that both host page size and Intel
IOMMU page size are 4KiB. The first patch supports variable page size.
This provides support for IA64 which has multiple page sizes.

This patch also adds some other code hooks for IA64 platform including
DMAR_OPERATION_TIMEOUT definition.

[dwmw2: some cleanup]
Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

I dunno how this missed Bjorn and his quest to use %pF in commit
c80cfb04 ("vsprintf: use new vsprintf
symbolic function pointer format"), but it did.

So use %pF in the two remaining places that still tried to print out
function pointers by hand.
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

BCM5706S wont work correctly unless VPD length truncated to 128
Signed-off-by: NDean Hildebrand <dhildeb@us.ibm.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

BCM5708S wont work correctly unless VPD length truncated to 128
Signed-off-by: NEric Dumazet <dada1@cosmosbay.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Libata has some hacks to deal with certain controllers going silly in D3
state. The right way to handle this is to keep a PCI device flag for
such devices. That can then be generalised for no ATA devices with power
problems.
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

x86, pci: introduce config option for pci reroute quirks (was: [PATCH 0/3] Boot IRQ quirks for Broadcom and AMD/ATI)

This is against linux-2.6-tip, branch pci-ioapic-boot-irq-quirks.

From: Stefan Assmann <sassmann@suse.de>
Subject: Introduce config option for pci reroute quirks

The config option X86_REROUTE_FOR_BROKEN_BOOT_IRQS is introduced to
enable (or disable) the redirection of the interrupt handler to the boot
interrupt line by default. Depending on the existence of interrupt
masking / threaded interrupt handling in the kernel (vanilla, rt, ...)
and the maturity of the rerouting patch, users can enable or disable the
redirection by default.

This means that the reroute quirk can be applied to any kernel without
changing it.

Interrupt sharing could be increased if this option is enabled. However this
option is vital for threaded interrupt handling, as done by the RT kernel.
It should simplify the consolidation with the RT kernel.

The option can be overridden by either pci=ioapicreroute or
pci=noioapicreroute.
Signed-off-by: NStefan Assmann <sassmann@suse.de>
Signed-off-by: NOlaf Dabrunz <od@suse.de>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

It is not necessary to call boot IRQ quirks before the BARs of the bridges are
probed. The normal case is to use DECLARE_PCI_FIXUP_FINAL, so we use this
instead now.

After a resume, we need to call the quirks again.
Signed-off-by: NOlaf Dabrunz <od@suse.de>
Signed-off-by: NStefan Assmann <sassmann@suse.de>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Olaf Dabrunz <od@suse.de>
Cc: Stefan Assmann <sassmann@suse.de>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Add quirks for several AMD/ATI chipsets to prevent generation of legacy boot
interrupts.

Integrates a separate older quirk to make IO-APIC mode work on
AMD 8131 rev. A0 and B0, which was due to an AMD erratum.
Signed-off-by: NOlaf Dabrunz <od@suse.de>
Signed-off-by: NStefan Assmann <sassmann@suse.de>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Olaf Dabrunz <od@suse.de>
Cc: Stefan Assmann <sassmann@suse.de>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Signed-off-by: NOlaf Dabrunz <od@suse.de>
Signed-off-by: NStefan Assmann <sassmann@suse.de>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Olaf Dabrunz <od@suse.de>
Cc: Stefan Assmann <sassmann@suse.de>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

This patch just fixes the compiler warning:

  drivers/pci/quirks.c: In function ‘quirk_reroute_to_boot_interrupts_intel’:
  drivers/pci/quirks.c:1375: warning: unused variable ‘i’
Signed-off-by: NBernhard Walle <bwalle@suse.de>
Cc: sassmann@suse.de
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Some chipsets (e.g. intel 6700PXH) generate a legacy INTx when the
IRQ entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel
does during interrupt handling). On chipsets where this INTx generation
cannot be disabled, we reroute the valid interrupts to their legacy
equivalent to get rid of spurious interrupts that might otherwise bring
down (vital) interrupt lines through spurious interrupt detection in
note_interrupt().

This patch benefited from discussions with Alexander Graf, Torsten Duwe,
Ihno Krumreich, Daniel Gollub, Hannes Reinecke. The conclusions we drew
and the patch itself are the authors' responsibility alone.
Signed-off-by: NStefan Assmann <sassmann@suse.de>
Signed-off-by: NOlaf Dabrunz <od@suse.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Add a quirk to disable legacy boot interrupt generation on intel devices
that support disabling it.

This patch benefited from discussions with Alexander Graf, Torsten Duwe,
Ihno Krumreich, Daniel Gollub, Hannes Reinecke. The conclusions we drew
and the patch itself are the authors' responsibility alone.
Signed-off-by: NStefan Assmann <sassmann@suse.de>
Signed-off-by: NOlaf Dabrunz <od@suse.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

It seems VT3336 can't do msi either as with its bro 3351.  Disable it.
Reported in the following SUSE bug.

  https://bugzilla.novell.com/show_bug.cgi?id=300001Signed-off-by: NTejun Heo <tj@kernel.org>
Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the
VPD end tag will hang the device.  This problem was initially
observed when a vpd entry was created in sysfs
('/sys/bus/pci/devices/<id>/vpd').   A read to this sysfs entry
will dump 32k of data.  Reading a full 32k will cause an access
beyond the VPD end tag causing the device to hang.  Once the device
is hung, the bnx2 driver will not be able to reset the device.
We believe that it is legal to read beyond the end tag and
therefore the solution is to limit the read/write length.

A majority of this patch is from Matthew Wilcox who gave code for
reworking the PCI vpd size information.  A PCI quirk added for the
Broadcom NIC's to limit the read/write's.
Signed-off-by: NBenjamin Li <benli@broadcom.com>
Signed-off-by: NMatthew Wilcox <willy@linux.intel.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This patch unhides the SMBus on Compaq Deskpro EN
SFF P667 with the Intel 815E chipset. Unhiding it reveals
a THMC51 hardware monitoring chip.

Jean Delvare has checked that this machine has no ACPI
magic touching the SMBus nor the hardware monitoring chip,
so this should be safe.

The patch was tested on Fedora Core 9 with 2.6.25.4 kernel.
Signed-off-by: NKrzysztof Helt <krzysztof.h1@wp.pl>
Tested-by: NRafał Haładuda <rh1985@wp.pl>
CC: Jean Delvare <khali@linux-fr.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>