If it's modified runtime, it's runtime info.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NMaarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9a9b94cb79a00229da5a564a16ea750a6d392ab6.1660910433.git.jani.nikula@intel.com

If it's modified runtime, it's runtime info.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NMaarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f6825dd97d2ba63aa395c30131c4b9e6ef32b0c8.1660910433.git.jani.nikula@intel.com

If it's modified runtime, it's runtime info.

v2: Rebase on mtl fbc_mask
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NMaarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/dd1898084b732ba265b212ddbc0fcdd826c11820.1660910433.git.jani.nikula@intel.com

If it's modified runtime, it's runtime info.

mock_gem_device() is the only one that modifies them. If that could be
fixed, we wouldn't have to do this.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NMaarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6bdf6cc0d67e3ed8042d2b92303351111147ba47.1660910433.git.jani.nikula@intel.com

Add initial runtime info that we can copy to runtime info at i915
creation time. This lets us define the initial values for runtime info
statically while making it possible to change them runtime. This will be
the new home for the current "const" device info members that are
modified runtime anyway.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NMaarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a77c6db2da20d401f47a0a5e87356b9b3f6292df.1660910433.git.jani.nikula@intel.com

We'll be moving info between static and runtime info. Combine the
printing functions into one to keep the output sensible and (mostly)
unchanged in the process.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NMaarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/8579bfe0fcc5ee8390d4cded68a0167a618097f5.1660910433.git.jani.nikula@intel.com

Pps power hook seems to be problematic for backlight controlled via
aux channel. Disable it for such cases.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3657
Cc: stable@vger.kernel.org
Signed-off-by: NJouni Högander <jouni.hogander@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220822140836.534432-1-jouni.hogander@intel.com

Remove unused macros. If needed again, such macros belong in
<linux/units.h>.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NMatthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220815080907.3229449-1-jani.nikula@intel.com

DSC 1.2 is supported from MTL, hence program ICH accordingly.

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: NVandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: NAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817124516.284456-2-jani.nikula@intel.com

From MTL onwards we support DSC 1.2, since there is hardcoding to minor
version 1, update it.

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: NVandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: NAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817124516.284456-1-jani.nikula@intel.com

Commit 20f85ef8 ("drm/i915/backlight: use unique backlight device
names") added support for multiple backlight devices on dual panel
systems, but did so with error handling on -EEXIST from
backlight_device_register(). Unfortunately, that triggered a warning in
dmesg all the way down from sysfs_add_file_mode_ns() and
sysfs_warn_dup().

Instead of optimistically always attempting to register with the default
name ("intel_backlight", which we have to retain for backward
compatibility), check if a backlight device with the name exists first,
and, if so, use the card and connector based name.

v2: reworked on top of the patch commit 20f85ef8
("drm/i915/backlight: use unique backlight device names")
v3: fixed the ref count leak(Jani N)

Fixes: 20f85ef8 ("drm/i915/backlight: use unique backlight device names")
Signed-off-by: NArun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220808035750.3111046-1-arun.r.murthy@intel.com

MTL introduces a second FBC engine. The two FBC engines can
operate entirely independently, FBC A serving pipe A and
FBC B serving pipe B.

The one place where things might go a bit wrong is the CFB
allocation from stolen. We might have to consider some change
to the allocation strategy to have a better chance of both
engines being able to allocate its CFB. Maybe FBC A should
allocate bottom up and FBC B top down, or something? For the
moment the allocation strategy is DRM_MM_INSERT_BEST for both.

Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: NMika Kahola <mika.kahola@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817122624.213889-1-jani.nikula@intel.com

Meteorlake and newer platforms support DP 2.0.

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NUma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817121948.180655-1-jani.nikula@intel.com

Drop the intermediate values stored in intel_dsi and use the VBT values
directly, now that they're conveniently stored in panel->vbt.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/8b3765f1e1dc4d436b312016f72647e03ba49f94.1660664162.git.jani.nikula@intel.com

The VBT dual-link DSI backlight and CABC still use ports A and C, both
in Bspec and code, while display 11+ DSI only supports ports A and
B. Assume port C actually means port B for display 11+ when parsing VBT.

Bspec: 20154
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6476
Cc: stable@vger.kernel.org
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/8c462718bcc7b36a83e09d0a5eef058b6bc8b1a2.1660664162.git.jani.nikula@intel.com

Avoid using ports that aren't initialized in case the VBT backlight or
CABC ports have invalid values. This fixes a NULL pointer dereference of
intel_dsi->dsi_hosts[port] in such cases.

Cc: stable@vger.kernel.org
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b0f4f087866257d280eb97d6bcfcefd109cc5fa2.1660664162.git.jani.nikula@intel.com

There is an unexpected word "the" in the file i915_irq.c,
fix it.
Signed-off-by: NBo Liu <liubo03@inspur.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220816094919.5419-1-liubo03@inspur.com

Declutter i915_reg.h by splitting backlight registers to a separate
file. Also include the utility pin definitions, even though they are
used for non-backlight things too.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NArun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220815094838.3511723-1-jani.nikula@intel.com

Make sure the TypeC PHY ownership flag is not getting reset during
an HDMI modeset on the given port. Besides the WARN this triggered, it
didn't cause other issues, since for TypeC legacy mode setting the
PHY ownership flag is optional (there is no other user of the PHY
besides display).
Reported-and-tested-by: NShawn C Lee <shawn.c.lee@intel.com>
Signed-off-by: NImre Deak <imre.deak@intel.com>
Reviewed-by: NMika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220726134313.1484763-1-imre.deak@intel.com

At the moment on DG2 at least loading the DMC firmware's PIPEDMC C and D
programs leads to sporadic unclaimed register accesses while programming
the initial state as described by the firmware's "MMIO init" table. This
will also lead to later unclaimed accesses for unrelated transcoder/pipe
registers backed by the pipe C and D display power wells.

Disabling the PIPEDMC clock gating during initialization - similarly to
Wa_16015201720 fixed this problem in my tests. While pipe A an B
requires the clock gating to be disabled all the time pipe C and D
requires this only while accessing the PIPEDMC registers.

Bspec: 49193
References: https://gitlab.freedesktop.org/drm/intel/-/issues/6526
References: https://gitlab.freedesktop.org/drm/intel/-/issues/6308Signed-off-by: NImre Deak <imre.deak@intel.com>
Reviewed-by: NArun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220808103054.3586074-1-imre.deak@intel.com

For proper operation of i915 we need usable PCI GTTMMADDR BAR 0
(1 for GEN2). In most cases we also need usable PCI GFXMEM BAR 2.
Let's add functions to check if BARs are set, and that it have
a size greater than 0.
In case GTTMMADDR BAR, let's validate at the beginning of i915
initialization.
For other BARs, let's validate before first use.
Signed-off-by: NPiotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: NJani Nikula <jani.nikula@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220805155959.1983584-3-piotr.piorkowski@intel.com

At the moment, when we refer to some PCI BAR we use the number of
this BAR in the code. The meaning of BARs between different platforms
may be different. Therefore, in order to organize the code,
let's start using defined names instead of numbers.

v2: Add lost header in cfg_space.c
Signed-off-by: NPiotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: NJani Nikula <jani.nikula@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220805155959.1983584-2-piotr.piorkowski@intel.com

Registers contents are supposed to be defined using REG_BIT() to ensure
they're u32 and the shift is within bounds.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NArun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d28b9b9fef4f496bdaaad5503dd8e0027f167518.1659607033.git.jani.nikula@intel.com

Reduce the bloat of i915_reg.h. The registers are also only needed in a
few places, no need to have them defined everywhere.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NArun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ce8334342e8bdf92c17c714aa13574e66cad93bb.1659607033.git.jani.nikula@intel.com

Sync up. In special to get the drm-intel-gt-next stuff.
Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>

Merge tag 'amd-drm-next-5.20-2022-07-29' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-5.20-2022-07-29:

amdgpu:
- Misc spelling and grammar fixes
- DC whitespace cleanups
- ACP smatch fix
- GFX 11.0 updates
- PSP 13.0 updates
- VCN 4.0 updates
- DC FP fix for PPC64
- Misc bug fixes

amdkfd:
- SVM fixes
Signed-off-by: NDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220729202742.6636-1-alexander.deucher@amd.com

With the latest DMC in place, enabling DC5 on DG2.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: NAnusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: NImre Deak <imre.deak@intel.com>
Signed-off-by: NImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728183641.55692-1-anusha.srivatsa@intel.com

We got a report from Stephen/Michael that the PowerPC build was failing
with the following error:

ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o uses soft float
ld: failed to merge target specific data of file drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o

This error happened because of the function optc3_set_vrr_m_const. This
function expects a double as a parameter in a code that is not allowed
to have FPU operations. After further investigation, it became clear
that optc3_set_vrr_m_const was never invoked, so we can safely drop this
function and fix the ld issue.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Melissa Wen <mwen@igalia.com>
Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
Reported-by: NMichael Ellerman <mpe@ellerman.id.au>
Tested-by: NMichael Ellerman <mpe@ellerman.id.au>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch will enable support for psp 13.0.4 blcok.
Signed-off-by: NXiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: NTim Huang <Tim.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch will add files for PSP 13.0.4.
Signed-off-by: NXiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: NTim Huang <Tim.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch will add header files for MP 13.0.4.
Signed-off-by: NXiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: NTim Huang <Tim.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch corrects RLC_RLCS_BOOTLOAD_STATUS offset and index for
GC 11.0.1.
Signed-off-by: NYifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: NTim Huang <Tim.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch will make SMU send msg to IMU for the front-door loading, it is
required by some ASICs.
Signed-off-by: NYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: NXiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: NTim Huang <Tim.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

time_is_before_jiffies deals with timer wrapping correctly.
Signed-off-by: NYu Zhe <yuzhe@nfschina.com>
Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Hives that require psp topology info to be reflected will leak hive
reference so fix it.
Signed-off-by: NJonathan Kim <jonathan.kim@amd.com>
Reviewed-by: NShaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The feature is ready with latest firmwares.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

And get the version bumped to 0x2C to match the latest PMFW.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

mes self test rely on vm mapping, move it after
drm sched re-started so that vm mapping can work
during gpu reset.
Signed-off-by: NJack Xiao <Jack.Xiao@amd.com>
Acked-and-tested-by: NEvan Quan <evan.quan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This extra call trace dump comes out in every gpu reset.
And it gives people a wrong impression that something
went wrong. Although actually there was not.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Acked-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Not enable VCN pg because encode issue
Signed-off-by: NSonny Jiang <sonny.jiang@amd.com>
Reviewed-by: NJames Zhu <James.Zhu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>