- 30 8月, 2019 34 次提交
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由 Bhawanpreet Lakha 提交于
Enable the building of dcn21 support. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Add missing parameters, to make dcn21 compile without errors Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Add the rev id for renoir. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
call update_bw_bounding_box in DC construct Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Hook up renoir support to KMS. v2: squash in "Fixes for Renoir in amdgpu_dm" Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
add Renoir DCN version in DC and handle it Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
rename VM_CONTEXT0 to MMVM_CONTEXT0 as that is the name defined in the register files Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
DML provides the display configuration validation as provided by the hw teams. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Misc display related configuration details. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Manages the renoir display resources (crtcs, phys, plls, etc.). v2: rebase (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Controls display clocks and interfaces with powerplay for clock and power requirements. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Controls the display hw's interface to memory. v2: rebase (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
These are the registers used to program the hubbub hw. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
This provides the interface to memory for the display hw. v2: minor cleanup (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Provides the interface to configure display interrrupts on renoir. v2: rebase fix (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
This defines the interface for communicating requirements between DC and powerplay. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
These are the registers used to for the hw sequences for modesetting. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
These are the registers used to program the clock hw. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
add registers for dcn, clk, and renoir ip offsets v2: header cleanup (Alex) v3: Add DPCS registers (Hersen) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Prike Liang 提交于
add the get_dpm_ultimate_freq for supporting different swSMU. -v2: Handle the unsupported clock type and read smc message failed case and return error code. Move the smu12 uclk frequency retrieved logic to renoir ppt. -v3: Use goto clause to handle invalidate clk index. Add the limited tag for smu_get_dpm_uclk to avoid other likewise interface introduced. Signed-off-by: NPrike Liang <Prike.Liang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Prike Liang 提交于
Should populate DPM clocks tables during hw init,otherwise will suffer from invalidate table. Signed-off-by: NPrike Liang <Prike.Liang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAaron Liu <aaron.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Prike Liang 提交于
There is no driver message to enable/disable feature mask for APU. For the sake of APU reusing swSMU interface and assume APU supports all the feature. Signed-off-by: NPrike Liang <Prike.Liang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAaron Liu <aaron.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Prike Liang 提交于
Init SDMA HW base configuration and enable idle INT for rn. Signed-off-by: NPrike Liang <Prike.Liang@amd.com> Reviewed-by: NAaron Liu <aaron.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tianci.Yin 提交于
Fix compute ring test failure in sriov scenario. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tianci.Yin 提交于
stolen memory should be fixed in visible region. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Colin Ian King 提交于
There is a spelling mistake in a DRM_DEBUG_DRIVER debug message. Fix it. Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
No need to add new asic cases. This is a sw display implementation, so just drop the error message so when we add new asics, all we have to do is add the virtual dce IP module. Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jean Delvare 提交于
Comparing adev->family with CHIP constants is not correct. adev->family can only be compared with AMDGPU_FAMILY constants and adev->asic_type is the struct member to compare with CHIP constants. They are separate identification spaces. Signed-off-by: NJean Delvare <jdelvare@suse.de> Fixes: 62a37553 ("drm/amdgpu: add si implementation v10") Cc: Ken Wang <Qingqing.Wang@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jean Delvare 提交于
The driver does not support these sensors yet and there is no point in creating sysfs attributes which will always return an error. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
for SOC15/vega10 the BACO reset & mode1 would introduce vram lost in high end address range, current kmd's vram lost checking cannot catch it since it only check very ahead visible frame buffer v2: cover NV as well Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
jpeg pg depends on vcn pg Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
in_suspend flag should be set in amdgpu_device_suspend/resume in pairs, instead of gfx10 ip suspend/resume function. Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 8月, 2019 6 次提交
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由 Aaron Liu 提交于
For picasso(adev->pdev->device == 0x15d8)&raven2(adev->rev_id >= 0x8), firmware is sufficient to support gfxoff. In commit 98f58ada, for picasso&raven2, return directly and cause gfxoff disabled. Fixes: 98f58ada ("drm/amdgpu/gfx9: update pg_flags after determining if gfx off is possible") Reviewed-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAaron Liu <aaron.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Masahiro Yamada 提交于
Since commit 04d5e276 ("drm/amdgpu: Merge amdkfd into amdgpu"), drivers/gpu/drm/amd/amdkfd/Makefile does not contain any syntax that is understood by the build system. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kai-Heng Feng 提交于
Needs ATPX rather than _PR3 to really turn off the dGPU. This can save ~5W when dGPU is runtime-suspended. Signed-off-by: NKai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 YueHaibing 提交于
After commit a9f54ce3 ("drm/amd/display: Refactoring VTEM"), there is no caller in tree. Reported-by: NHulk Robot <hulkci@huawei.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NYueHaibing <yuehaibing@huawei.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Fix for the commit below: drm/amd/powerplay: implment sysfs feature status function in smu Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Correct the settings for auto mode and skip the unnecessary settings for dcefclk and fclk. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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