1. 26 9月, 2018 36 次提交
  2. 24 8月, 2018 1 次提交
  3. 15 7月, 2018 3 次提交
    • R
      coresight: tpiu: Fix disabling timeouts · ccff2dfa
      Robin Murphy 提交于
      Probing the TPIU driver under UBSan triggers an out-of-bounds shift
      warning in coresight_timeout():
      
      ...
      [    5.677530] UBSAN: Undefined behaviour in drivers/hwtracing/coresight/coresight.c:929:16
      [    5.685542] shift exponent 64 is too large for 64-bit type 'long unsigned int'
      ...
      
      On closer inspection things are exponentially out of whack because we're
      passing a bitmask where a bit number should be. Amusingly, it seems that
      both calls will find their expected values by sheer luck and appear to
      succeed: 1 << FFCR_FON_MAN ends up at bit 64 which whilst undefined
      evaluates as zero in practice, while 1 << FFSR_FT_STOPPED finds bit 2
      (TCPresent) which apparently is usually tied high.
      
      Following the examples of other drivers, define separate FOO and FOO_BIT
      macros for masks vs. indices, and put things right.
      
      CC: Robert Walker <robert.walker@arm.com>
      CC: Mike Leach <mike.leach@linaro.org>
      CC: Mathieu Poirier <mathieu.poirier@linaro.org>
      Fixes: 11595db8 ("coresight: Fix disabling of CoreSight TPIU")
      Signed-off-by: NRobin Murphy <robin.murphy@arm.com>
      Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      ccff2dfa
    • S
      coresight: catu: Plug in CATU as a backend for ETR buffer · 434d611c
      Suzuki K Poulose 提交于
      Now that we can use a CATU with a scatter gather table, add support
      for the TMC ETR to make use of the connected CATU in translate mode.
      This is done by adding CATU as new buffer mode.
      
      Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
      Signed-off-by: NSuzuki K Poulose <suzuki.poulose@arm.com>
      Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      434d611c
    • S
      coresight: catu: Add support for scatter gather tables · 8ed536b1
      Suzuki K Poulose 提交于
      This patch adds the support for setting up a SG table for use
      by the CATU. We reuse the tmc_sg_table to represent the table/data
      pages, even though the table format is different.
      
      Similar to ETR SG table, CATU uses a 4KB page size for data buffers
      as well as page tables. All table entries are 64bit wide and have
      the following format:
      
              63                      12      1  0
              x-----------------------------------x
              |        Address [63-12] | SBZ  | V |
              x-----------------------------------x
      
      	Where [V] ->	 0 - Pointer is invalid
      			 1 - Pointer is Valid
      
      CATU uses only first half of the page for data page pointers.
      i.e, single table page will only have 256 page pointers, addressing
      upto 1MB of data. The second half of a table page contains only two
      pointers at the end of the page (i.e, pointers at index 510 and 511),
      which are used as links to the "Previous" and "Next" page tables
      respectively.
      
      The first table page has an "Invalid" previous pointer and the
      next pointer entry points to the second page table if there is one.
      Similarly the last table page has an "Invalid" next pointer to
      indicate the end of the table chain.
      
      Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
      Signed-off-by: NSuzuki K Poulose <suzuki.poulose@arm.com>
      Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      8ed536b1