Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Beyond the requirements of the architecture standard Cavium also supports
8k and 32k pages.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Acked-by: NDavid Daney <ddaney@caviumnetworks.com>

Addition of -fwrapv option in 2.6.29 discloses possible overflow with
signed arithmetics.  For example, result of "a * 6 / 12" (int a =
400000000) is 200000000 without -fwrapv but -157913941 with -fwrapv.

Change some variable to unsigned to avoid such overflows.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Synchronize dma_map_page/dma_unmap_page and dma_map_single/dma_unmap_single.
This will reduce unnecessary writebacks and invalidates.

[Ralf: make dma_unmap_page an inline function.]
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This is useful for IDT RC32332, RC32334 and NEC VR5500 processors which do
not implement the full MIPS32 / MIPS64 architecture.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Quoting from Loongson2FUserGuide.pdf:

5.22.1 Hazards
The processor detects most of the pipeline hazards in hardware, including
CP0 hazards and load hazards. No NOP instructions are required to correct
instruction sequences.
Signed-off-by: NZhang Le <r0bertz@gentoo.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The compat.h does not need seccomp.h since TIF_32BIT was moved to
thread_info.h

This fixes a build error of 64-bit kernel without CONFIG_SECCOMP.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: N: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The LTP timerfd01 test is failing (blocking forever) on the 32-bit ABIs. We
need to use the compat_* wrappers for these system calls.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Introduced by 99aa5029937ee926e3b249369e208d7013cd381b.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

I have taken Wu Zhangjin's and Philippe Vachon's version as references,
did a little modification and tested on 16K page size kernel. It works
well.

Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k
page size still not working.  More work needed here.
Signed-off-by: NZhang Le <r0bertz@gentoo.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The following symbols are needlessly defined global: cpuerr_irq and
memerr_irq. This patch makes the symbols static.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The file arch/mips/sgi-ip32/ip32-berr.c needlessly defines the function
ip32_be_handler() as global, and this patch makes it static.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The file arch/mips/mm/sc-rm7k.c needlessly defines two global symbols:

rm7k_sc_ops
rm7k_tcache_enabled

This patch makes these symbols static.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

au1xxx_power_dev_t? is never defined;  get rid of all PM stuff as well
since it is not in the driver source anyway.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Acked-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Commit 779e7d41 created a name collision
in SMTC builds.  The attached patch corrects this in a a
not-too-terribly-ugly manner.  Note that the SMTC case has to come
first, because CEVT_R4K will also be true.
Signed-off-by: NKevin D. Kissell <kevink@paralogos.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NKevin D. Kissell <kevink@paralogos.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Commit 9b8de747 ("FRV: Fix the section
attribute on UP DECLARE_PER_CPU()") cleaned up DECLARE/DEFINE_PER_CPU()
macros and in the process made alpha percpu.h include
include/asm-generic/percpu.h which breaks compilation due to duplicate
definitions.

Remove inclusion of generic asm helper file and define whatever necessary
in alpha header proper.

In the longer term, percpu definitions will be unified and all these
little subtlties will be removed.
Signed-off-by: NTejun Heo <tj@kernel.org>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: David Howells <dhowells@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fix resembles implementation from Marc Gauthier and Piet Denaly:

In the Xtensa architecture, assembly generates literals which must always
precede the code (the L32R instruction that loads them only uses negative
PC-relative offsets).  For any *.text section, literals are placed in a
corresponding *.literal section.  The linker script (vmlinux.lds) must
place these in the correct order.  It must also combine them, when the
*.text section can be larger than L32R's 256 kB range.

For example, this doesn't work:  *(.literal) *(.text) because L32R
instructions at the end of .text can't reach the literals.

The linker can solve this if they are combined in parentheses, like this:
       *(.literal .text)
because it is now allowed mix literals in .text to bring them in range.

None of this is done by standard vmlinux.lds.h macros such as TEXT_TEXT
and INIT_TEXT.  To avoid replicating the logic of that header file, we
instead post-process the generated linker script to convert *(xxx.text)
to *(xxx.literal xxx.text) for the following text sections:
       .text .ref.text .*init.text .*exit.text .text.*
using a sed script.  To do this we must override the default rule for
vmlinux.lds (see scripts/Makefile.build and the top-level Makefile)
to insert this extra step.
Signed-off-by: NMarc Gauthier <marc@tensilica.com>
Signed-off-by: NPete Delaney <piet@tensilica.com>
Signed-off-by: NChris Zankel <chris@zankel.net>

The previous patch enabled ccount calibration for the s6000 variant.
This patch updates the defconfig for the s6105 platform to reflect this
change.
Signed-off-by: NOskar Schirmer <os@emlix.com>
Signed-off-by: NChris Zankel <chris@zankel.net>

Calculate core frequency from timers at boot time
instead of assuming a fixed frequency. This is
useful as the true frequency is set up by the
boot loader, thus variable.
Signed-off-by: NOskar Schirmer <os@emlix.com>
Signed-off-by: NChris Zankel <chris@zankel.net>

The variable ccount_nsec has been renamed to nsec_per_ccount
in arch/xtensa/kernel/time.c in 2b8aea74 (2007-08-05),
but the fix failed to rename the variable in
arch/xtensa/include/asm/timex.h as well.
Signed-off-by: NOskar Schirmer <os@emlix.com>
Signed-off-by: NChris Zankel <chris@zankel.net>

Platform initialization sets up the LED heartbeat that is controlled
via GPIO.  Requesting the GPIO pins fails, however, as the chip is
only initialized later by a device_initcall().

Fix this up by exporting the initialization function.  Let the
platform set up the chip before it starts using it.
Signed-off-by: NJohannes Weiner <jw@emlix.com>
Signed-off-by: NChris Zankel <chris@zankel.net>

Commit '28a0ce7f xtensa: use correct stack pointer for stack traces'
changed the stack tracer from always reading the stack pointer
register to always using the saved value in the task descriptor.

The author was too dense to consider the fact that the saved stack
value is stale for a running process und thus unusable for 'current'.

What we do now is to use the stack pointer register (a1) for when the
task is unknown - we can't help it then - or when the task is
'current'.  For everything else use the saved stack pointer value
contained in the task descriptor.
Signed-off-by: NJohannes Weiner <jw@emlix.com>
Signed-off-by: NChris Zankel <chris@zankel.net>

We need to add a "memory" dependency (barrier) in assembly macros
that access (read or write) memory. Otherwise, the compiler might
ill-optimize the order of memory accesses.
Signed-off-by: NChris Zankel <chris@zankel.net>

Move a misplace endmenu marker to enable platform options and
disable PCI and automatic calibrating for the XT2K board. The
on-board PCI bridge is somewhat broken, anyway, and the
calibrating relies on some whacky usage of the serial port.
Signed-off-by: NChris Zankel <chris@zankel.net>

KVM optimizes guest port 80 accesses by passthing them through to the host.
Some AMD machines die on port 80 writes, allowing the guest to hard-lock the
host.

Remove the port passthrough to avoid the problem.

Cc: stable@kernel.org
Reported-by: NPiotr Jaroszyński <p.jaroszynski@gmail.com>
Tested-by: NPiotr Jaroszyński <p.jaroszynski@gmail.com>
Signed-off-by: NAvi Kivity <avi@redhat.com>

Some processors don't have EFER; don't oops if userspace wants us to
read EFER when we check NX.

Cc: stable@kernel.org
Signed-off-by: NAvi Kivity <avi@redhat.com>

NX support is bit 20, not bit 1.
Signed-off-by: NAvi Kivity <avi@redhat.com>

AMDs VMCB does not have an explicit unusable segment descriptor field,
so we emulate it by using "not present". This has to be setup before
the fixups, because this field is used there.
Signed-off-by: NAndre Przywara <andre.przywara@amd.com>
Signed-off-by: NAvi Kivity <avi@redhat.com>

ENOSYS makes modutils complain about missing kernel module support.
Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>

Lockdep reports the warning below when Li tries to offline one cpu:

[  110.835487] =================================
[  110.835616] [ INFO: inconsistent lock state ]
[  110.835688] 2.6.30-rc4-00336-g8c9ed899 #52
[  110.835757] ---------------------------------
[  110.835828] inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} usage.
[  110.835908] swapper/0 [HC1[1]:SC0[0]:HE0:SE1] takes:
[  110.835982]  (cmci_discover_lock){?.+...}, at: [<ffffffff80236dc0>] cmci_clear+0x30/0x9b

cmci_clear() can be called via smp_call_function_single().

It is better to disable interrupt while holding cmci_discover_lock,
to turn it into an irq-safe lock - we can deadlock otherwise.

[ Impact: fix possible deadlock in the MCE code ]
Reported-by: NShaohua Li <shaohua.li@intel.com>
Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <4A03ED38.8000700@jp.fujitsu.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Reported-by: Shaohua Li<shaohua.li@intel.com>

The Xen pagetables are no longer implicitly reserved as part of the other
i386_start_kernel reservations, so make sure we explicitly reserve them.
This prevents them from being released into the general kernel free page
pool and reused.

[ Impact: fix Xen guest crash ]
Also-Bisected-by: NBryan Donlan <bdonlan@gmail.com>
Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Xen-devel <xen-devel@lists.xensource.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <4A032EEC.30509@goop.org>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Tim Starling reported that crashdump will panic with kernel compiled
with CONFIG_KEXEC_JUMP due to null pointer deference in
machine_kexec_32.c: machine_kexec(), when deferencing
kexec_image. Refering to:

http://bugzilla.kernel.org/show_bug.cgi?id=13265

This patch fixes the BUG via replacing global variable reference:
kexec_image in machine_kexec() with local variable reference: image,
which is more appropriate, and will not be null.

Same BUG is in machine_kexec_64.c too, so fixed too in the same way.

[ Impact: fix crash on kexec ]
Reported-by: NTim Starling <tstarling@wikimedia.org>
Signed-off-by: NHuang Ying <ying.huang@intel.com>
LKML-Reference: <1241751101.6259.85.camel@yhuang-dev.sh.intel.com>
Signed-off-by: NH. Peter Anvin <hpa@zytor.com>

With the introduction of the .brk section, special care must be taken
that no unused page table entries remain if _brk_end and _end are
separated by a 2M page boundary. cleanup_highmap() runs very early and
hence cannot take care of that, hence potential entries needing to be
removed past _brk_end must be cleared once the brk allocator has done
its job.

[ Impact: avoids undesirable TLB aliases ]
Signed-off-by: NJan Beulich <jbeulich@novell.com>
Signed-off-by: NH. Peter Anvin <hpa@zytor.com>

If the first non-reserved (sub-)range doesn't fit the size requested,
an endless loop will be entered. If a range returned from
find_e820_area_size() turns out insufficient in size, the range must
be skipped before calling the function again.

[ Impact: fixes boot hang on some platforms ]
Signed-off-by: NJan Beulich <jbeulich@novell.com>
Signed-off-by: NH. Peter Anvin <hpa@zytor.com>

From: Bruce Ashfield <bruce.ashfield@windriver.com>

To fully support the armv7-a instruction set/optimizations, support
for the R_ARM_MOVW_ABS_NC and R_ARM_MOVT_ABS relocation types is
required.

The MOVW and MOVT are both load-immediate instructions, MOVW loads 16
bits into the bottom half of a register, and MOVT loads 16 bits into the
top half of a register.

The relocation information for these instructions has a full 32 bit
value, plus an addend which is stored in the 16 immediate bits in the
instruction itself.  The immediate bits in the instruction are not
contiguous (the register # splits it into a 4 bit and 12 bit value),
so the addend has to be extracted accordingly and added to the value.
The value is then split and put into the instruction; a MOVW uses the
bottom 16 bits of the value, and a MOVT uses the top 16 bits.
Signed-off-by: NDavid Borman <david.borman@windriver.com>
Signed-off-by: NBruce Ashfield <bruce.ashfield@windriver.com>
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>