- 24 9月, 2021 2 次提交
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由 Candice Li 提交于
Update PSP TA unload function to use PSP TA context as input argument. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Candice Li 提交于
Update asd_context structure and add asd_initialize function to conform ASD header/loading to generic TA systems. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 9月, 2021 2 次提交
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由 Candice Li 提交于
Remove all TA binary structures and add the specific binary structure in struct ta_context. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 John Clements 提交于
Remove uncessary RAS status prints Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 9月, 2021 1 次提交
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由 Candice Li 提交于
Creat common PSP TA load function and update PSP ta_mem_context with size information. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 9月, 2021 1 次提交
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由 Candice Li 提交于
Create common PSP TA unload function and replace all common TA unloading sequences. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 31 8月, 2021 1 次提交
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由 Lang Yu 提交于
To cover the corner case that people want to know the ID of an UNKNOWN CMD. Suggested-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NLang Yu <lang.yu@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 8月, 2021 1 次提交
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 8月, 2021 2 次提交
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jonathan Kim 提交于
The TA has a limit to the amount of data that can be retrieved from GET_TOPOLOGY. For setups that exceed this limit, the xGMI topology needs to be re-initialized and data needs to be re-fetched from the extended link records by setting a flag in the shared command buffer. The number of hops and the number of links must be accumulated by the driver. Other data points are all fetched from the first request. Because the TA has already exceeded its link record limit, it cannot hold bidirectional information. Otherwise the driver would have to do more than two fetches so the driver has to reflect the topology information in the opposite direction. v2: squashed with internal reviewed fix Signed-off-by: NJonathan Kim <jonathan.kim@amd.com> Reviewed-by: NHawking Zhang <hawking.zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 8月, 2021 1 次提交
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 8月, 2021 3 次提交
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由 John Clements 提交于
resolved race condition accessing psp cmd submission memory Signed-off-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NGuchun Chen <guchun.chen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 zhouchuangao 提交于
Duplicate include header file <drm/drm_drv.h> line 28: #include <drm/drm_drv.h> line 44: #include <drm/drm_drv.h> Signed-off-by: Nzhouchuangao <zhouchuangao@vivo.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 7月, 2021 2 次提交
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由 John Clements 提交于
Detect psp driver binaries packed into FW and try to load the FW Signed-off-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 John Clements 提交于
Improved handling for scalling PSP FW binaries Signed-off-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 7月, 2021 6 次提交
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由 Lang Yu 提交于
Add psp v11.0.8 to ip block initialization. v2: use APU flags (Alex) Signed-off-by: NLang Yu <lang.yu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Lang Yu 提交于
Add psp v11.0.8 function into psp driver. Signed-off-by: NLang Yu <lang.yu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Lang Yu 提交于
Adjust toc fw_name string length to PSP_FW_NAME_LEN. Signed-off-by: NLang Yu <lang.yu@amd.com> Reviewed-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <John.Clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Oak Zeng 提交于
Function name "psp_np_fw_load" is not proper as people don't know _np_fw_ means "non psp firmware". Change the function name to psp_load_non_psp_fw for better understanding. Same thing for function psp_execute_np_fw_load. Signed-off-by: NOak Zeng <Oak.Zeng@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian Konig <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jonathan Kim 提交于
The TA can now be invoked to provide the number of xgmi links connecting a direct source and destination peer. Non-direct peers will report zero links. Signed-off-by: NJonathan Kim <jonathan.kim@amd.com> Reviewed-by: NFelix Kuehling <felix.kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 7月, 2021 1 次提交
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由 Andrey Grodzovsky 提交于
System memory-based implementation for updating the USBCPD is deprecated for so switching to LFB based implementation for all the ASICs. Signed-off-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: NAlexander Deucher <Alexander.Deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 01 7月, 2021 2 次提交
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由 Lang Yu 提交于
Use amdgpu_ucode_name to show ucode name and psp_gfx_cmd_name to show psp_gfx_cmd name in psp_cmd_submit_buf. v2: adjust function name Signed-off-by: NLang Yu <Lang.Yu@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Lang Yu 提交于
Implement function psp_gfx_cmd_name to show cmd name via cmd id. v2: rename it to psp_gfx_cmd_name Signed-off-by: NLang Yu <Lang.Yu@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 6月, 2021 1 次提交
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由 Hawking Zhang 提交于
For ASICs that need to load sys_drv_aux and sos_aux, the sys_start_addr is not the start address of psp ucode array because the sys_drv_aux and sos_aux actaully located at the end of the ucode array, instead, the psp ucode arrary start address should be sos_hdr + sos_hdr_offset. Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NJohn Clements <John.Clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 6月, 2021 7 次提交
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由 Hawking Zhang 提交于
GECC and G6 mem training are mutually exclusive functionalities. VBIOS/PSP will set the flag (BOOT_CFG_FEATURE_TWO_STAGE_DRAM_TRAINING) in runtime database to indicate whether dram memory training need to be disabled or not. For Navi1x families, two stage mem training is always enabled. Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
PSP runtime boot_cfg_bitmask carries various psp bl feature bit mask that can be used by driver. Cache it in sw_init for further usage. Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
PSP will dump various boot up information into a portion of local frame buffer, called runtime database. The helper function is used for driver to query those shared information. v2: init ret and check !ret to exit loop as soon as found the entry Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
Dynamic GECC allows user to specify GECC enablement status, which will take effect in next boot cycle. v2: initialize boot_cfg to 0xFF Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
Query GECC enablement status in boot config Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
More boot configs need to be supported via BOOTCFG_CMD_SET Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
As the fix by adding PPSMC_MSG_PrepareMp1ForUnload is proved to be incomplete. Another fix(see link below) has been sent out. Link: https://lore.kernel.org/linux-pci/20210602021255.939090-1-evan.quan@amd.com/Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 6月, 2021 2 次提交
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由 John Clements 提交于
In the case with xgmi connected to cpu load alternate psp fw Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 John Clements 提交于
synchronized fw header with latest source Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 09 6月, 2021 3 次提交
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由 Rohit Khaire 提交于
This is similar to IH_RB_CNTL programming in navi10_ih_toggle_ring_interrupts Signed-off-by: NRohit Khaire <rohit.khaire@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHorace Chen <horace.chen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Zhigang Luo 提交于
psp added new feature to check fw buffer address for sriov vf. the address range must be in vf fb. Signed-off-by: NZhigang Luo <zhigang.luo@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-By : Shaoyun.liu <shaoyunl@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Zhigang Luo 提交于
need to load xgmi ta for aldebaran sriov vf. Signed-off-by: NZhigang Luo <zhigang.luo@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-By : Shaoyun.liu <shaoyunl@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 6月, 2021 2 次提交
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由 Aaron Liu 提交于
This patch enables psp_v13 for yellow carp. Signed-off-by: NAaron Liu <aaron.liu@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
Integrate two generic functions to determine if HDP flush is needed for all Asics. Signed-off-by: NEric Huang <jinhuieric.huang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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