1. 01 11月, 2020 1 次提交
  2. 01 10月, 2020 1 次提交
  3. 30 9月, 2020 1 次提交
    • S
      octeontx2-af: cleanup KPU config data · 42006910
      Stanislaw Kardach 提交于
      Refactor KPU related NPC code gathering all configuration data in a
      structured format and putting it in one place (npc_profile.h).
      This increases readability and makes it easier to extend the profile
      configuration (as opposed to jumping between multiple header and source
      files).
      
      To do this:
      * Gather all KPU profile related data into a single adapter struct.
      * Convert the built-in MKEX definition to a structured one to streamline
        the MKEX loading.
      * Convert LT default register configuration into a structure, keeping
        default protocol settings in same file where identifiers for those
        protocols are defined.
      * Add a single point for KPU profile loading, so that its source may
        change in the future once proper interfaces for loading such config
        are in place.
      Signed-off-by: NStanislaw Kardach <skardach@marvell.com>
      Acked-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      42006910
  4. 24 9月, 2020 1 次提交
  5. 25 8月, 2020 1 次提交
  6. 24 8月, 2020 1 次提交
  7. 04 3月, 2020 1 次提交
  8. 03 3月, 2020 2 次提交
  9. 20 2月, 2020 1 次提交
  10. 27 1月, 2020 1 次提交
  11. 15 11月, 2019 7 次提交
    • S
      octeontx2-af: Start/Stop traffic in CGX along with NPC · a7faa68b
      Subbaraya Sundeep 提交于
      Traffic for a CGX mapped NIXLF can be stopped by disabling entries
      in NPC MCAM or by configuring CGX and mailbox messages exist for the
      two options. If traffic is stopped at CGX then VFs of that PF are
      also effected hence CGX traffic should be started/stopped by
      tracking all the users of it. This patch implements that CGX users
      tracking. CGX is also configured along with NPC if required.
      
      Also removed a check which mandates even number of LBK VFs.
      Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com>
      Signed-off-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a7faa68b
    • S
      octeontx2-af: Add option to disable dynamic entry caching in NDC · a0291766
      Sunil Goutham 提交于
      A config option is added to disable caching of dynamic entries
      like SQEs and stack pages. Also locks down all HW contexts in NDC,
      preventing them from being evicted.
      
      This option is useful when the queue count is large and there are
      huge NDC cache misses. It's trade off between SQ context misses and
      dynamically changing entries like SQE and stack page pointers.
      Signed-off-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a0291766
    • G
      octeontx2-af: Support configurable NDC cache way_mask · ee1e7591
      Geetha sowjanya 提交于
      Each of the NIX/NPA LFs can choose which ways of their respective
      NDC caches should be used to cache their contexts. This enables
      flexible configurations like disabling caching for a LF, limiting
      it's context to a certain set of ways etc etc. Separate way_mask
      for NIX-TX and NIX-RX is not supported.
      Signed-off-by: NGeetha sowjanya <gakula@marvell.com>
      Signed-off-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ee1e7591
    • S
      octeontx2-af: Enable broadcast packet replication · 561e8752
      Sunil Goutham 提交于
      Ingress packet replication support has been added to 96xx B0
      silicon. This patch enables using that feature to replicate
      ingress broadcast packets to PF and it's VFs.
      
      Also fixed below issues
      - VFs can also install NPC MCAM entry to forward broadcast pkts.
        Otherwise, unless PF's interface is UP, VFs will not receive
        bcast packets.
      - NPC MCAM entry is disabled when PF and all it's VFs are down.
      - Few corner cases in installing multicast entry list.
      Signed-off-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      561e8752
    • S
      octeontx2-af: Support fixed transmit scheduler topology · 5d9b976d
      Sunil Goutham 提交于
      CN96xx initial silicon doesn't support all features pertaining to
      NIX transmit scheduling and shaping.
      - It supports a fixed topology of 1:1 mapped transmit
        limiters at all levels.
      - Supports DWRR only at SMQ/MDQ and TL1.
      - Doesn't support shaping and coloring.
      
      This patch adds HW capability structure by which each variant
      and skew of silicon can be differentiated by their supported
      features. And adds support for A0 silicon's transmit scheduler
      capabilities or rather limitations.
      Signed-off-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5d9b976d
    • K
      octeontx2-af: Add more RSS algorithms · 206ff848
      Kiran Kumar K 提交于
      This patch adds support for few more RSS key types for flow key
      algorithm to compute rss hash index.
      
      Following flow key types have been added.
      - Tunnel types like NVGRE, VXLAN, GENEVE.
      - L2 offload type ETH_DMAC, Here we will consider only DMAC 6 bytes.
      - And extension header IPV6_EXT (1 byte followed by IPV6 header
      - Hashing inner protocol fields for inner DMAC, IPv4/v6, TCP, UDP, SCTP.
      Signed-off-by: NKiran Kumar K <kirankumark@marvell.com>
      Signed-off-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      206ff848
    • H
      octeontx2-af: Update NPC KPU packet parsing profile · 922584f6
      Hao Zheng 提交于
      Updated NPC KPU packet parsing profile with support for following
      
      - Fragmentation support for IPv4 IPv6 outer header
      - NIX instruction header support
      - QinQ with TPID of 0x8100 as non inner most vlan tag, as legacy
        network equipments still generate QinQ packets with this configuration.
      - To better support RSS for tunnelled packets, udp based tunnel
        protocols such as vxlan, vxlan-gpe, geneve and gtpu are now
        captured into a separate layer E. Consequently, the inner
        packet headers are pushed one layer down to LF, LG, and LH
        accordingly.
      - Support for rfc7510 mpls in udp. Up to 4 MPLS labels can be parsed
        and captured in one layer LE.
      - Parser support for DSA, extended DSA and eDSA tags right after
        ethernet header by Marvell SOHO and Falcon switches. For extended
        DSA and eDSA tags, a special PKIND of 62 is used, as these tags don't
        contain a tpid field.
      - Higig2 protocol header parsing support, added a NPC_LT_LA_HIGIG2_ETHER
        for a combined header of HIGIG2 and Ethernet.  Add a
        NPC_LT_LA_IH_NIX_HIGIG2_ETHER for a combined header of nix_ih,
        HIGIG2 and Ethernet on egress side. Also added 2 upper flags in LA to
        indicate the presence of nix_ih and HIGIG2.
      
      Other changes include
      - IPv4.TTL==0 IPv6.HLIM==0 check
      - Per RFC 1858, mark fragment offset == 1 as error
      - TCP invalid flags check
      - Separate error codes for outer and inner IPv4 checksum errors.
      - Fix a parser error when KPU parses incoming IPSec ESP and AH packets
      - NPC vtag capture/strip hardware expect tag pointer to point to
        tpid/ethertype instead of tci. So move lb_ptr to point to tpid/ethertype.
      - Fix npc parser error when parsing udp packets that don't have any payload.
      - For a single MCAM entry to match on packets with one or stacked vlan tags
        combine NPC_LT_LB_STAG and NPC_LT_LB_QINQ to NPC_LT_LB_STAG_QINQ.
      - NVGRE to have a separate ltype LD_NVGRE instead of combined with LD_GRE.
      - Reserve top LD/LTYPEs to support custom KPU profile fields.
      Signed-off-by: NHao Zheng <haoz@marvell.com>
      Signed-off-by: NSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      922584f6
  12. 04 12月, 2018 11 次提交
  13. 24 11月, 2018 1 次提交
  14. 20 11月, 2018 10 次提交