Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl
dependencies. This changes the i2c ID each bus is registered with in
i2c-dev interface. As a result of this, many userspace tools break and
there is no consistent manner to fix the same if the i2c dev interface
have no consistent numbering.

Since this could happen for other OMAP derivatives, provide i2c alias
for all OMAP3+ SoCs to allow ordering the i2c devices correctly.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Added dr_mode property in dwc3 and set its default mode to device.
Signed-off-by: NGeorge Cherian <george.cherian@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both at init.
(In some cases there are erratas which prevent an IP
from being reset)
Have a way to pass this information from DT.

Update the am33xx/omap4 and omap5 dtsi files with the
new bindings for modules which either should not be
idled. reset or both. A later patch would cleanup the
same information that exists today as part of the hwmod
data files.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

The arm arch timers frequency are now programmed in the CNTFREQ
per-cpu register by the timer code using the secure API [1].
So remove the redundant entry from the dts.

[1] http://marc.info/?l=linux-omap&m=138139106312786&w=2Signed-off-by: NSricharan R <r.sricharan@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Without this node, there will be no palmas driver to notify
dwc3 that a cable has been connected and, without that, dwc3
will never initialize.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
[kishon@ti.com: added dt properties for enabling vbus/id interrupts
and fixed vbus-supply value after SMPS10 is modeled as 2 regulators]
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Fix the DTS data for ocp2scp node by adding the
missing reg property.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

USB3 block has a 64KiB space, another 64KiB is
used for the wrapper.

Without this change, resource_size() will get
confused and driver won't probe because size
will be negative.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

all other drivers using Synopsys IPs with DT
have a compatible of snps,$driver, in order
to add consistency, we are switching over to
snps,dwc3 but keeping synopsys,dwc3 in the core
driver to maintain backwards compatibility.

New DTS bindings should NOT use synopsys,dwc3.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Add bandgap device DT entry for OMAP5 dtsi.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NJ Keerthy <j-keerthy@ti.com>
[benoit.cousson@linaro.org: Fix alignement and use the macros
for IRQ attributes]
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.

Also provide pin multiplexer information for the USB host
pins.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: NSricharan R <r.sricharan@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Using constants for pinctrl allows a better readability, and removes
redundancy with comments.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Use the constants defined in include/dt-bindings/interrupt-controller/
to enhance readability.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Use standard GPIO constants to enhance the readability of DT GPIOs.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Replace /include/ by #include for OMAP2+ DT, in order to use the
C pre-processor, making use of #define features possible.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

The carveouts that have been reserved for multimedia usecases
are not being used currently by any driver and so have been
cleaned up. Memory will be allocated runtime through CMA for
enabling the multimedia usecases.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM.
The PWM capability property is missing from the node definitions of
couple of timers.

Add ti,timer-pwm attribute for timer 5, 6, 8 and 11.
Signed-off-by: NSuman Anna <s-anna@ti.com>
[benoit.cousson@linaro.org: Update changelog and subject to highlight
the fix]
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Add the "ti,gpio-always-on" property to the appropriate GPIO banks to
indicate which banks are always powered and will never lose logic state.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Update the DMTIMER compatibility property to reflect the register level
compatibilty between devices and update the various OMAP/AM timer
bindings with the appropriate compatibility string.

By doing this we can add platform specific data applicable to specific
timer versions to the driver. For example, errata flags can be populated
for the timer versions that are impacted.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add watchdog timer DT node for OMAP5 devices.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add l3-noc node for OMAP4 and OMAP5 devices.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

[jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt
number for the L3 interrupts to account for per processor interrupts (PPI)
and software generated interrupts (SGI) which typically are mapped to the
first 32 interrupts in the ARM GIC. This is not necessary because the first
parameter of the ARM GIC interrupt property specifies the GIC interrupt
type (ie. SGI, PPI, etc). Hence, fix the interrupt number for the L3
interrupts by substracting 32]
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add missing OMAP keypad reg property information.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

To be able to run kernel in HYP mode, virtual timer
and GIC node information needs to be populated.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

GIC is not part of OCP space so move the gic DT node
out of ocp DT address space.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Specify both secure as well as nonsecure PPI IRQ for arch
timer. This fixes the following errors seen on DT OMAP5 boot..

[    0.000000] arch_timer: No interrupt available, giving up
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

It has been decided to not duplicate banked modules dt nodes and that is
how the current arch timer dt extraction code is.

Update the OMAP5 DT file accordingly.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Populate DMA client information for McBSP DMIC and McPDM periperhal on
OMAP2+ devices.
Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

The OMAP gpio binding documention [1] states that the #interrupts-cells
property for gpio controllers should be 2. Currently, for OMAP3+ devices
the #interrupt-cells is set to 1. By setting this property to 2, it
allows clients to pass a 2nd parameter indicating the sensitivity (level
or edge) and polarity (high or low) of the interrupt. The OMAP gpio
controllers support these options and so update the #interrupt-cells
property for OMAP3+ devices to 2.

[1] Documentation/devicetree/bindings/gpio/gpio-omap.txt
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add SDMA controller binding for OMAP2+ devices and populate DMA client
information for SPI and MMC peripheral on OMAP3+ devices. Please note
that OMAP24xx devices do not have SPI and MMC bindings available yet and
so DMA client information is not populated.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add dwc3 omap glue data to the omap5 dt data file.
The information about the dt node added here is available @
Documentation/devicetree/bindings/usb/omap-usb.txt.

Also added dwc3 core dt data as a subnode to dwc3 omap glue
data in omap5 dt data file.
The information for the entered data node is available @
Documentation/devicetree/bindings/usb/dwc3.txt
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add omap-usb3 and omap-usb2 data node in OMAP5 device tree file.

The information for the node added here is available @
Documentation/devicetree/bindings/usb/usb-phy.txt
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add ocp2scp data node in omap5 device tree file.

The information for the node added here can be found @
Documentation/devicetree/bindings/bus/omap-ocp2scp.txt
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add omap control usb data in OMAP5 device tree file.
This will have the register address of registers to
power on the USB2 PHY and USB3 PHY.

The information for the node added here is available in
Documentation/devicetree/bindings/usb/omap-usb.txt
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add all 4 mcspi instances to omap5.dtsi file.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NSourav Poddar <sourav.poddar@ti.com>
[benoit.cousson@linaro.org: Update the subject]
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Adding EMIF device tree data for OMAP5 boards.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>

Add the 32kHz counter node for OMAP5 devices.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>

Add the 11 timer nodes for OMAP5 devices.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>

Add base address and interrupt line inside Device Tree data for
OMAP5.
Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>