1. 26 5月, 2015 1 次提交
    • R
      dmaengine: pxa: add pxa dmaengine driver · a57e16cf
      Robert Jarzmik 提交于
      This is a new driver for pxa SoCs, which is also compatible with the former
      mmp_pdma.
      
      The rationale behind a new driver (as opposed to incremental patching) was :
      
       - the new driver relies on virt-dma, which obsoletes all the internal
         structures of mmp_pdma (sw_desc, hw_desc, ...), and by consequence all the
         functions
      
       - mmp_pdma allocates dma coherent descriptors containing not only hardware
         descriptors but linked list information
         The new driver only puts the dma hardware descriptors (ie. 4 u32) into the
         dma pool allocated memory. This changes completely the way descriptors are
         handled
      
       - the architecture behind the interrupt/tasklet management was rewritten to be
         more conforming to virt-dma
      
       - the buffers alignment is handled differently
         The former driver assumed that the DMA channel stopped between each
         descriptor. The new one chains descriptors to let the channel running. This
         is a necessary guarantee for real-time high bandwidth usecases such as video
         capture on "old" architectures such as pxa.
      
       - hot chaining / cold chaining / no chaining
         Whenever possible, submitting a descriptor "hot chains" it to a running
         channel. There is still no guarantee that the descriptor will be issued, as
         the channel might be stopped just before the descriptor is submitted. Yet
         this allows to submit several video buffers, and resubmit a buffer while
         another is under handling.
         As before, dma_async_issue_pending() is the only guarantee to have all the
         buffers issued.
         When an alignment issue is detected (ie. one address in a descriptor is not
         a multiple of 8), if the already running channel is in "aligned mode", the
         channel will stop, and restarted in "misaligned mode" to finished the issued
         list.
      
       - descriptors reusing
         A submitted, issued and completed descriptor can be reused, ie resubmitted if
         it was prepared with the proper flag (DMA_PREP_ACK).  Only a channel
         resources release will in this case release that buffer.
         This allows a rolling ring of buffers to be reused, where there are several
         thousands of hardware descriptors used (video buffer for example).
      
      Additionally, a set of more casual features is introduced :
       - debugging traces
       - lockless way to know if a descriptor is terminated or not
      
      The driver was tested on zylonite board (pxa3xx) and mioa701 (pxa27x),
      with dmatest, pxa_camera and pxamci.
      Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      a57e16cf
  2. 17 3月, 2015 1 次提交
  3. 07 3月, 2015 1 次提交
  4. 15 10月, 2014 2 次提交
  5. 14 8月, 2013 1 次提交
    • D
      dma: mmp_pdma: add filter function · 13b3006b
      Daniel Mack 提交于
      PXA peripherals need to obtain specific DMA request ids which will
      eventually be stored in the DRCMR register.
      
      Currently, clients are expected to store that number inside the slave
      config block as slave_id, which is unfortunately incompatible with the
      way DMA resources are handled in DT environments.
      
      This patch adds a filter function which stores the filter parameter
      passed in by of-dma.c into the channel's drcmr register.
      
      For backward compatability, cfg->slave_id is still used if set to
      a non-zero value.
      Signed-off-by: NDaniel Mack <zonque@gmail.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      13b3006b
  6. 15 10月, 2012 1 次提交
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