- 26 8月, 2015 1 次提交
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由 Chen-Yu Tsai 提交于
of_clk_set_defaults uses the type 'bool', but clk-conf.h does not include its definition. This results in a compile error when only clk-conf.h is used. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 12 8月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Add Clock Domain support to the Clock Pulse Generator (CPG) Module Stop (MSTP) Clocks driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. The CPG/MSTP Clock Domain code will scan such devices for clocks that are suitable for power-managing the device, by looking for a clock that is compatible with "renesas,cpg-mstp-clocks". Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Reviewed-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 28 7月, 2015 1 次提交
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由 Boris Brezillon 提交于
Clock rates are stored in an unsigned long field, but ->determine_rate() (which returns a rounded rate from a requested one) returns a long value (errors are reported using negative error codes), which can lead to long overflow if the clock rate exceed 2Ghz. Change ->determine_rate() prototype to return 0 or an error code, and pass a pointer to a clk_rate_request structure containing the expected target rate and the rate constraints imposed by clk users. The clk_rate_request structure might be extended in the future to contain other kind of constraints like the rounding policy, the maximum clock inaccuracy or other things that are not yet supported by the CCF (power consumption constraints ?). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> CC: Jonathan Corbet <corbet@lwn.net> CC: Tony Lindgren <tony@atomide.com> CC: Ralf Baechle <ralf@linux-mips.org> CC: "Emilio López" <emilio@elopez.com.ar> CC: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NTero Kristo <t-kristo@ti.com> CC: Peter De Schrijver <pdeschrijver@nvidia.com> CC: Prashant Gaikwad <pgaikwad@nvidia.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Thierry Reding <thierry.reding@gmail.com> CC: Alexandre Courbot <gnurou@gmail.com> CC: linux-doc@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org CC: linux-omap@vger.kernel.org CC: linux-mips@linux-mips.org CC: linux-tegra@vger.kernel.org [sboyd@codeaurora.org: Fix parent dereference problem in __clk_determine_rate()] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Tested-by: NRomain Perier <romain.perier@gmail.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de> [sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate clocks without parents or a rate determining op] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 21 7月, 2015 1 次提交
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由 Stephen Boyd 提交于
Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Only include clk.h in files that are using it. Also add in a clkdev.h include that was missing in a file using clkdev APIs. Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 16 7月, 2015 1 次提交
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由 Tony Lindgren 提交于
Let's add a minimal clocks for dm814x to get it booted. This is mostly a placeholder and relies on the PLLs being on from the bootloader. Note that the divider clocks work the same way as on dm816x and am335x. Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Tero Kristo <t-kristo@ti.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 6月, 2015 18 次提交
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由 Tero Kristo 提交于
With most of the clock code under clock driver already, the low-level register access code, and the init code for the same, is no longer needed outside the clock driver. Thus, these can be moved under clock driver also. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
We should avoid exporting data from drivers, instead use an API for registering the clock low level operations. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With legacy clock support gone, this is no longer needed under platform, so move it under the clock driver itself. Make some exports be driver internal definitions at the same time. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock data gone, this is no longer needed under platform, so move it under the clock driver itself. Remove unnecessary declarations from the TI clock header also. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock data gone, this is no longer needed under platform, so move it under the clock driver itself. Remove the exported clock driver APIs as well, as these are not needed outside clock driver anymore. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock support gone, this is no longer needed under platform code-base. Thus, move this under the TI clock driver, and remove the exported API from the public header. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy support gone, OMAP2+ default gate clock can be moved under clock driver. Create a new file for the purpose, and clean-up the header exports a bit as some clock APIs are no longer needed outside clock driver itself. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
clkdm_control is used to determine, whether clocks should trigger a clockdomain transition when they are enabled/disabled. Keep this functionality intact, but replace this with a clk_features flag which can be initialized during boot if needed. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock support gone, OMAP3 generic DPLL code can now be moved over to the clock driver also. A few un-unused clkoutx2 functions are also removed at the same time. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Clock driver requires access to some CM API functions once the code is being moved under the clock driver from the platform directory. Gate type clock requires access to cm_wait_module_ready and cm_split_idlest_reg functions, which are both used for waiting until the module being clocked has been successfully activated. These CM APIs are now exported through the ti_clk_ll_ops struct. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Clock driver requires access to certain clockdomain handling ops once the code is being moved over under clock driver. Example of this is clk_enable / clk_disable under omap3 DPLL code. The required clkdm APIs are now exported through the ti_clk_ll_ops struct. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
This is no longer used outside clock driver, so move it under the driver and remove the export for it from the global header file. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
This is no longer needed in platform directory, as the legacy clock data is gone, so move it under TI clock driver. Some static functions are renamed also. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock support gone, the OMAP interface clock implementation can be moved under the clock driver. Some temporary header file tweaks are also needed to make this change work properly. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock support gone, the OMAP4 specific DPLL implementations can be moved under the clock driver. Change some of the function prototypes to be static at the same time, and remove some exports from the global TI clock driver header. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock data now gone, we can start moving OMAP clock type implementations under clock driver. Start this with moving the generic OMAP DPLL clock type under TI clock driver. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
As most of the clock driver support code is going to be moved under drivers/clk/ti, an API for setting / getting the SoC specific clock features is needed. This patch provides this API and changes the existing code to use it. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 12 4月, 2015 1 次提交
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由 Ben Dooks 提交于
Change to using endian agnostic _relaxed IO accessors instead of __raw Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk> -- CC: Andrew Victor <linux@maxim.org.za> CC: Nicolas Ferre <nicolas.ferre@atmel.com> CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Mike Turquette <mturquette@linaro.org> (maintainer:COMMON CLK FRAMEWORK) CC: Stephen Boyd <sboyd@codeaurora.org> (maintainer:COMMON CLK FRAMEWORK) CC: linux-kernel@vger.kernel.org (open list:COMMON CLK FRAMEWORK) Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 27 3月, 2015 1 次提交
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由 Tero Kristo 提交于
Splits the clock related provider module inits under their own driver files. Previously this was done for all modules under the common PRM driver. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 25 3月, 2015 1 次提交
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由 Tero Kristo 提交于
All clock provider related drivers will now register their iomaps with a static index. This makes it easier to split up the individual drivers to their own files in subsequent patches. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 27 2月, 2015 1 次提交
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由 Ulrich Hecht 提交于
Driver for the r8a7778's clocks that depend on the mode bits. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NMichael Turquette <mturquette@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 2月, 2015 1 次提交
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由 Arnd Bergmann 提交于
The 'ARM: OMAP3: legacy clock data move under clk driver' patch series causes build errors when CONFIG_OMAP3 is not set: drivers/clk/ti/dpll.c: In function 'ti_clk_register_dpll': drivers/clk/ti/dpll.c:199:31: error: 'omap3_dpll_ck_ops' undeclared (first use in this function) const struct clk_ops *ops = &omap3_dpll_ck_ops; ^ drivers/clk/ti/dpll.c:199:31: note: each undeclared identifier is reported only once for each function it appears in drivers/clk/ti/dpll.c:259:10: error: 'omap3_dpll_per_ck_ops' undeclared (first use in this function) ops = &omap3_dpll_per_ck_ops; ^ drivers/built-in.o: In function `ti_clk_register_gate': drivers/clk/ti/gate.c:179: undefined reference to `clkhwops_omap3430es2_dss_usbhost_wait' drivers/clk/ti/gate.c:179: undefined reference to `clkhwops_am35xx_ipss_module_wait' -in.o: In function `ti_clk_register_interface': drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_hsotgusb_wait' drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_dss_usbhost_wait' drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_ssi_wait' drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_am35xx_ipss_wait' drivers/built-in.o: In function `ti_clk_register_composite': :(.text+0x3da768): undefined reference to `ti_clk_build_component_gate' In order to fix that problem, this patch makes the omap3 legacy code compiled only when both CONFIG_OMAP3 and CONFIG_ATAGS are set. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 03 2月, 2015 1 次提交
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由 Tomeu Vizoso 提交于
Adds a way for clock consumers to set maximum and minimum rates. This can be used for thermal drivers to set minimum rates, or by misc. drivers to set maximum rates to assure a minimum performance level. Changes the signature of the determine_rate callback by adding the parameters min_rate and max_rate. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> [sboyd@codeaurora.org: set req_rate in __clk_init] Signed-off-by: NMichael Turquette <mturquette@linaro.org> [mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate migrated clk-private.h changes to clk.c]
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- 02 2月, 2015 1 次提交
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由 Peter De Schrijver 提交于
tegra_clocks_apply_init_table() needs to be called after the udelay loop has been calibrated (see commit 441f199a ("clk: tegra: defer application of init table") for why that is). On existing Tegra SoCs this was done by calling tegra_clocks_apply_init_table() from tegra_dt_init(). To make this also work on ARM64, we need to change this into an initcall. tegra_dt_init() is called from customize_machine which is an arch_initcall. Therefore this should also work on existing 32bit Tegra SoCs. Tested on Tegra20 (ventana), Tegra30 (beaverboard), Tegra124 (jetson TK1) and Tegra132. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> [paul@pwsan.com: tweaked the commit message] Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NPaul Walmsley <pwalmsley@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com>
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- 31 1月, 2015 1 次提交
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由 Tero Kristo 提交于
Introduces omap3 legacy clock data under clock driver. The clock data is also in new format, which makes it possible to get rid of the clk-private.h header. This patch also introduces SoC specific init functions that shall be called from the low level init. The data format used in this file has two possible evolution paths; it can either be removed completely once no longer needed, or it will be possible to retain the format and modify the TI clock driver to be a loadable module at some point. The actual path to be followed will be decided later. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 28 1月, 2015 1 次提交
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由 Stephen Boyd 提交于
These modules don't need to include clk-private.h. Replace the include with clk.h because these modules are clock consumers and also include clk-provider.h in clk/ti.h because struct clk_hw_omap has a struct clk_hw embedded in it. Cc: Tero Kristo <t-kristo@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 14 1月, 2015 1 次提交
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由 Maxime Ripard 提交于
Now that we don't have any user left for our custom phase function, we can safely remove this hack from the code. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Tested-by: NChen-Yu Tsai <wens@csie.org>
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- 16 12月, 2014 1 次提交
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由 Tero Kristo 提交于
While the change for determine_rate clock operation was merged, the OMAP counterpart using these calls was overlooked for some reason, and caused boot failures on at least OMAP4 platforms. Fixed by updating the DPLL API calls to use the new parameters. Signed-off-by: NTero Kristo <t-kristo@ti.com> Fixes: 646cafc6 ("clk: Change clk_ops->determine_rate") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Tested-by: NKevin Hilman <khilman@linaro.org> Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 14 11月, 2014 3 次提交
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由 Tero Kristo 提交于
Expand the support of omap4 per-dpll to provide set_rate_and_parent. This is required for proper behavior of clk_change_rate with determine_rate support. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
Similarly to OMAP3 noncore DPLL, the implementation of this DPLL clock type is wrong. This patch adds basic functionality for determine_rate for this clock type which will be taken into use in the patches following later. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
Currently, DPLL code hides the re-parenting within its internals, which is wrong. This needs to be exposed to the common clock code via determine_rate and set_rate_and_parent APIs. This patch adds support for these, which will be taken into use in the following patches. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 29 9月, 2014 1 次提交
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由 Tero Kristo 提交于
Previously, the TI clock driver initialized all the clocks hierarchically under each separate clock provider node. Now, each clock that requires IO access will instead check their parent node to find out which IO range to use. This patch allows the TI clock driver to use a few new features provided by the generic of_clk_init, and also allows registration of clock nodes outside the clock hierarchy (for example, any external clocks.) Signed-off-by: NTero Kristo <t-kristo@ti.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Stefan Assmann <sassmann@kpanic.de> Acked-by: NTony Lindgren <tony@atomide.com>
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- 22 9月, 2014 1 次提交
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由 Alexandre Belloni 提交于
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix interconnect (h32mx) has a clock that can be setup at the half of the h64mx clock (which is mck). The h32mx clock can not exceed 90 MHz. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 26 7月, 2014 1 次提交
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由 Sylwester Nawrocki 提交于
This patch adds helper functions to configure clock parents and rates as specified through 'assigned-clock-parents', 'assigned-clock-rates' DT properties for a clock provider or clock consumer device. The helpers are now being called by the bus code for the platform, I2C and SPI busses, before the driver probing and also in the clock core after registration of a clock provider. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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