- 24 7月, 2015 2 次提交
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由 Cyrille Pitchen 提交于
Depending on the hardware, TX and RX FIFOs may be available. The RX FIFO can avoid receive overruns, especially when DMA transfers are not used to read data from the Receive Holding Register. For heavy system load, The CPU is likely not be able to fetch data fast enough from the RHR. In addition, the RX FIFO can supersede the DMA/PDC to control the RTS line when the Hardware Handshaking mode is enabled. Two thresholds are to be set for that purpose: - When the number of data in the RX FIFO crosses and becomes lower than or equal to the low threshold, the RTS line is set to low level: the remote peer is requested to send data. - When the number of data in the RX FIFO crosses and becomes greater than or equal to the high threshold, the RTS line is set to high level: the remote peer should stop sending new data. - low threshold <= high threshold Once these two thresholds are set properly, this new feature is enabled by setting the FIFO RTS Control bit of the FIFO Mode Register. FIFOs also introduce a new multiple data mode: the USART works either in multiple data mode or in single data (legacy) mode. If MODE9 bit is set into the Mode Register or if USMODE is set to either LIN_MASTER, LIN_SLAVE or LON_MODE, FIFOs operate in single data mode. Otherwise, they operate in multiple data mode. In this new multiple data mode, accesses to the Receive Holding Register or Transmit Holding Register slightly change. Since this driver implements neither the 9bit data feature (MODE9 bit set into the Mode Register) nor LIN modes, the USART works in multiple data mode whenever FIFOs are available and enabled. We also assume that data are 8bit wide. In single data mode, 32bit access CAN be used to read a single data from RHR or write a single data into THR. However in multiple data mode, a 32bit access to RHR now allows us to read four consecutive data from RX FIFO. Also a 32bit access to THR now allows to write four consecutive data into TX FIFO. So we MUST use 8bit access whenever only one data have to be read/written at a time. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Cyrille Pitchen 提交于
This patch updates macro definitions in atmel_serial.h to fit the 80 column rule. Please note that some deprecated comments such as "[AT91SAM9261 only]" are removed as the corresponding bits also exist in some later chips. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 18 10月, 2013 1 次提交
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由 Nicolas Ferre 提交于
On older SoC, the "name" field is not filled in the register map. Fix the way to figure out if the serial port is an uart or an usart for these older products (with corresponding properties). Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 30 7月, 2013 1 次提交
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由 Elen Song 提交于
Distinguish usart and uart by read ip name register, The usart read name is "USAR", The uart and dbgu read name is "DBGU". Signed-off-by: NElen Song <elen.song@atmel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 2月, 2008 1 次提交
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由 Guennadi Liakhovetski 提交于
Currently early kernel messages, i.e., those from uncompression, go to the debugging UART. And if it is enabled in the platform configuration, but not initialized by the bootloader, the machine hangs, waiting for UART status change. Besides, having those messages on another UART - typically the console UART - may be preferrable. This patch allows selecting the UART in kernel configuration. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NAndrew Victor <linux@maxim.org.za> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 5月, 2007 1 次提交
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由 Andrew Victor 提交于
Allow slower serial baud-rates by switching the UART clock from MCK to MCK/8. Based on patches by Mike Wolfram and Russell King. Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 1月, 2007 1 次提交
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由 Andrew Victor 提交于
A couple of whitespace cleanups, mainly in the AT91 header files. Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 04 12月, 2006 1 次提交
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由 Andrew Victor 提交于
Updated some of the comments in the atmel_serial.h header detailing which bits are only available on the AT91RM9200 or the AT91SAM9xx processors. Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 10月, 2006 2 次提交
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由 Haavard Skinnemoen 提交于
Prefix all internal functions and variables with atmel_ instead of at91_. The at91_register_uart_fns() stuff is left as is since I can't find any actual users of it. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Haavard Skinnemoen 提交于
Move include/asm/arch/at91rm9200_usart.h into drivers/serial and rename it atmel_usart.h. Also delete AVR32's version of this file. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 11 1月, 2006 1 次提交
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由 Andrew Victor 提交于
Patch from Andrew Victor This patch adds support to the 2.6 kernel series for the Atmel AT91RM9200 processor. This patch is the Serial driver. This version uses the newly re-written GPL'ed hardware headers. Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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