1. 07 2月, 2023 2 次提交
    • J
      ice: introduce clear_reset_state operation · fa4a15c8
      Jacob Keller 提交于
      When hardware is reset, the VF relies on the VFGEN_RSTAT register to detect
      when the VF is finished resetting. This is a tri-state register where 0
      indicates a reset is in progress, 1 indicates the hardware is done
      resetting, and 2 indicates that the software is done resetting.
      
      Currently the PF driver relies on the device hardware resetting VFGEN_RSTAT
      when a global reset occurs. This works ok, but it does mean that the VF
      might not immediately notice a reset when the driver first detects that the
      global reset is occurring.
      
      This is also problematic for Scalable IOV, because there is no read/write
      equivalent VFGEN_RSTAT register for the Scalable VSI type. Instead, the
      Scalable IOV VFs will need to emulate this register.
      
      To support this, introduce a new VF operation, clear_reset_state, which is
      called when the PF driver first detects a global reset. The Single Root IOV
      implementation can just write to VFGEN_RSTAT to ensure it's cleared
      immediately, without waiting for the actual hardware reset to begin. The
      Scalable IOV implementation will use this as part of its tracking of the
      reset status to allow properly reporting the emulated VFGEN_RSTAT to the VF
      driver.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Reviewed-by: NPaul Menzel <pmenzel@molgen.mpg.de>
      Tested-by: NMarek Szlosek <marek.szlosek@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      fa4a15c8
    • J
      ice: refactor VSI setup to use parameter structure · 5e509ab2
      Jacob Keller 提交于
      The ice_vsi_setup function, ice_vsi_alloc, and ice_vsi_cfg functions have
      grown a large number of parameters. These parameters are used to initialize
      a new VSI, as well as re-configure an existing VSI
      
      Any time we want to add a new parameter to this function chain, even if it
      will usually be unset, we have to change many call sites due to changing
      the function signature.
      
      A future change is going to refactor ice_vsi_alloc and ice_vsi_cfg to move
      the VSI configuration and initialization all into ice_vsi_cfg.
      
      Before this, refactor the VSI setup flow to use a new ice_vsi_cfg_params
      structure. This will contain the configuration (mainly pointers) used to
      initialize a VSI.
      
      Pass this from ice_vsi_setup into the related functions such as
      ice_vsi_alloc, ice_vsi_cfg, and ice_vsi_cfg_def.
      
      Introduce a helper, ice_vsi_to_params to convert an existing VSI to the
      parameters used to initialize it. This will aid in the flows where we
      rebuild an existing VSI.
      
      Since we also pass the ICE_VSI_FLAG_INIT to more functions which do not
      need (or cannot yet have) the VSI parameters, lets make this clear by
      renaming the function parameter to vsi_flags and using a u32 instead of a
      signed integer. The name vsi_flags also makes it clear that we may extend
      the flags in the future.
      
      This change will make it easier to refactor the setup flow in the future,
      and will reduce the complexity required to add a new parameter for
      configuration in the future.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      5e509ab2
  2. 04 2月, 2023 6 次提交
    • M
      ice: update VSI instead of init in some case · ccf531b2
      Michal Swiatkowski 提交于
      ice_vsi_cfg() is called from different contexts:
      1) VSI exsist in HW, but it is reconfigured, because of changing queues
         for example -> update instead of init should be used
      2) VSI doesn't exsist, because rest has happened -> init command should
         be sent
      
      To support both cases pass boolean value which will store information
      what type of command has to be sent to HW.
      Signed-off-by: NMichal Swiatkowski <michal.swiatkowski@linux.intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      ccf531b2
    • M
      ice: move VSI delete outside deconfig · 227bf450
      Michal Swiatkowski 提交于
      In deconfig VSI shouldn't be deleted from hw.
      
      Rewrite VSI delete function to reflect that sometimes it is only needed
      to remove VSI from hw without freeing the memory:
      ice_vsi_delete() -> delete from HW and free memory
      ice_vsi_delete_from_hw() -> delete only from HW
      
      Value returned from ice_vsi_free() is never used. Change return type to
      void.
      Signed-off-by: NMichal Swiatkowski <michal.swiatkowski@linux.intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      227bf450
    • M
      ice: split probe into smaller functions · 5b246e53
      Michal Swiatkowski 提交于
      Part of code from probe can be reused in reload flow. Move this code to
      separate function. Create unroll functions for each part of
      initialization, like: ice_init_dev() and ice_deinit_dev(). It
      simplifies unrolling and can be used in remove flow.
      
      Avoid freeing port info as it could be reused in reload path.
      Will be freed in remove path since is allocated via devm_kzalloc().
      
      Also clean the remove path to reflect the init steps.
      Signed-off-by: NMichal Swiatkowski <michal.swiatkowski@linux.intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      5b246e53
    • M
      ice: split ice_vsi_setup into smaller functions · 6624e780
      Michal Swiatkowski 提交于
      Main goal is to reuse the same functions in VSI config and rebuild
      paths.
      To do this split ice_vsi_setup into smaller pieces and reuse it during
      rebuild.
      
      ice_vsi_alloc() should only alloc memory, not set the default values
      for VSI.
      Move setting defaults to separate function. This will allow config of
      already allocated VSI, for example in reload path.
      
      The path is mostly moving code around without introducing new
      functionality. Functions ice_vsi_cfg() and ice_vsi_decfg() were
      added, but they are using code that already exist.
      
      Use flag to pass information about VSI initialization during rebuild
      instead of using boolean value.
      Co-developed-by: NJacob Keller <jacob.e.keller@intel.com>
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Signed-off-by: NMichal Swiatkowski <michal.swiatkowski@linux.intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      6624e780
    • M
      ice: cleanup in VSI config/deconfig code · 0db66d20
      Michal Swiatkowski 提交于
      Do few small cleanups:
      
      1) Rename the function to reflect that it doesn't configure all things
      related to VSI. ice_vsi_cfg_lan() better fits to what function is doing.
      
      ice_vsi_cfg() can be use to name function that will configure whole VSI.
      
      2) Remove unused ethtype field from VSI. There is no need to set
      ethtype here, because it is never used.
      
      3) Remove unnecessary check for ICE_VSI_CHNL. There is check for
      ICE_VSI_CHNL in ice_vsi_get_qs, so there is no need to check it before
      calling the function.
      
      4) Simplify ice_vsi_alloc() call. There is no need to check the type of
      VSI before calling ice_vsi_alloc(). For ICE_VSI_CHNL vf is always NULL
      (ice_vsi_setup() is called with vf=NULL).
      For ICE_VSI_VF or ICE_VSI_CTRL ch is always NULL and for other VSI types
      ch and vf are always NULL.
      
      5) Remove unnecessary call to ice_vsi_dis_irq(). ice_vsi_dis_irq() will
      be called in ice_vsi_close() flow (ice_vsi_close() -> ice_vsi_down() ->
      ice_vsi_dis_irq()). Remove unnecessary call.
      
      6) Don't remove specific filters in release. All hw filters are removed
      in ice_fltr_remove_alli(), which is always called in VSI release flow.
      There is no need to remove only ethertype filters before calling
      ice_fltr_remove_all().
      
      7) Rename ice_vsi_clear() to ice_vsi_free(). As ice_vsi_clear() only
      free memory allocated in ice_vsi_alloc() rename it to ice_vsi_free()
      which better shows what function is doing.
      
      8) Free coalesce param in rebuild. There is potential memory leak if
      configuration of VSI lan fails. Free coalesce to avoid it.
      Signed-off-by: NMichal Swiatkowski <michal.swiatkowski@linux.intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      0db66d20
    • M
      ice: move RDMA init to ice_idc.c · 2b8db6af
      Michal Swiatkowski 提交于
      Simplify probe flow by moving all RDMA related code to ice_init_rdma().
      Unroll irq allocation if RDMA initialization fails.
      
      Implement ice_deinit_rdma() and use it in remove flow.
      Signed-off-by: NMichal Swiatkowski <michal.swiatkowski@linux.intel.com>
      Acked-by: NDave Ertman <david.m.ertman@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      2b8db6af
  3. 31 1月, 2023 1 次提交
    • B
      ice: Remove redundant pci_enable_pcie_error_reporting() · ba153552
      Bjorn Helgaas 提交于
      pci_enable_pcie_error_reporting() enables the device to send ERR_*
      Messages.  Since f26e58bf ("PCI/AER: Enable error reporting when AER is
      native"), the PCI core does this for all devices during enumeration.
      
      Remove the redundant pci_enable_pcie_error_reporting() call from the
      driver.  Also remove the corresponding pci_disable_pcie_error_reporting()
      from the driver .remove() path.
      
      Note that this doesn't control interrupt generation by the Root Port; that
      is controlled by the AER Root Error Command register, which is managed by
      the AER service driver.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
      Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
      Cc: intel-wired-lan@lists.osuosl.org
      Cc: netdev@vger.kernel.org
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      ba153552
  4. 28 1月, 2023 1 次提交
  5. 25 1月, 2023 1 次提交
  6. 20 1月, 2023 3 次提交
  7. 09 12月, 2022 1 次提交
    • J
      ice: always call ice_ptp_link_change and make it void · 6b1ff5d3
      Jacob Keller 提交于
      The ice_ptp_link_change function is currently only called for E822 based
      hardware. Future changes are going to extend this function to perform
      additional tasks on link change.
      
      Always call this function, moving the E810 check from the callers down to
      just before we call the E822-specific function required to restart the PHY.
      
      This function also returns an error value, but none of the callers actually
      check it. In general, the errors it produces are more likely systemic
      problems such as invalid or corrupt port numbers. No caller checks these,
      and so no warning is logged.
      
      Re-order the flag checks so that ICE_FLAG_PTP is checked first. Drop the
      unnecessary check for ICE_FLAG_PTP_SUPPORTED, as ICE_FLAG_PTP will not be
      set except when ICE_FLAG_PTP_SUPPORTED is set.
      
      Convert the port checks to WARN_ON_ONCE, in order to generate a kernel
      stack trace when they are hit.
      
      Convert the function to void since no caller actually checks these return
      values.
      Co-developed-by: NDave Ertman <david.m.ertman@intel.com>
      Signed-off-by: NDave Ertman <david.m.ertman@intel.com>
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      6b1ff5d3
  8. 24 11月, 2022 2 次提交
    • B
      ice: Accumulate ring statistics over reset · 288ecf49
      Benjamin Mikailenko 提交于
      Resets may occur with or without user interaction. For example, a TX hang
      or reconfiguration of parameters will result in a reset. During reset, the
      VSI is freed, freeing any statistics structures inside as well. This would
      create an issue for the user where a reset happens in the background,
      statistics set to zero, and the user checks ring statistics expecting them
      to be populated.
      
      To ensure this doesn't happen, accumulate ring statistics over reset.
      
      Define a new ring statistics structure, ice_ring_stats. The new structure
      lives in the VSI's parent, preserving ring statistics when VSI is freed.
      
      1. Define a new structure vsi_ring_stats in the PF scope
      2. Allocate/free stats only during probe, unload, or change in ring size
      3. Replace previous ring statistics functionality with new structure
      Signed-off-by: NBenjamin Mikailenko <benjamin.mikailenko@intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      288ecf49
    • B
      ice: Accumulate HW and Netdev statistics over reset · 2fd5e433
      Benjamin Mikailenko 提交于
      Resets happen with or without user interaction. For example, incidents
      such as TX hang or a reconfiguration of parameters will result in a reset.
      During reset, hardware and software statistics were set to zero. This
      created an issue for the user where a reset happens in the background,
      statistics set to zero, and the user checks statistics expecting them to
      be populated.
      
      To ensure this doesn't happen, keep accumulating stats over reset.
      
      1. Remove function calls which reset hardware and netdev statistics.
      2. Do not rollover statistics in ice_stat_update40 during reset.
      Signed-off-by: NBenjamin Mikailenko <benjamin.mikailenko@intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      2fd5e433
  9. 22 11月, 2022 1 次提交
    • J
      ice: fix handling of burst Tx timestamps · 30f15874
      Jacob Keller 提交于
      Commit 1229b339 ("ice: Add low latency Tx timestamp read") refactored
      PTP timestamping logic to use a threaded IRQ instead of a separate kthread.
      
      This implementation introduced ice_misc_intr_thread_fn and redefined the
      ice_ptp_process_ts function interface to return a value of whether or not
      the timestamp processing was complete.
      
      ice_misc_intr_thread_fn would take the return value from ice_ptp_process_ts
      and convert it into either IRQ_HANDLED if there were no more timestamps to
      be processed, or IRQ_WAKE_THREAD if the thread should continue processing.
      
      This is not correct, as the kernel does not re-schedule threaded IRQ
      functions automatically. IRQ_WAKE_THREAD can only be used by the main IRQ
      function.
      
      This results in the ice_ptp_process_ts function (and in turn the
      ice_ptp_tx_tstamp function) from only being called exactly once per
      interrupt.
      
      If an application sends a burst of Tx timestamps without waiting for a
      response, the interrupt will trigger for the first timestamp. However,
      later timestamps may not have arrived yet. This can result in dropped or
      discarded timestamps. Worse, on E822 hardware this results in the interrupt
      logic getting stuck such that no future interrupts will be triggered. The
      result is complete loss of Tx timestamp functionality.
      
      Fix this by modifying the ice_misc_intr_thread_fn to perform its own
      polling of the ice_ptp_process_ts function. We sleep for a few microseconds
      between attempts to avoid wasting significant CPU time. The value was
      chosen to allow time for the Tx timestamps to complete without wasting so
      much time that we overrun application wait budgets in the worst case.
      
      The ice_ptp_process_ts function also currently returns false in the event
      that the Tx tracker is not initialized. This would result in the threaded
      IRQ handler never exiting if it gets started while the tracker is not
      initialized.
      
      Fix the function to appropriately return true when the tracker is not
      initialized.
      
      Note that this will not reproduce with default ptp4l behavior, as the
      program always synchronously waits for a timestamp response before sending
      another timestamp request.
      Reported-by: NSiddaraju DH <siddaraju.dh@intel.com>
      Fixes: 1229b339 ("ice: Add low latency Tx timestamp read")
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      Link: https://lore.kernel.org/r/20221118222729.1565317-1-anthony.l.nguyen@intel.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      30f15874
  10. 18 11月, 2022 1 次提交
  11. 04 11月, 2022 2 次提交
  12. 29 10月, 2022 1 次提交
  13. 25 10月, 2022 1 次提交
  14. 29 9月, 2022 1 次提交
  15. 27 9月, 2022 1 次提交
  16. 21 9月, 2022 3 次提交
  17. 09 9月, 2022 1 次提交
    • D
      ice: Don't double unplug aux on peer initiated reset · 23c61919
      Dave Ertman 提交于
      In the IDC callback that is accessed when the aux drivers request a reset,
      the function to unplug the aux devices is called.  This function is also
      called in the ice_prepare_for_reset function. This double call is causing
      a "scheduling while atomic" BUG.
      
      [  662.676430] ice 0000:4c:00.0 rocep76s0: cqp opcode = 0x1 maj_err_code = 0xffff min_err_code = 0x8003
      
      [  662.676609] ice 0000:4c:00.0 rocep76s0: [Modify QP Cmd Error][op_code=8] status=-29 waiting=1 completion_err=1 maj=0xffff min=0x8003
      
      [  662.815006] ice 0000:4c:00.0 rocep76s0: ICE OICR event notification: oicr = 0x10000003
      
      [  662.815014] ice 0000:4c:00.0 rocep76s0: critical PE Error, GLPE_CRITERR=0x00011424
      
      [  662.815017] ice 0000:4c:00.0 rocep76s0: Requesting a reset
      
      [  662.815475] BUG: scheduling while atomic: swapper/37/0/0x00010002
      
      [  662.815475] BUG: scheduling while atomic: swapper/37/0/0x00010002
      [  662.815477] Modules linked in: rpcsec_gss_krb5 auth_rpcgss nfsv4 dns_resolver nfs lockd grace fscache netfs rfkill 8021q garp mrp stp llc vfat fat rpcrdma intel_rapl_msr intel_rapl_common sunrpc i10nm_edac rdma_ucm nfit ib_srpt libnvdimm ib_isert iscsi_target_mod x86_pkg_temp_thermal intel_powerclamp coretemp target_core_mod snd_hda_intel ib_iser snd_intel_dspcfg libiscsi snd_intel_sdw_acpi scsi_transport_iscsi kvm_intel iTCO_wdt rdma_cm snd_hda_codec kvm iw_cm ipmi_ssif iTCO_vendor_support snd_hda_core irqbypass crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hwdep snd_seq snd_seq_device rapl snd_pcm snd_timer isst_if_mbox_pci pcspkr isst_if_mmio irdma intel_uncore idxd acpi_ipmi joydev isst_if_common snd mei_me idxd_bus ipmi_si soundcore i2c_i801 mei ipmi_devintf i2c_smbus i2c_ismt ipmi_msghandler acpi_power_meter acpi_pad rv(OE) ib_uverbs ib_cm ib_core xfs libcrc32c ast i2c_algo_bit drm_vram_helper drm_kms_helper syscopyarea sysfillrect sysimgblt fb_sys_fops drm_ttm_helpe
       r ttm
      [  662.815546]  nvme nvme_core ice drm crc32c_intel i40e t10_pi wmi pinctrl_emmitsburg dm_mirror dm_region_hash dm_log dm_mod fuse
      [  662.815557] Preemption disabled at:
      [  662.815558] [<0000000000000000>] 0x0
      [  662.815563] CPU: 37 PID: 0 Comm: swapper/37 Kdump: loaded Tainted: G S         OE     5.17.1 #2
      [  662.815566] Hardware name: Intel Corporation D50DNP/D50DNP, BIOS SE5C6301.86B.6624.D18.2111021741 11/02/2021
      [  662.815568] Call Trace:
      [  662.815572]  <IRQ>
      [  662.815574]  dump_stack_lvl+0x33/0x42
      [  662.815581]  __schedule_bug.cold.147+0x7d/0x8a
      [  662.815588]  __schedule+0x798/0x990
      [  662.815595]  schedule+0x44/0xc0
      [  662.815597]  schedule_preempt_disabled+0x14/0x20
      [  662.815600]  __mutex_lock.isra.11+0x46c/0x490
      [  662.815603]  ? __ibdev_printk+0x76/0xc0 [ib_core]
      [  662.815633]  device_del+0x37/0x3d0
      [  662.815639]  ice_unplug_aux_dev+0x1a/0x40 [ice]
      [  662.815674]  ice_schedule_reset+0x3c/0xd0 [ice]
      [  662.815693]  irdma_iidc_event_handler.cold.7+0xb6/0xd3 [irdma]
      [  662.815712]  ? bitmap_find_next_zero_area_off+0x45/0xa0
      [  662.815719]  ice_send_event_to_aux+0x54/0x70 [ice]
      [  662.815741]  ice_misc_intr+0x21d/0x2d0 [ice]
      [  662.815756]  __handle_irq_event_percpu+0x4c/0x180
      [  662.815762]  handle_irq_event_percpu+0xf/0x40
      [  662.815764]  handle_irq_event+0x34/0x60
      [  662.815766]  handle_edge_irq+0x9a/0x1c0
      [  662.815770]  __common_interrupt+0x62/0x100
      [  662.815774]  common_interrupt+0xb4/0xd0
      [  662.815779]  </IRQ>
      [  662.815780]  <TASK>
      [  662.815780]  asm_common_interrupt+0x1e/0x40
      [  662.815785] RIP: 0010:cpuidle_enter_state+0xd6/0x380
      [  662.815789] Code: 49 89 c4 0f 1f 44 00 00 31 ff e8 65 d7 95 ff 45 84 ff 74 12 9c 58 f6 c4 02 0f 85 64 02 00 00 31 ff e8 ae c5 9c ff fb 45 85 f6 <0f> 88 12 01 00 00 49 63 d6 4c 2b 24 24 48 8d 04 52 48 8d 04 82 49
      [  662.815791] RSP: 0018:ff2c2c4f18edbe80 EFLAGS: 00000202
      [  662.815793] RAX: ff280805df140000 RBX: 0000000000000002 RCX: 000000000000001f
      [  662.815795] RDX: 0000009a52da2d08 RSI: ffffffff93f8240b RDI: ffffffff93f53ee7
      [  662.815796] RBP: ff5e2bd11ff41928 R08: 0000000000000000 R09: 000000000002f8c0
      [  662.815797] R10: 0000010c3f18e2cf R11: 000000000000000f R12: 0000009a52da2d08
      [  662.815798] R13: ffffffff94ad7e20 R14: 0000000000000002 R15: 0000000000000000
      [  662.815801]  cpuidle_enter+0x29/0x40
      [  662.815803]  do_idle+0x261/0x2b0
      [  662.815807]  cpu_startup_entry+0x19/0x20
      [  662.815809]  start_secondary+0x114/0x150
      [  662.815813]  secondary_startup_64_no_verify+0xd5/0xdb
      [  662.815818]  </TASK>
      [  662.815846] bad: scheduling from the idle thread!
      [  662.815849] CPU: 37 PID: 0 Comm: swapper/37 Kdump: loaded Tainted: G S      W  OE     5.17.1 #2
      [  662.815852] Hardware name: Intel Corporation D50DNP/D50DNP, BIOS SE5C6301.86B.6624.D18.2111021741 11/02/2021
      [  662.815853] Call Trace:
      [  662.815855]  <IRQ>
      [  662.815856]  dump_stack_lvl+0x33/0x42
      [  662.815860]  dequeue_task_idle+0x20/0x30
      [  662.815863]  __schedule+0x1c3/0x990
      [  662.815868]  schedule+0x44/0xc0
      [  662.815871]  schedule_preempt_disabled+0x14/0x20
      [  662.815873]  __mutex_lock.isra.11+0x3a8/0x490
      [  662.815876]  ? __ibdev_printk+0x76/0xc0 [ib_core]
      [  662.815904]  device_del+0x37/0x3d0
      [  662.815909]  ice_unplug_aux_dev+0x1a/0x40 [ice]
      [  662.815937]  ice_schedule_reset+0x3c/0xd0 [ice]
      [  662.815961]  irdma_iidc_event_handler.cold.7+0xb6/0xd3 [irdma]
      [  662.815979]  ? bitmap_find_next_zero_area_off+0x45/0xa0
      [  662.815985]  ice_send_event_to_aux+0x54/0x70 [ice]
      [  662.816011]  ice_misc_intr+0x21d/0x2d0 [ice]
      [  662.816033]  __handle_irq_event_percpu+0x4c/0x180
      [  662.816037]  handle_irq_event_percpu+0xf/0x40
      [  662.816039]  handle_irq_event+0x34/0x60
      [  662.816042]  handle_edge_irq+0x9a/0x1c0
      [  662.816045]  __common_interrupt+0x62/0x100
      [  662.816048]  common_interrupt+0xb4/0xd0
      [  662.816052]  </IRQ>
      [  662.816053]  <TASK>
      [  662.816054]  asm_common_interrupt+0x1e/0x40
      [  662.816057] RIP: 0010:cpuidle_enter_state+0xd6/0x380
      [  662.816060] Code: 49 89 c4 0f 1f 44 00 00 31 ff e8 65 d7 95 ff 45 84 ff 74 12 9c 58 f6 c4 02 0f 85 64 02 00 00 31 ff e8 ae c5 9c ff fb 45 85 f6 <0f> 88 12 01 00 00 49 63 d6 4c 2b 24 24 48 8d 04 52 48 8d 04 82 49
      [  662.816063] RSP: 0018:ff2c2c4f18edbe80 EFLAGS: 00000202
      [  662.816065] RAX: ff280805df140000 RBX: 0000000000000002 RCX: 000000000000001f
      [  662.816067] RDX: 0000009a52da2d08 RSI: ffffffff93f8240b RDI: ffffffff93f53ee7
      [  662.816068] RBP: ff5e2bd11ff41928 R08: 0000000000000000 R09: 000000000002f8c0
      [  662.816070] R10: 0000010c3f18e2cf R11: 000000000000000f R12: 0000009a52da2d08
      [  662.816071] R13: ffffffff94ad7e20 R14: 0000000000000002 R15: 0000000000000000
      [  662.816075]  cpuidle_enter+0x29/0x40
      [  662.816077]  do_idle+0x261/0x2b0
      [  662.816080]  cpu_startup_entry+0x19/0x20
      [  662.816083]  start_secondary+0x114/0x150
      [  662.816087]  secondary_startup_64_no_verify+0xd5/0xdb
      [  662.816091]  </TASK>
      [  662.816169] bad: scheduling from the idle thread!
      
      The correct place to unplug the aux devices for a reset is in the
      prepare_for_reset function, as this is a common place for all reset flows.
      It also has built in protection from being called twice in a single reset
      instance before the aux devices are replugged.
      
      Fixes: f9f5301e ("ice: Register auxiliary device to provide RDMA")
      Signed-off-by: NDave Ertman <david.m.ertman@intel.com>
      Tested-by: NHelena Anna Dubel <helena.anna.dubel@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      23c61919
  18. 07 9月, 2022 1 次提交
    • T
      ice: Allow operation with reduced device MSI-X · ce462613
      Tony Nguyen 提交于
      The driver currently takes an all or nothing approach for device MSI-X
      vectors. Meaning if it does not get its full allocation, it will fail and
      not load. There is no reason it can't work with a reduced number of MSI-X
      vectors. Take a similar approach as commit 741106f7 ("ice: Improve
      MSI-X fallback logic") and, instead, adjust the MSI-X request to make use
      of what is available.
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      Tested-by: NPetr Oros <poros@redhat.com>
      Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      ce462613
  19. 02 9月, 2022 2 次提交
  20. 22 8月, 2022 1 次提交
    • M
      ice: xsk: use Rx ring's XDP ring when picking NAPI context · 9ead7e74
      Maciej Fijalkowski 提交于
      Ice driver allocates per cpu XDP queues so that redirect path can safely
      use smp_processor_id() as an index to the array. At the same time
      though, XDP rings are used to pick NAPI context to call napi_schedule()
      or set NAPIF_STATE_MISSED. When user reduces queue count, say to 8, and
      num_possible_cpus() of underlying platform is 44, then this means queue
      vectors with correlated NAPI contexts will carry several XDP queues.
      
      This in turn can result in a broken behavior where NAPI context of
      interest will never be scheduled and AF_XDP socket will not process any
      traffic.
      
      To fix this, let us change the way how XDP rings are assigned to Rx
      rings and use this information later on when setting
      ice_tx_ring::xsk_pool pointer. For each Rx ring, grab the associated
      queue vector and walk through Tx ring's linked list. Once we stumble
      upon XDP ring in it, assign this ring to ice_rx_ring::xdp_ring.
      
      Previous [0] approach of fixing this issue was for txonly scenario
      because of the described grouping of XDP rings across queue vectors. So,
      relying on Rx ring meant that NAPI context could be scheduled with a
      queue vector without XDP ring with associated XSK pool.
      
      [0]: https://lore.kernel.org/netdev/20220707161128.54215-1-maciej.fijalkowski@intel.com/
      
      Fixes: 2d4238f5 ("ice: Add support for AF_XDP")
      Fixes: 22bf877e ("ice: introduce XDP_TX fallback path")
      Signed-off-by: NMaciej Fijalkowski <maciej.fijalkowski@intel.com>
      Tested-by: NGeorge Kuruvinakunnel <george.kuruvinakunnel@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      9ead7e74
  21. 18 8月, 2022 4 次提交
  22. 02 8月, 2022 1 次提交
  23. 29 7月, 2022 2 次提交