- 28 5月, 2020 5 次提交
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由 Ulf Hansson 提交于
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20200409125422.21842-1-ulf.hansson@linaro.org
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由 Ulf Hansson 提交于
The in-parameter struct mmc_data *data is never NULL, because the caller always provides a valid pointer. Hence drop the corresponding redundant code. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NKrzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200407143903.22477-1-ulf.hansson@linaro.org
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由 Ulf Hansson 提交于
The in-parameter "wait" is always set to 0 by the caller, hence just drop it and its corresponding code. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NManuel Lauss <manuel.lauss@gmail.com> Link: https://lore.kernel.org/r/20200406114337.8802-1-ulf.hansson@linaro.org
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由 Ulf Hansson 提交于
The MMC_CAP_ERASE and MMC_CAP_CMD23 flags are already being set in the common sdhci_setup_host(). This makes it redundant to set them for sdhci-sprd, so let's drop them. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Reviewed-by: NBaolin Wang <baolin.wang7@gmail.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200406113724.8504-1-ulf.hansson@linaro.org
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由 Ulf Hansson 提交于
Instead of explicitly checking for SDIO specific requests and then returning an error code, let's set MMC_CAP2_NO_SDIO to tell the mmc core to prevent them altogether. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20200401145531.23247-1-ulf.hansson@linaro.org
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- 11 5月, 2020 1 次提交
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由 Raul E Rangel 提交于
The AMD eMMC 5.0 controller does not support 64 bit DMA. Fixes: 34597a3f ("mmc: sdhci-acpi: Add support for ACPI HID of AMD Controller with HS400") Signed-off-by: NRaul E Rangel <rrangel@chromium.org> Link: https://marc.info/?l=linux-mmc&m=158879884514552&w=2Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200508165344.1.Id5bb8b1ae7ea576f26f9d91c761df7ccffbf58c5@changeidSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 07 5月, 2020 3 次提交
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由 Ben Chuang 提交于
Need to clear some bits in a vendor-defined register after reboot from Windows 10. Fixes: e51df6ce ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support") Reported-by: NGrzegorz Kowal <custos.mentis@gmail.com> Signed-off-by: NBen Chuang <ben.chuang@genesyslogic.com.tw> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Tested-by: NGrzegorz Kowal <custos.mentis@gmail.com> Link: https://lore.kernel.org/r/20200504063957.6638-1-benchuanggli@gmail.com Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Christophe JAILLET 提交于
If devm_request_threaded_irq() fails, the allocated struct mmc_host needs to be freed via calling mmc_free_host(), so let's do that. Fixes: c5413ad8 ("mmc: add new Alcor Micro Cardreader SD/MMC driver") Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/20200426202355.43055-1-christophe.jaillet@wanadoo.fr Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ben Chuang 提交于
The kernel prints a message similar to "[ 28.881959] do_IRQ: 5.36 No irq handler for vector" when GL975x resumes from suspend. Implement a resume callback to fix this. Fixes: 31e43f31 ("mmc: sdhci-pci-gli: Enable MSI interrupt for GL975x") Co-developed-by: NRenius Chen <renius.chen@genesyslogic.com.tw> Signed-off-by: NRenius Chen <renius.chen@genesyslogic.com.tw> Tested-by: NDave Flogeras <dflogeras2@gmail.com> Signed-off-by: NBen Chuang <ben.chuang@genesyslogic.com.tw> Tested-by: NVineeth Pillai <vineethrp@gmail.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200427103048.20785-1-benchuanggli@gmail.com Cc: stable@vger.kernel.org Signed-off-by: NSamuel Zou <zou_wei@huawei.com> [Samuel Zou: Make sdhci_pci_gli_resume() static] Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 22 4月, 2020 1 次提交
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由 Adrian Hunter 提交于
BIOS writers have begun the practice of setting 40 ohm eMMC driver strength even though the eMMC may not support it, on the assumption that the kernel will validate the value against the eMMC (Extended CSD DRIVER_STRENGTH [offset 197]) and revert to the default 50 ohm value if 40 ohm is invalid. This is done to avoid changing the value for different boards. Putting aside the merits of this approach, it is clear the eMMC's mask of supported driver strengths is more reliable than the value provided by BIOS. Add validation accordingly. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Fixes: 51ced59c ("mmc: sdhci-pci: Use ACPI DSM to get driver strength for some Intel devices") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200422111629.4899-1-adrian.hunter@intel.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 20 4月, 2020 5 次提交
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由 Marek Behún 提交于
For some reason the Host Control2 register of the Xenon SDHCI controller sometimes reports the bit representing 1.8V signaling as 0 when read after it was written as 1. Subsequent read reports 1. This causes the sdhci_start_signal_voltage_switch function to report 1.8V regulator output did not become stable When CONFIG_PM is enabled, the host is suspended and resumend many times, and in each resume the switch to 1.8V is called, and so the kernel log reports this message annoyingly often. Do an empty read of the Host Control2 register in Xenon's .voltage_switch method to circumvent this. This patch fixes this particular problem on Turris MOX. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Fixes: 8d876bf4 ("mmc: sdhci-xenon: wait 5ms after set 1.8V...") Cc: stable@vger.kernel.org # v4.16+ Link: https://lore.kernel.org/r/20200420080444.25242-1-marek.behun@nic.czSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Veerabhadrarao Badiganti 提交于
MSM sd host controller is capable of HW busy detection of device busy signaling over DAT0 line. And it requires the R1B response for commands that have this response associated with them. So set the below two host capabilities for qcom SDHC. - MMC_CAP_WAIT_WHILE_BUSY - MMC_CAP_NEED_RSP_BUSY Recent development of the mmc core in regards to this, revealed this as being a potential bug, hence the stable tag. Cc: <stable@vger.kernel.org> # v4.19+ Signed-off-by: NVeerabhadrarao Badiganti <vbadigan@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/1587363626-20413-2-git-send-email-vbadigan@codeaurora.orgSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Douglas Anderson 提交于
Open-coding a timeout loop invariably leads to errors with handling the timeout properly in one corner case or another. In the case of cqhci we might report "CQE stuck on" even if it wasn't stuck on. You'd just need this sequence of events to happen in cqhci_off(): 1. Call ktime_get(). 2. Something happens to interrupt the CPU for > 100 us (context switch or interrupt). 3. Check time and; set "timed_out" to true since > 100 us. 4. Read CQHCI_CTL. 5. Both "reg & CQHCI_HALT" and "timed_out" are true, so break. 6. Since "timed_out" is true, falsely print the error message. Rather than fixing the polling loop, use readx_poll_timeout() like many people do. This has been time tested to handle the corner cases. Fixes: a4080225 ("mmc: cqhci: support for command queue enabled host") Signed-off-by: NDouglas Anderson <dianders@chromium.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200413162717.1.Idece266f5c8793193b57a1ddb1066d030c6af8e0@changeidSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Martin Blumenstingl 提交于
The recent commit 0d84c3e6 ("mmc: core: Convert to mmc_poll_for_busy() for erase/trim/discard") makes use of the ->card_busy() op for SD cards. This uncovered that the ->card_busy() op in the Meson SDIO driver was never working right: while polling the busy status with ->card_busy() meson_mx_mmc_card_busy() reads only one of the two MESON_MX_SDIO_IRQC register values 0x1f001f10 or 0x1f003f10. This translates to "three out of four DAT lines are HIGH" and "all four DAT lines are HIGH", which is interpreted as "the card is busy". It turns out that no situation can be observed where all four DAT lines are LOW, meaning the card is not busy anymore. Upon further research the 3.10 vendor driver for this controller does not implement the ->card_busy() op. Remove the ->card_busy() op from the meson-mx-sdio driver since it is not working. At the time of writing this patch it is not clear what's needed to make the ->card_busy() implementation work with this specific controller hardware. For all use-cases which have previously worked the MMC_CAP_WAIT_WHILE_BUSY flag is now taking over, even if we don't have a ->card_busy() op anymore. Fixes: ed80a13b ("mmc: meson-mx-sdio: Add a driver for the Amlogic Meson8 and Meson8b SoCs") Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200416183513.993763-3-martin.blumenstingl@googlemail.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Martin Blumenstingl 提交于
The Meson SDIO controller uses the DAT0 lane for hardware busy detection. Set MMC_CAP_WAIT_WHILE_BUSY accordingly. This fixes the following error observed with Linux 5.7 (pre-rc-1): mmc1: Card stuck being busy! __mmc_poll_for_busy blk_update_request: I/O error, dev mmcblk1, sector 17111080 op 0x3:(DISCARD) flags 0x0 phys_seg 1 prio class 0 Fixes: ed80a13b ("mmc: meson-mx-sdio: Add a driver for the Amlogic Meson8 and Meson8b SoCs") Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200416183513.993763-2-martin.blumenstingl@googlemail.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 27 3月, 2020 2 次提交
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由 Tang Bin 提交于
In this function, the variable 'base' is already 'void __iomem *base', and the return function 'devm_platform_ioremap_resource()' also returns this type, so the mandatory definition here is redundant. Signed-off-by: NTang Bin <tangbin@cmss.chinamobile.com> Link: https://lore.kernel.org/r/20200327043639.6564-1-tangbin@cmss.chinamobile.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 yong mao 提交于
SDIO irq is not triggered by low level, but by falling edge in our previous IC. This mechanism only have one chance to catch the SDIO irq if a SDIO irq comes within the multiple block transmission. This SDIO irq may be easily lost, because falling edge appears only once within 2 clock after data transmission is completed. SDIO irq recheck mechanism will make sure all irqs can be processed correctly. Signed-off-by: NYong Mao <yong.mao@mediatek.com> Link: https://lore.kernel.org/r/1585299097-6897-2-git-send-email-yong.mao@mediatek.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 26 3月, 2020 1 次提交
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由 Ludovic Barre 提交于
The busyd0 line transition can be very fast. The busy request may be completed by busy_d0end, without waiting for the busy_d0 steps. Therefore, clear the busyd0end irq flag, even if no busy_status. Fixes: 0e68de6a ("mmc: mmci: sdmmc: add busy_complete callback") Cc: stable@vger.kernel.org Signed-off-by: NLudovic Barre <ludovic.barre@st.com> Link: https://lore.kernel.org/r/20200325143409.13005-2-ludovic.barre@st.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 25 3月, 2020 1 次提交
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由 Thomas Gleixner 提交于
The new macro set has a consistent namespace and uses C99 initializers instead of the grufty C89 ones. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NBorislav Petkov <bp@suse.de> Reviewed-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lkml.kernel.org/r/20200320131510.285691129@linutronix.de
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- 24 3月, 2020 21 次提交
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由 Masahiro Yamada 提交于
Use the FIELD_GET macro to get access to the register fields. Delete the shift macros. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Link: https://lore.kernel.org/r/20200312110050.21732-1-yamada.masahiro@socionext.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Cristian Birsan 提交于
The sdhci_at91_set_clks_presets() function is called multiple times at runtime and the messages are shown on the console. Display clk mul, gck rate and clk base for debug purpose only. Signed-off-by: NCristian Birsan <cristian.birsan@microchip.com> Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200312142904.232822-1-tudor.ambarus@microchip.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Nicolas Saenz Julienne 提交于
The controller needs a valid bus voltage in its power register regardless of whether an external regulator is taking care of the power supply. The sdhci core already provides a helper function for this, sdhci_set_power_and_bus_voltage(), so create a bcm2711 specific 'struct sdhci_ops' which makes use of it. Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200306174413.20634-10-nsaenzjulienne@suse.deSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Nicolas Saenz Julienne 提交于
The sdhci core provides a helper function with the same functionality as this controller's set_power() callback. Use it instead. Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200306174413.20634-8-nsaenzjulienne@suse.deSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Nicolas Saenz Julienne 提交于
The sdhci core provides a helper function with the same functionality as this controller's set_power() callback. Use it instead. Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200306174413.20634-5-nsaenzjulienne@suse.deSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Nicolas Saenz Julienne 提交于
The sdhci core provides a helper function with the same functionality as this controller's set_power() callback. Use it instead. Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200306174413.20634-4-nsaenzjulienne@suse.deSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Nicolas Saenz Julienne 提交于
The sdhci core provides a helper function with the same functionality as this controller's set_power() callback. Use it instead. Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200306174413.20634-3-nsaenzjulienne@suse.deSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Nicolas Saenz Julienne 提交于
Some controllers diverge from the standard way of setting power and need their bus voltage register to be configured regardless of the whether they use regulators. As this is a common pattern across sdhci hosts, create a helper function. Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200306174413.20634-2-nsaenzjulienne@suse.deSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Takashi Iwai 提交于
Since snprintf() returns the would-be-output size instead of the actual output size, the succeeding calls may go beyond the given buffer limit. Fix it by replacing with scnprintf(). Signed-off-by: NTakashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20200311080439.13928-1-tiwai@suse.deSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Sowjanya Komatineni 提交于
Tegra sdhci host supports HW busy detection of the device busy signaling over data0 lane. So, this patch enables host capability MMC_CAP_wAIT_WHILE_BUSY. Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1583941675-9884-2-git-send-email-skomatineni@nvidia.com [Ulf: Lumped together the caps assignments] Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Sowjanya Komatineni 提交于
Tegra host supports HW busy detection and timeouts based on the count programmed in SDHCI_TIMEOUT_CONTROL register and max busy timeout it supports is 11s in finite busy wait mode. Some operations like SLEEP_AWAKE, ERASE and flush cache through SWITCH commands take longer than 11s and Tegra host supports infinite HW busy wait mode where HW waits forever till the card is busy without HW timeout. This patch implements Tegra specific set_timeout sdhci_ops to allow switching between finite and infinite HW busy detection wait modes based on the device command expected operation time. Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1583941675-9884-1-git-send-email-skomatineni@nvidia.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Faiz Abbas 提交于
Add power management ops which save and restore the driver context and facilitate a system suspend and resume. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200305151228.24692-1-faiz_abbas@ti.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Wolfram Sang 提交于
After refactoring, 'ret' variable is superfluous. Remove it. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200213163715.8212-1-wsa+renesas@sang-engineering.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Geert Uytterhoeven 提交于
Use the existing BITS_PER_LONG helper definition instead of calculating this value. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20200302093534.9055-1-geert+renesas@glider.beSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Veerabhadrarao Badiganti 提交于
Update cqhci memory ioresource name from cqhci_mem to cqhci since suffix _mem is redundant. Only sdhci-msm driver is making use of this resource as of now. No other vendor's driver is using it. So this update shouldn't affect any other vendor's cqhci functionality. Signed-off-by: NVeerabhadrarao Badiganti <vbadigan@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1583328320-9981-1-git-send-email-vbadigan@codeaurora.orgSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Veerabhadrarao Badiganti 提交于
When SDHC gets reset (E.g. in runtime suspend path), CQE also gets reset and goes to disable state. But s/w state still points it as CQE is in enabled state. Since s/w and h/w states goes out of sync, it results in s/w request timeout for subsequent CQE requests. To synchronize CQE s/w and h/w state during SDHC reset, explicitly deactivate CQE just before SDHC reset. Signed-off-by: NVeerabhadrarao Badiganti <vbadigan@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/1583503724-13943-3-git-send-email-vbadigan@codeaurora.orgSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Host controllers can reset CQHCI either directly or as a consequence of host controller reset. Add cqhci_deactivate() which puts the CQHCI driver into a state that is consistent with that. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NVeerabhadrarao Badiganti <vbadigan@codeaurora.org> Link: https://lore.kernel.org/r/1583503724-13943-2-git-send-email-vbadigan@codeaurora.orgSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Gustavo A. R. Silva 提交于
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732 ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200226223125.GA20630@embeddedorSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
The Spreadtrum host controller supports HW busy detection for commands with R1B responses, but also for I/O operations. This means when the host gets a transfer complete event, that always indicates the busy signal is released. Let's inform the mmc core about this, via setting the corresponding MMC_CAP_WAIT_WHILE_BUSY flag, as to remove some redundant software busy polling. Signed-off-by: NBaolin Wang <baolin.wang7@gmail.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/96f16647f6a6e8cb058c44e46c61b122df027059.1582535202.git.baolin.wang7@gmail.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Haibo Chen 提交于
In some low power mode, SoC will lose the pin state, so need to restore the pin state when resume back. Signed-off-by: NHaibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/1582100757-20683-8-git-send-email-haibo.chen@nxp.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Haibo Chen 提交于
Currently, when use standard tuning, driver default disable DMA just before send tuning command. But on i.MX8 usdhc, this is not enough. Need also clear DMA_SEL. If not, once the DMA_SEL select AMDA2 before, even dma already disabled, when send tuning command, usdhc will still prefetch the ADMA script from wrong DMA address, then we will see IOMMU report some error which show lack of TLB mapping. Signed-off-by: NHaibo Chen <haibo.chen@nxp.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/1582100757-20683-7-git-send-email-haibo.chen@nxp.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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