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  1. 18 9月, 2020 2 次提交
  3. 04 9月, 2020 3 次提交
  5. 14 7月, 2020 1 次提交
  7. 30 6月, 2020 1 次提交
  9. 10 6月, 2020 1 次提交
  11. 29 5月, 2020 9 次提交
  13. 27 5月, 2020 1 次提交
  15. 13 5月, 2020 2 次提交
  17. 05 5月, 2020 10 次提交
  19. 14 3月, 2020 1 次提交
    • S
      iommu/amd: Fix IOMMU AVIC not properly update the is_run bit in IRTE · 730ad0ed
      由 Suravee Suthikulpanit 提交于 
      Commit b9c6ff94 ("iommu/amd: Re-factor guest virtual APIC
(de-)activation code") accidentally left out the ir_data pointer when
calling modity_irte_ga(), which causes the function amd_iommu_update_ga()
to return prematurely due to struct amd_ir_data.ref is NULL and
the "is_run" bit of IRTE does not get updated properly.

This results in bad I/O performance since IOMMU AVIC always generate GA Log
entry and notify IOMMU driver and KVM when it receives interrupt from the
PCI pass-through device instead of directly inject interrupt to the vCPU.

Fixes by passing ir_data when calling modify_irte_ga() as done previously.

Fixes: b9c6ff94 ("iommu/amd: Re-factor guest virtual APIC (de-)activation code")
Signed-off-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      730ad0ed
  21. 24 1月, 2020 1 次提交
  23. 23 12月, 2019 1 次提交
  25. 19 12月, 2019 1 次提交
  27. 30 10月, 2019 3 次提交
    • L
      iommu/amd: Support multiple PCI DMA aliases in IRQ Remapping · 3c124435
      由 Logan Gunthorpe 提交于 
      Non-Transparent Bridge (NTB) devices (among others) may have many DMA
aliases seeing the hardware will send requests with different device ids
depending on their origin across the bridged hardware.

See commit ad281ecf ("PCI: Add DMA alias quirk for Microsemi Switchtec
NTB") for more information on this.

The AMD IOMMU IRQ remapping functionality ignores all PCI aliases for
IRQs so if devices send an interrupt from one of their aliases they
will be blocked on AMD hardware with the IOMMU enabled.

To fix this, ensure IRQ remapping is enabled for all aliases with
MSI interrupts.

This is analogous to the functionality added to the Intel IRQ remapping
code in commit 3f0c625c ("iommu/vt-d: Allow interrupts from the entire
bus for aliased devices")
Signed-off-by: NLogan Gunthorpe <logang@deltatee.com>
Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      3c124435
    • L
      iommu/amd: Support multiple PCI DMA aliases in device table · 3332364e
      由 Logan Gunthorpe 提交于 
      Non-Transparent Bridge (NTB) devices (among others) may have many DMA
aliases seeing the hardware will send requests with different device ids
depending on their origin across the bridged hardware.

See commit ad281ecf ("PCI: Add DMA alias quirk for Microsemi
Switchtec NTB") for more information on this.

The AMD IOMMU ignores all the PCI aliases except the last one so DMA
transfers from these aliases will be blocked on AMD hardware with the
IOMMU enabled.

To fix this, ensure the DTEs are cloned for every PCI alias. This is
done by copying the DTE data for each alias as well as the IVRS alias
every time it is changed.
Signed-off-by: NLogan Gunthorpe <logang@deltatee.com>
Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      3332364e
    • D
      iommu/amd: Do not re-fetch iommu->cmd_buf_tail · a5bbbf37
      由 Denys Vlasenko 提交于 
      The compiler is not smart enough to realize that iommu->cmd_buf_tail
can't be modified across memcpy:

41 8b 45 74          mov    0x74(%r13),%eax   # iommu->cmd_buf_tail
44 8d 78 10          lea    0x10(%rax),%r15d  # += sizeof(*cmd)
41 81 e7 ff 1f 00 00 and    $0x1fff,%r15d     # %= CMD_BUFFER_SIZE
49 03 45 68          add    0x68(%r13),%rax   # target = iommu->cmd_buf + iommu->cmd_buf_tail
45 89 7d 74          mov    %r15d,0x74(%r13)  # store to iommu->cmd_buf_tail
49 8b 34 24          mov    (%r12),%rsi       # memcpy
49 8b 7c 24 08       mov    0x8(%r12),%rdi    # memcpy
48 89 30             mov    %rsi,(%rax)       # memcpy
48 89 78 08          mov    %rdi,0x8(%rax)    # memcpy
49 8b 55 38          mov    0x38(%r13),%rdx   # iommu->mmio_base
41 8b 45 74          mov    0x74(%r13),%eax   # redundant load of iommu->cmd_buf_tail
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
89 82 08 20 00 00    mov    %eax,0x2008(%rdx) # writel

CC: Tom Lendacky <thomas.lendacky@amd.com>
CC: Joerg Roedel <jroedel@suse.de>
CC: linux-kernel@vger.kernel.org
Signed-off-by: NDenys Vlasenko <dvlasenk@redhat.com>
Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      a5bbbf37
  29. 18 10月, 2019 2 次提交
  31. 15 10月, 2019 1 次提交