- 02 3月, 2018 1 次提交
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由 Tero Kristo 提交于
The EMIF instance on am33xx supports interrupts, so add the info for completeness sake. Right now, the driver does not use this for anything, but it is possible it would be used in future. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 3月, 2018 2 次提交
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由 Adam Ford 提交于
Since I2C1 and I2C4 have explicit pinmuxing set, let's be on the safe side and set the pin muxing for I2C2 and I2C3. Signed-off-by: NAdam Ford <aford173@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Adam Ford 提交于
Since I2C1 and I2C4 have explicit pinmuxing set, let's be on the safe side and set the pin muxing for I2C2 and I2C3. Signed-off-by: NAdam Ford <aford173@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 28 2月, 2018 9 次提交
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由 Dave Gerlach 提交于
We can never idle the l3_main hwmod so mark the omap_l3_noc node with ti,no-idle. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
We can never idle the emif hwmod from within the HLOS so mark the emif node with ti,no-idle. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
We can never idle the emif hwmod from within the HLOS so mark the emif node with ti,no-idle. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Add soc node for am4372 with pm-sram phandle to both pm-sram-code and pm-sram-data regions. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Add a phandle to point to both the pm-sram-code and pm-sram-data nodes so that the pm code can locate the sram regions needed to copy low level PM code. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Now that we will use ti-emif-sram driver for am4372 PM, update the emif DT node with the required sram property. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Now that we will use ti-emif-sram driver for am335x PM, update the emif DT node with the required sram property. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Add a 'pm_sram_code' reserved region to the ocmcram node to be exposed by the mmio-sram driver as a pool but also mark it protect-exec so that it can run code copied to it using sram_exec_copy. Add another 'pm_sram_data' reserved region to the ocmcram node to act as the data space for any code running from the 'pm_sram_code' region that is exposed as a regular pool. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Add a 'pm_sram_code' reserved region to the ocmcram node to be exposed by the mmio-sram driver as a pool but also mark it protect-exec so that it can run code copied to it using sram_exec_copy. Add another 'pm_sram_data' reserved region to the ocmcram node to act as the data space for any code running from the 'pm_sram_code' region that is exposed as a regular pool. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 2月, 2018 5 次提交
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由 Viresh Kumar 提交于
The "cooling-min-level" and "cooling-max-level" properties are not parsed by any part of the kernel currently and the max cooling state of a CPU cooling device is found by referring to the cpufreq table instead. Remove the unused properties from the CPU nodes. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sebastian Reichel 提交于
Update the Droid 4 devicetree to properly describe the reset GPIO. Also rename the node to touchscreen instead of tsp, which seems to be commonly used for touchscreens. Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Felix Brack 提交于
This patch adds support for the PDU001 board from EETS GmbH. The board is built around the byteENGINE module AM335X from bytes at work AG which in turn is built around a Sitara SoC from TI. Signed-off-by: NFelix Brack <fb@ltec.ch> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Bartosz Golaszewski 提交于
Using 'at' as the <manufacturer> part of the compatible string is now deprecated. Use a correct string: 'atmel,<model>'. Signed-off-by: NBartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Pavel Machek 提交于
This adds dts support for magnetometer on Nokia N9. Signed-off-by: NPavel Machek <pavel@ucw.cz> [tony@atomide.com: fix missing bracket] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 2月, 2018 5 次提交
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由 Clement Courbet 提交于
We've measured that we spend ~0.6% of sys cpu time in cpumask_next_and(). It's essentially a joined iteration in search for a non-zero bit, which is currently implemented as a lookup join (find a nonzero bit on the lhs, lookup the rhs to see if it's set there). Implement a direct join (find a nonzero bit on the incrementally built join). Also add generic bitmap benchmarks in the new `test_find_bit` module for new function (see `find_next_and_bit` in [2] and [3] below). For cpumask_next_and, direct benchmarking shows that it's 1.17x to 14x faster with a geometric mean of 2.1 on 32 CPUs [1]. No impact on memory usage. Note that on Arm, the new pure-C implementation still outperforms the old one that uses a mix of C and asm (`find_next_bit`) [3]. [1] Approximate benchmark code: ``` unsigned long src1p[nr_cpumask_longs] = {pattern1}; unsigned long src2p[nr_cpumask_longs] = {pattern2}; for (/*a bunch of repetitions*/) { for (int n = -1; n <= nr_cpu_ids; ++n) { asm volatile("" : "+rm"(src1p)); // prevent any optimization asm volatile("" : "+rm"(src2p)); unsigned long result = cpumask_next_and(n, src1p, src2p); asm volatile("" : "+rm"(result)); } } ``` Results: pattern1 pattern2 time_before/time_after 0x0000ffff 0x0000ffff 1.65 0x0000ffff 0x00005555 2.24 0x0000ffff 0x00001111 2.94 0x0000ffff 0x00000000 14.0 0x00005555 0x0000ffff 1.67 0x00005555 0x00005555 1.71 0x00005555 0x00001111 1.90 0x00005555 0x00000000 6.58 0x00001111 0x0000ffff 1.46 0x00001111 0x00005555 1.49 0x00001111 0x00001111 1.45 0x00001111 0x00000000 3.10 0x00000000 0x0000ffff 1.18 0x00000000 0x00005555 1.18 0x00000000 0x00001111 1.17 0x00000000 0x00000000 1.25 ----------------------------- geo.mean 2.06 [2] test_find_next_bit, X86 (skylake) [ 3913.477422] Start testing find_bit() with random-filled bitmap [ 3913.477847] find_next_bit: 160868 cycles, 16484 iterations [ 3913.477933] find_next_zero_bit: 169542 cycles, 16285 iterations [ 3913.478036] find_last_bit: 201638 cycles, 16483 iterations [ 3913.480214] find_first_bit: 4353244 cycles, 16484 iterations [ 3913.480216] Start testing find_next_and_bit() with random-filled bitmap [ 3913.481074] find_next_and_bit: 89604 cycles, 8216 iterations [ 3913.481075] Start testing find_bit() with sparse bitmap [ 3913.481078] find_next_bit: 2536 cycles, 66 iterations [ 3913.481252] find_next_zero_bit: 344404 cycles, 32703 iterations [ 3913.481255] find_last_bit: 2006 cycles, 66 iterations [ 3913.481265] find_first_bit: 17488 cycles, 66 iterations [ 3913.481266] Start testing find_next_and_bit() with sparse bitmap [ 3913.481272] find_next_and_bit: 764 cycles, 1 iterations [3] test_find_next_bit, arm (v7 odroid XU3). [ 267.206928] Start testing find_bit() with random-filled bitmap [ 267.214752] find_next_bit: 4474 cycles, 16419 iterations [ 267.221850] find_next_zero_bit: 5976 cycles, 16350 iterations [ 267.229294] find_last_bit: 4209 cycles, 16419 iterations [ 267.279131] find_first_bit: 1032991 cycles, 16420 iterations [ 267.286265] Start testing find_next_and_bit() with random-filled bitmap [ 267.302386] find_next_and_bit: 2290 cycles, 8140 iterations [ 267.309422] Start testing find_bit() with sparse bitmap [ 267.316054] find_next_bit: 191 cycles, 66 iterations [ 267.322726] find_next_zero_bit: 8758 cycles, 32703 iterations [ 267.329803] find_last_bit: 84 cycles, 66 iterations [ 267.336169] find_first_bit: 4118 cycles, 66 iterations [ 267.342627] Start testing find_next_and_bit() with sparse bitmap [ 267.356919] find_next_and_bit: 91 cycles, 1 iterations [courbet@google.com: v6] Link: http://lkml.kernel.org/r/20171129095715.23430-1-courbet@google.com [geert@linux-m68k.org: m68k/bitops: always include <asm-generic/bitops/find.h>] Link: http://lkml.kernel.org/r/1512556816-28627-1-git-send-email-geert@linux-m68k.org Link: http://lkml.kernel.org/r/20171128131334.23491-1-courbet@google.comSigned-off-by: NClement Courbet <courbet@google.com> Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Cc: Yury Norov <ynorov@caviumnetworks.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Marc Zyngier 提交于
A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the host workaround on every guest exit. Tested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Marc Zyngier 提交于
The new SMC Calling Convention (v1.1) allows for a reduced overhead when calling into the firmware, and provides a new feature discovery mechanism. Make it visible to KVM guests. Tested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Marc Zyngier 提交于
As we're about to update the PSCI support, and because I'm lazy, let's move the PSCI include file to include/kvm so that both ARM architectures can find it. Acked-by: NChristoffer Dall <christoffer.dall@linaro.org> Tested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Marc Zyngier 提交于
KVM doesn't follow the SMCCC when it comes to unimplemented calls, and inject an UNDEF instead of returning an error. Since firmware calls are now used for security mitigation, they are becoming more common, and the undef is counter productive. Instead, let's follow the SMCCC which states that -1 must be returned to the caller when getting an unknown function number. Cc: <stable@vger.kernel.org> Tested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 02 2月, 2018 1 次提交
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由 Ulf Magnusson 提交于
Blank help texts are probably either a typo, a Kconfig misunderstanding, or some kind of half-committing to adding a help text (in which case a TODO comment would be clearer, if the help text really can't be added right away). Best to remove them, IMO. Signed-off-by: NUlf Magnusson <ulfalizer@gmail.com> Acked-by: NRandy Dunlap <rdunlap@infradead.org> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 01 2月, 2018 1 次提交
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由 Kirill A. Shutemov 提交于
ARM LPAE doesn't have hardware dirty/accessed bits. generic_pmdp_establish() is the right implementation of pmdp_establish for this case. Link: http://lkml.kernel.org/r/20171213105756.69879-4-kirill.shutemov@linux.intel.comSigned-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Michal Hocko <mhocko@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 27 1月, 2018 1 次提交
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由 Daniel Borkmann 提交于
Since we've changed div/mod exception handling for src_reg in eBPF verifier itself, remove the leftovers from arm32 JIT. Signed-off-by: NDaniel Borkmann <daniel@iogearbox.net> Cc: Shubham Bansal <illusionist.neo@gmail.com> Signed-off-by: NAlexei Starovoitov <ast@kernel.org>
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- 25 1月, 2018 1 次提交
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由 Benjamin Gilbert 提交于
It doesn't actually do anything. Merge its help text into EXTRA_FIRMWARE. Fixes: 5620a0d1 ("firmware: delete in-kernel firmware") Fixes: 0946b2fb ("firmware: cleanup FIRMWARE_IN_KERNEL message") Signed-off-by: NBenjamin Gilbert <benjamin.gilbert@coreos.com> Signed-off-by: NRobin H. Johnson <robbat2@gentoo.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 24 1月, 2018 5 次提交
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由 Marc Zyngier 提交于
CONFIG_IRQ_DOMAIN_DEBUG is similar to CONFIG_GENERIC_IRQ_DEBUGFS, just with less information. Spring cleanup time. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Yang Shunyong <shunyong.yang@hxt-semitech.com> Link: https://lkml.kernel.org/r/20180117142647.23622-1-marc.zyngier@arm.com
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由 Sebastian Reichel 提交于
This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors. The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b450v3# lspci -tv -[0000:00]---00.0-[01]----00.0 Intel Corporation I210 Gigabit Network Connection root@b450v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sebastian Reichel 提交于
This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors. The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b650v3# lspci -tv -[0000:00]---00.0-[01]----00.0 Intel Corporation I210 Gigabit Network Connection root@b650v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sebastian Reichel 提交于
This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors ("ID", "IX", "ePort 1", "ePort 2"). The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b850v3# lspci -tv -[0000:00]---00.0-[01]----00.0-[02-05]--+-01.0-[03]----00.0 Intel Corporation I210 Gigabit Network Connection +-02.0-[04]----00.0 Intel Corporation I210 Gigabit Network Connection \-03.0-[05]-- root@b850v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:01.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:02.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:03.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) 04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sebastian Reichel 提交于
B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to communicate with a Marvell switch. On all devices the switch is connected to a PCI based network card, which needs to be referenced by DT, so this also adds the common PCI root node. Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 1月, 2018 4 次提交
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由 Luis de Bethencourt 提交于
The trailing semicolon is an empty statement that does no operation. Removing it since it doesn't do anything. Signed-off-by: NLuis de Bethencourt <luisbg@kernel.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Tim Sander 提交于
Add the reset signals for the i2c controllers on Cyclone5-based SoCFPGA boards to the dtsi. Signed-off-by: NTim Sander <tim.sander@hbm.com> Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Dinh Nguyen 提交于
The USB host functionality on the Arria10 needs the disable-over-current property. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Eric W. Biederman 提交于
There are so many places that build struct siginfo by hand that at least one of them is bound to get it wrong. A handful of cases in the kernel arguably did just that when using the errno field of siginfo to pass no errno values to userspace. The usage is limited to a single si_code so at least does not mess up anything else. Encapsulate this questionable pattern in a helper function so that the userspace ABI is preserved. Update all of the places that use this pattern to use the new helper function. Signed-off-by: N"Eric W. Biederman" <ebiederm@xmission.com>
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- 22 1月, 2018 2 次提交
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由 Arnd Bergmann 提交于
Older compilers choose not to inline _setup_clkctrl_provider(), leading to a harmless warning: WARNING: vmlinux.o(.text+0x27b34): Section mismatch in reference from the function _setup_clkctrl_provider() to the function .init.text:memblock_virt_alloc_try_nid() The function _setup_clkctrl_provider() references the function __init memblock_virt_alloc_try_nid(). This is often because _setup_clkctrl_provider lacks a __init annotation or the annotation of memblock_virt_alloc_try_nid is wrong. This annotates it as __init as well, which lets the linker see that it is actually correct. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Arnd Bergmann 提交于
Without this tag, we get a build warning: WARNING: modpost: missing MODULE_LICENSE() in arch/arm/mach-pxa/tosa-bt.o For completeness, I'm also adding author and description fields. Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 21 1月, 2018 3 次提交
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由 Nicolas Pitre 提交于
The __memzero assembly code is almost identical to memset's except for two orr instructions. The runtime performance of __memset(p, n) and memset(p, 0, n) is accordingly almost identical. However, the memset() macro used to guard against a zero length and to call __memzero at compile time when the fill value is a constant zero interferes with compiler optimizations. Arnd found tha the test against a zero length brings up some new warnings with gcc v8: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82103 And successively rremoving the test against a zero length and the call to __memzero optimization produces the following kernel sizes for defconfig with gcc 6: text data bss dec hex filename 12248142 6278960 413588 18940690 1210312 vmlinux.orig 12244474 6278960 413588 18937022 120f4be vmlinux.no_zero_test 12239160 6278960 413588 18931708 120dffc vmlinux.no_memzero So it is probably not worth keeping __memzero around given that the compiler can do a better job at inlining trivial memset(p,0,n) on its own. And the memset code already handles a zero length just fine. Suggested-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NNicolas Pitre <nico@linaro.org> Acked-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
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由 Arnd Bergmann 提交于
Discarding the memblock arrays usually works, but causes problems with kexec, as pointed out by this kbuild warning: WARNING: vmlinux.o(.text+0x7c60): Section mismatch in reference from the function machine_kexec_prepare() to the function .meminit.text:memblock_is_region_memory() This lets us keep the memblock structures around whenever kexec is enabled, but otherwise still drops them. Fixes: cf1b0990 ("ARM: 8693/1: discard memblock arrays when possible") Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
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由 Arnd Bergmann 提交于
Without this tag, we get a build warning: WARNING: modpost: missing MODULE_LICENSE() in arch/arm/common/bL_switcher_dummy_if.o For completeness, I'm also adding author and description fields. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
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