1. 29 4月, 2020 4 次提交
  2. 27 4月, 2020 4 次提交
  3. 26 4月, 2020 3 次提交
  4. 25 4月, 2020 5 次提交
  5. 24 4月, 2020 3 次提交
    • J
      mac80211: populate debugfs only after cfg80211 init · 6cb5f3ea
      Johannes Berg 提交于
      When fixing the initialization race, we neglected to account for
      the fact that debugfs is initialized in wiphy_register(), and
      some debugfs things went missing (or rather were rerooted to the
      global debugfs root).
      
      Fix this by adding debugfs entries only after wiphy_register().
      This requires some changes in the rate control code since it
      currently adds debugfs at alloc time, which can no longer be
      done after the reordering.
      Reported-by: NJouni Malinen <j@w1.fi>
      Reported-by: Nkernel test robot <rong.a.chen@intel.com>
      Reported-by: NHauke Mehrtens <hauke@hauke-m.de>
      Reported-by: NFelix Fietkau <nbd@nbd.name>
      Cc: stable@vger.kernel.org
      Fixes: 52e04b4c ("mac80211: fix race in ieee80211_register_hw()")
      Signed-off-by: NJohannes Berg <johannes.berg@intel.com>
      Acked-by: NSumit Garg <sumit.garg@linaro.org>
      Link: https://lore.kernel.org/r/20200423111344.0e00d3346f12.Iadc76a03a55093d94391fc672e996a458702875d@changeidSigned-off-by: NJohannes Berg <johannes.berg@intel.com>
      6cb5f3ea
    • E
      net: napi: add hard irqs deferral feature · 6f8b12d6
      Eric Dumazet 提交于
      Back in commit 3b47d303 ("net: gro: add a per device gro flush timer")
      we added the ability to arm one high resolution timer, that we used
      to keep not-complete packets in GRO engine a bit longer, hoping that further
      frames might be added to them.
      
      Since then, we added the napi_complete_done() interface, and commit
      364b6055 ("net: busy-poll: return busypolling status to drivers")
      allowed drivers to avoid re-arming NIC interrupts if we made a promise
      that their NAPI poll() handler would be called in the near future.
      
      This infrastructure can be leveraged, thanks to a new device parameter,
      which allows to arm the napi hrtimer, instead of re-arming the device
      hard IRQ.
      
      We have noticed that on some servers with 32 RX queues or more, the chit-chat
      between the NIC and the host caused by IRQ delivery and re-arming could hurt
      throughput by ~20% on 100Gbit NIC.
      
      In contrast, hrtimers are using local (percpu) resources and might have lower
      cost.
      
      The new tunable, named napi_defer_hard_irqs, is placed in the same hierarchy
      than gro_flush_timeout (/sys/class/net/ethX/)
      
      By default, both gro_flush_timeout and napi_defer_hard_irqs are zero.
      
      This patch does not change the prior behavior of gro_flush_timeout
      if used alone : NIC hard irqs should be rearmed as before.
      
      One concrete usage can be :
      
      echo 20000 >/sys/class/net/eth1/gro_flush_timeout
      echo 10 >/sys/class/net/eth1/napi_defer_hard_irqs
      
      If at least one packet is retired, then we will reset napi counter
      to 10 (napi_defer_hard_irqs), ensuring at least 10 periodic scans
      of the queue.
      
      On busy queues, this should avoid NIC hard IRQ, while before this patch IRQ
      avoidance was only possible if napi->poll() was exhausting its budget
      and not call napi_complete_done().
      
      This feature also can be used to work around some non-optimal NIC irq
      coalescing strategies.
      
      Having the ability to insert XX usec delays between each napi->poll()
      can increase cache efficiency, since we increase batch sizes.
      
      It also keeps serving cpus not idle too long, reducing tail latencies.
      Co-developed-by: NLuigi Rizzo <lrizzo@google.com>
      Signed-off-by: NEric Dumazet <edumazet@google.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6f8b12d6
    • F
      ipv6: Honor all IPv6 PIO Valid Lifetime values · b75326c2
      Fernando Gont 提交于
      RFC4862 5.5.3 e) prevents received Router Advertisements from reducing
      the Valid Lifetime of configured addresses to less than two hours, thus
      preventing hosts from reacting to the information provided by a router
      that has positive knowledge that a prefix has become invalid.
      
      This patch makes hosts honor all Valid Lifetime values, as per
      draft-gont-6man-slaac-renum-06, Section 4.2. This is meant to help
      mitigate the problem discussed in draft-ietf-v6ops-slaac-renum.
      
      Note: Attacks aiming at disabling an advertised prefix via a Valid
      Lifetime of 0 are not really more harmful than other attacks
      that can be performed via forged RA messages, such as those
      aiming at completely disabling a next-hop router via an RA that
      advertises a Router Lifetime of 0, or performing a Denial of
      Service (DoS) attack by advertising illegitimate prefixes via
      forged PIOs.  In scenarios where RA-based attacks are of concern,
      proper mitigations such as RA-Guard [RFC6105] [RFC7113] should
      be implemented.
      Signed-off-by: NFernando Gont <fgont@si6networks.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b75326c2
  6. 23 4月, 2020 9 次提交
  7. 22 4月, 2020 8 次提交
    • J
      pnp: Use list_for_each_entry() instead of open coding · 01b2bafe
      Jason Gunthorpe 提交于
      Aside from good practice, this avoids a warning from gcc 10:
      
      ./include/linux/kernel.h:997:3: warning: array subscript -31 is outside array bounds of ‘struct list_head[1]’ [-Warray-bounds]
        997 |  ((type *)(__mptr - offsetof(type, member))); })
            |  ~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      ./include/linux/list.h:493:2: note: in expansion of macro ‘container_of’
        493 |  container_of(ptr, type, member)
            |  ^~~~~~~~~~~~
      ./include/linux/pnp.h:275:30: note: in expansion of macro ‘list_entry’
        275 | #define global_to_pnp_dev(n) list_entry(n, struct pnp_dev, global_list)
            |                              ^~~~~~~~~~
      ./include/linux/pnp.h:281:11: note: in expansion of macro ‘global_to_pnp_dev’
        281 |  (dev) != global_to_pnp_dev(&pnp_global); \
            |           ^~~~~~~~~~~~~~~~~
      arch/x86/kernel/rtc.c:189:2: note: in expansion of macro ‘pnp_for_each_dev’
        189 |  pnp_for_each_dev(dev) {
      
      Because the common code doesn't cast the starting list_head to the
      containing struct.
      Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>
      [ rjw: Whitespace adjustments ]
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      01b2bafe
    • V
      net: stmmac: Enable SERDES power up/down sequence · b9663b7c
      Voon Weifeng 提交于
      This patch is to enable Intel SERDES power up/down sequence. The SERDES
      converts 8/10 bits data to SGMII signal. Below is an example of
      HW configuration for SGMII mode. The SERDES is located in the PHY IF
      in the diagram below.
      
      <-----------------GBE Controller---------->|<--External PHY chip-->
      +----------+         +----+            +---+           +----------+
      |   EQoS   | <-GMII->| DW | < ------ > |PHY| <-SGMII-> | External |
      |   MAC    |         |xPCS|            |IF |           | PHY      |
      +----------+         +----+            +---+           +----------+
             ^               ^                 ^                ^
             |               |                 |                |
             +---------------------MDIO-------------------------+
      
      PHY IF configuration and status registers are accessible through
      mdio address 0x15 which is defined as mdio_adhoc_addr. During D0,
      The driver will need to power up PHY IF by changing the power state
      to P0. Likewise, for D3, the driver sets PHY IF power state to P3.
      Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com>
      Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b9663b7c
    • Y
      net: mscc: ocelot: support 4 PTP programmable pins · cc2d87bb
      Yangbo Lu 提交于
      Support 4 PTP programmable pins with only PTP_PF_PEROUT function
      for now. The PTP_PF_EXTTS function will be supported in the
      future, and it should be implemented separately for Felix and
      Ocelot, because of different hardware interrupt implementation
      in them.
      
      Since the hardware is not able to support absolute start time,
      the periodic clock request only allows start time 0 0. But nsec
      could be accepted for PPS case for phase adjustment.
      Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cc2d87bb
    • Y
      net: mscc: ocelot: add wave programming registers definitions · 94aca082
      Yangbo Lu 提交于
      Add wave programming registers definitions for Ocelot platforms.
      Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      94aca082
    • Y
      net: mscc: ocelot: redefine PTP pins · 3007bc73
      Yangbo Lu 提交于
      There are 5 PTP_PINS register groups on Ocelot switch.
      Except the one used for TOD operations, there are still
      4 register groups for programmable pins. So redefine the
      4 programmable pins.
      Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3007bc73
    • Y
      net: mscc: ocelot: move ocelot ptp clock code out of ocelot.c · 2b49d128
      Yangbo Lu 提交于
      The Ocelot PTP clock driver had been embedded into ocelot.c driver.
      It had supported basic gettime64/settime64/adjtime/adjfine functions
      by now which were used by both Ocelot switch and Felix switch.
      
      This patch is to move current ptp clock code out of ocelot.c driver
      maintaining as a single ocelot_ptp.c.
      For futher new features implementation, the common code could be put
      in ocelot_ptp.c and the switch specific code should be in specific
      switch driver. The interrupt implementation in SoC is different
      between Ocelot and Felix.
      Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2b49d128
    • L
      kernel/module: Hide vermagic header file from general use · 51161bfc
      Leon Romanovsky 提交于
      VERMAGIC* definitions are not supposed to be used by the drivers,
      see this [1] bug report, so introduce special define to guard inclusion
      of this header file and define it in kernel/modules.h and in internal
      script that generates *.mod.c files.
      
      In-tree module build:
      ➜  kernel git:(vermagic) ✗ make clean
      ➜  kernel git:(vermagic) ✗ make M=drivers/infiniband/hw/mlx5
      ➜  kernel git:(vermagic) ✗ modinfo drivers/infiniband/hw/mlx5/mlx5_ib.ko
      filename:	/images/leonro/src/kernel/drivers/infiniband/hw/mlx5/mlx5_ib.ko
      <...>
      vermagic:       5.6.0+ SMP mod_unload modversions
      
      Out-of-tree module build:
      ➜  mlx5 make -C /images/leonro/src/kernel clean M=/tmp/mlx5
      ➜  mlx5 make -C /images/leonro/src/kernel M=/tmp/mlx5
      ➜  mlx5 modinfo /tmp/mlx5/mlx5_ib.ko
      filename:       /tmp/mlx5/mlx5_ib.ko
      <...>
      vermagic:       5.6.0+ SMP mod_unload modversions
      
      [1] https://lore.kernel.org/lkml/20200411155623.GA22175@zn.tnicReported-by: NBorislav Petkov <bp@suse.de>
      Acked-by: NBorislav Petkov <bp@suse.de>
      Acked-by: NJessica Yu <jeyu@kernel.org>
      Co-developed-by: NMasahiro Yamada <masahiroy@kernel.org>
      Signed-off-by: NMasahiro Yamada <masahiroy@kernel.org>
      Signed-off-by: NLeon Romanovsky <leonro@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      51161bfc
    • J
      vmalloc: fix remap_vmalloc_range() bounds checks · bdebd6a2
      Jann Horn 提交于
      remap_vmalloc_range() has had various issues with the bounds checks it
      promises to perform ("This function checks that addr is a valid
      vmalloc'ed area, and that it is big enough to cover the vma") over time,
      e.g.:
      
       - not detecting pgoff<<PAGE_SHIFT overflow
      
       - not detecting (pgoff<<PAGE_SHIFT)+usize overflow
      
       - not checking whether addr and addr+(pgoff<<PAGE_SHIFT) are the same
         vmalloc allocation
      
       - comparing a potentially wildly out-of-bounds pointer with the end of
         the vmalloc region
      
      In particular, since commit fc970227 ("bpf: Add mmap() support for
      BPF_MAP_TYPE_ARRAY"), unprivileged users can cause kernel null pointer
      dereferences by calling mmap() on a BPF map with a size that is bigger
      than the distance from the start of the BPF map to the end of the
      address space.
      
      This could theoretically be used as a kernel ASLR bypass, by using
      whether mmap() with a given offset oopses or returns an error code to
      perform a binary search over the possible address range.
      
      To allow remap_vmalloc_range_partial() to verify that addr and
      addr+(pgoff<<PAGE_SHIFT) are in the same vmalloc region, pass the offset
      to remap_vmalloc_range_partial() instead of adding it to the pointer in
      remap_vmalloc_range().
      
      In remap_vmalloc_range_partial(), fix the check against
      get_vm_area_size() by using size comparisons instead of pointer
      comparisons, and add checks for pgoff.
      
      Fixes: 83342314 ("[PATCH] mm: introduce remap_vmalloc_range()")
      Signed-off-by: NJann Horn <jannh@google.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Cc: stable@vger.kernel.org
      Cc: Alexei Starovoitov <ast@kernel.org>
      Cc: Daniel Borkmann <daniel@iogearbox.net>
      Cc: Martin KaFai Lau <kafai@fb.com>
      Cc: Song Liu <songliubraving@fb.com>
      Cc: Yonghong Song <yhs@fb.com>
      Cc: Andrii Nakryiko <andriin@fb.com>
      Cc: John Fastabend <john.fastabend@gmail.com>
      Cc: KP Singh <kpsingh@chromium.org>
      Link: http://lkml.kernel.org/r/20200415222312.236431-1-jannh@google.comSigned-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      bdebd6a2
  8. 21 4月, 2020 4 次提交