1. 18 8月, 2009 5 次提交
    • I
      perf tools: Remove obsolete defines · 1f18345b
      Ingo Molnar 提交于
      The _XOPEN_SOURCE* defines are not really needed on Linux and
      it's not like we'll port this to AIX ;-)
      
      The define also broke the build with gcc 4.4.1:
      
       CC util/trace-event-parse.o
       In file included from util/trace-event-parse.c:32:
       util/util.h:43:1: error: "_XOPEN_SOURCE" redefined
      
      So remove them.
      
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Mike Galbraith <efault@gmx.de>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      LKML-Reference: <new-submission>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1f18345b
    • I
      Merge branch 'master' of... · 8178d000
      Ingo Molnar 提交于
      Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/perfcounters into perfcounters/core
      8178d000
    • P
      perf_counter: powerpc: Add callchain support · 20002ded
      Paul Mackerras 提交于
      This adds support for tracing callchains for powerpc, both 32-bit
      and 64-bit, and both in the kernel and userspace, from PMU interrupt
      context.
      
      The first three entries stored for each callchain are the NIP (next
      instruction pointer), LR (link register), and the contents of the LR
      save area in the second stack frame (the first is ignored because the
      ABI convention on powerpc is that functions save their return address
      in their caller's stack frame).  Because leaf functions don't have to
      save their return address (LR value) and don't have to establish a
      stack frame, it's possible for either or both of LR and the second
      stack frame's LR save area to have valid return addresses in them.
      This is basically impossible to disambiguate without either reading
      the code or looking at auxiliary information such as CFI tables.
      Since we don't want to do either of those things at interrupt time,
      we store both LR and the second stack frame's LR save area.
      
      Once we get past the second stack frame, there is no ambiguity; all
      return addresses we get are reliable.
      
      For kernel traces, we check whether they are valid kernel instruction
      addresses and store zero instead if they are not (rather than
      omitting them, which would make it impossible for userspace to know
      which was which).  We also store zero instead of the second stack
      frame's LR save area value if it is the same as LR.
      
      For kernel traces, we check for interrupt frames, and for user traces,
      we check for signal frames.  In each case, since we're starting a new
      trace, we store a PERF_CONTEXT_KERNEL/USER marker so that userspace
      knows that the next three entries are NIP, LR and the second stack frame
      for the interrupted context.
      
      We read user memory with __get_user_inatomic.  On 64-bit, if this
      PMU interrupt occurred while interrupts are soft-disabled, and
      there is no MMU hash table entry for the page, we will get an
      -EFAULT return from __get_user_inatomic even if there is a valid
      Linux PTE for the page, since hash_page isn't reentrant.  Thus we
      have code here to read the Linux PTE and access the page via the
      kernel linear mapping.  Since 64-bit doesn't use (or need) highmem
      there is no need to do kmap_atomic.  On 32-bit, we don't do soft
      interrupt disabling, so this complication doesn't occur and there
      is no need to fall back to reading the Linux PTE, since hash_page
      (or the TLB miss handler) will get called automatically if necessary.
      
      Note that we cannot get PMU interrupts in the interval during
      context switch between switch_mm (which switches the user address
      space) and switch_to (which actually changes current to the new
      process).  On 64-bit this is because interrupts are hard-disabled
      in switch_mm and stay hard-disabled until they are soft-enabled
      later, after switch_to has returned.  So there is no possibility
      of trying to do a user stack trace when the user address space is
      not current's address space.
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      20002ded
    • P
      powerpc: Allow perf_counters to access user memory at interrupt time · 9c1e1052
      Paul Mackerras 提交于
      This provides a mechanism to allow the perf_counters code to access
      user memory in a PMU interrupt routine.  Such an access can cause
      various kinds of interrupt: SLB miss, MMU hash table miss, segment
      table miss, or TLB miss, depending on the processor.  This commit
      only deals with 64-bit classic/server processors, which use an MMU
      hash table.  32-bit processors are already able to access user memory
      at interrupt time.  Since we don't soft-disable on 32-bit, we avoid
      the possibility of reentering hash_page or the TLB miss handlers,
      since they run with interrupts disabled.
      
      On 64-bit processors, an SLB miss interrupt on a user address will
      update the slb_cache and slb_cache_ptr fields in the paca.  This is
      OK except in the case where a PMU interrupt occurs in switch_slb,
      which also accesses those fields.  To prevent this, we hard-disable
      interrupts in switch_slb.  Interrupts are already soft-disabled at
      this point, and will get hard-enabled when they get soft-enabled
      later.
      
      This also reworks slb_flush_and_rebolt: to avoid hard-disabling twice,
      and to make sure that it clears the slb_cache_ptr when called from
      other callers than switch_slb, the existing routine is renamed to
      __slb_flush_and_rebolt, which is called by switch_slb and the new
      version of slb_flush_and_rebolt.
      
      Similarly, switch_stab (used on POWER3 and RS64 processors) gets a
      hard_irq_disable() to protect the per-cpu variables used there and
      in ste_allocate.
      
      If a MMU hashtable miss interrupt occurs, normally we would call
      hash_page to look up the Linux PTE for the address and create a HPTE.
      However, hash_page is fairly complex and takes some locks, so to
      avoid the possibility of deadlock, we check the preemption count
      to see if we are in a (pseudo-)NMI handler, and if so, we don't call
      hash_page but instead treat it like a bad access that will get
      reported up through the exception table mechanism.  An interrupt
      whose handler runs even though the interrupt occurred when
      soft-disabled (such as the PMU interrupt) is considered a pseudo-NMI
      handler, which should use nmi_enter()/nmi_exit() rather than
      irq_enter()/irq_exit().
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      9c1e1052
    • P
      powerpc/32: Always order writes to halves of 64-bit PTEs · 1660e9d3
      Paul Mackerras 提交于
      On 32-bit systems with 64-bit PTEs, the PTEs have to be written in two
      32-bit halves.  On SMP we write the higher-order half and then the
      lower-order half, with a write barrier between the two halves, but on
      UP there was no particular ordering of the writes to the two halves.
      
      This extends the ordering that we already do on SMP to the UP case as
      well.  The reason is that with the perf_counter subsystem potentially
      accessing user memory at interrupt time to get stack traces, we have
      to be careful not to create an incorrect but apparently valid PTE even
      on UP.
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1660e9d3
  2. 17 8月, 2009 4 次提交
  3. 16 8月, 2009 3 次提交
    • F
      perf tools: Substract -Wformat-nonliteral from Wformat=2 in extra flags · 0d31b82d
      Frederic Weisbecker 提交于
      The soon coming perf trace needs to use printf with dynamically
      built formats.
      
      But we are using -Wformat=2 which is a shortcut for the
      following set: -Wformat -Wformat-security -Wformat-y2k
      -Wformat-nonliteral
      
      -Wformat-nonliteral warns when it can't check formats because
      they are not builtin constant strings, but we want to feature
      dynamic formats. What we want instead is Wformat=2 minus
      -Wformat-nonliteral, which is what this patch does.
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Mike Galbraith <efault@gmx.de>
      LKML-Reference: <1250437927-25490-1-git-send-email-fweisbec@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0d31b82d
    • I
      perf: Build with stack-protector and with -D_FORTIFY_SOURCE=2 · 35ba15b7
      Ingo Molnar 提交于
      Up our defences a bit.
      Suggested-by: NArjan van de Ven <arjan@infradead.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Mike Galbraith <efault@gmx.de>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      LKML-Reference: <new-submission>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      35ba15b7
    • I
      perf: Enable more compiler warnings · 83a0944f
      Ingo Molnar 提交于
      Related to a shadowed variable bug fix Valdis Kletnieks noticed
      that perf does not get built with -Wshadow, which could have
      helped us avoid the bug.
      
      So enable -Wshadow and also enable the following warnings on
      perf builds, in addition to the already enabled -Wall -Wextra
      -std=gnu99 warnings:
      
       -Wcast-align
       -Wformat=2
       -Wshadow
       -Winit-self
       -Wpacked
       -Wredundant-decls
       -Wstack-protector
       -Wstrict-aliasing=3
       -Wswitch-default
       -Wswitch-enum
       -Wno-system-headers
       -Wundef
       -Wvolatile-register-var
       -Wwrite-strings
       -Wbad-function-cast
       -Wmissing-declarations
       -Wmissing-prototypes
       -Wnested-externs
       -Wold-style-definition
       -Wstrict-prototypes
       -Wdeclaration-after-statement
      
      And change/fix the perf code to build cleanly under GCC 4.3.2.
      
      The list of warnings enablement is rather arbitrary: it's based
      on my (quick) reading of the GCC manpages and trying them on
      perf.
      
      I categorized the warnings based on individually enabling them
      and looking whether they trigger something in the perf build.
      If i liked those warnings (i.e. if they trigger for something
      that arguably could be improved) i enabled the warning.
      
      If the warnings seemed to come from language laywers spamming
      the build with tons of nuisance warnings i generally kept them
      off. Most of the sign conversion related warnings were in
      this category. (A second patch enabling some of the sign
      warnings might be welcome - sign bugs can be nasty.)
      
      I also kept warnings that seem to make sense from their manpage
      description and which produced no actual warnings on our code
      base. These warnings might still be turned off if they end up
      being a nuisance.
      
      I also left out a few warnings that are not supported in older
      compilers.
      
      [ Note that these changes might break the build on older
        compilers i did not test, or on non-x86 architectures that
        produce different warnings, so more testing would be welcome. ]
      
      Reported-by: Valdis.Kletnieks@vt.edu
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Mike Galbraith <efault@gmx.de>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      LKML-Reference: <new-submission>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      83a0944f
  4. 15 8月, 2009 4 次提交
  5. 14 8月, 2009 9 次提交
  6. 13 8月, 2009 15 次提交