1. 01 11月, 2011 1 次提交
  2. 28 9月, 2011 1 次提交
  3. 14 9月, 2011 1 次提交
  4. 26 8月, 2011 1 次提交
  5. 25 8月, 2011 2 次提交
  6. 23 8月, 2011 2 次提交
  7. 22 7月, 2011 1 次提交
  8. 20 7月, 2011 1 次提交
  9. 08 7月, 2011 1 次提交
  10. 18 6月, 2011 1 次提交
  11. 04 6月, 2011 2 次提交
  12. 02 6月, 2011 3 次提交
  13. 23 5月, 2011 1 次提交
  14. 20 5月, 2011 2 次提交
  15. 17 5月, 2011 1 次提交
  16. 31 3月, 2011 1 次提交
  17. 14 12月, 2010 1 次提交
    • R
      b43: rename TMS defines, drop useless condition from core reset · 42ab135f
      Rafał Miłecki 提交于
      As discussed we do not know band width at core reset time and it is not a good
      idea to reset whole just to change band. So just set unconditionally 20 MHz
      band width as default during core reset.
      
      As for defines PHY clock changed to band width in specs and it makes much more
      sens to call defines by band width which is self-explainable. Updated specs do
      not mention 0 value, but comparing to old ones you can notice lineral relation
      between PHY clock speed and band width. So it makes sense for 0x0 value to be
      10 MHz band width.
      Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      42ab135f
  18. 16 11月, 2010 1 次提交
  19. 07 10月, 2010 1 次提交
  20. 03 6月, 2010 1 次提交
  21. 10 3月, 2010 1 次提交
  22. 27 2月, 2010 1 次提交
  23. 04 2月, 2010 1 次提交
    • L
      b43: Fix throughput regression · b6c3f5be
      Larry Finger 提交于
      Commit c7ab5ef9 entitled "b43: implement
      short slot and basic rate handling" reduced the transmit throughput for
      my BCM4311 device from 18 Mb/s to 0.7 Mb/s. The basic rate handling
      portion is OK, the problem is in the short slot handling.
      
      Prior to this change, the short slot enable/disable routines were never
      called. Experimentation showed that the critical part was changing the
      value at offset 0x0010 in the shared memory. This is supposed to contain
      the 802.11 Slot Time in usec, but if it is changed from its initial value
      of zero, performance is destroyed. On the other hand, changing the value
      in the MMIO register corresponding to the Interframe Slot Time increased
      performance from 18 to 22 Mb/s. A BCM4306/3 also shows dramatic
      improvement of the transmit rate from 5.3 to 19.0 Mb/s.
      
      Other changes in the patch include removal of the magic number for the
      MMIO register, and allowing the slot time to be set for any PHY operating
      in the 2.4 GHz band. Previously, the routine was executed only for G PHYs.
      Signed-off-by: NLarry Finger <Larry.Finger@lwfinger.net>
      Cc: Stable <stable@kernel.org> [Any stable version back through 2.6.28]
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      b6c3f5be
  24. 16 1月, 2010 1 次提交
  25. 29 12月, 2009 1 次提交
  26. 07 11月, 2009 1 次提交
  27. 28 10月, 2009 1 次提交
  28. 08 10月, 2009 1 次提交
  29. 23 9月, 2009 2 次提交
  30. 09 9月, 2009 3 次提交
  31. 14 8月, 2009 1 次提交