- 02 11月, 2011 9 次提交
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由 Alex Deucher 提交于
Return the encoder id rather than a boolean. This is needed for differentiate between multiple DP bridge chips. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
radeon_driver_irq_preinstall_kms and radeon_driver_irq_uninstall_kms hard code the loop to 6 which happens to be the current maximum number of crtcs and hpd pins; if one day an ASIC with more crtcs (or hpd pins) comes out, this is a trouble waiting to happen. introduce constants for maximum CRTC count, maximum HPD pins count and maximum HDMI blocks count (per FIXME in radeon_irq structure) and correct the loops in radeon_driver_irq_preinstall_kms and radeon_driver_irq_uninstall_kms v2: take care of goofs pointed out by Alex Deucher Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
Cayman seems to be particularly sensitive to read cache returning old data after bind/unbind to GTT. Flush read cache for GTT range with each fences for all new hw. Should fix several rendering glitches. Like V2 flush whole address space V3 also flush shader read cache https://bugs.freedesktop.org/show_bug.cgi?id=40221 https://bugs.freedesktop.org/show_bug.cgi?id=38022 https://bugzilla.redhat.com/show_bug.cgi?id=738790Signed-off-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
Polarity needs to be set accordingly to connector status (connected or disconnected). Set it up at module init so first hotplug works reliably no matter what is the initial set of connector. Signed-off-by: NJerome Glisse <jglisse@redhat.com> cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
The logic was messy and hard to follow. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
This should make eDP more reliable. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
CP_COHER_CNTL2 has to be programmed manually when submitting packets to the ring directly rather than programmed via an IB. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Move the TC flush before the texture setup to match mesa and the ddx. Also, move the TC flush into the texture setup function. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
Since force handling rework of d0d0a225 we could end up bouncing connector status btw disconnected and unknown. When connector status change a call to output_poll_changed happen which in turn ask again for detect but with force set. So set the load detect flags whenever we report the connector as connected or unknown this avoid bouncing btw disconnected and unknown. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 28 10月, 2011 2 次提交
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由 Dave Airlie 提交于
This reverts commit dfadbbdb. Further upstream discussion between Marek and Thomas decided this wasn't fully baked and needed further work, so revert it before it hits mainline. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
This reverts commit d3ed7402. Further upstream discussion between Thomas and Marek decided this needed more work and driver specifics. So revert before it goes upstream. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 22 10月, 2011 1 次提交
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由 Dave Jones 提交于
abrt files a lot of bug reports when users get GPU lockups, but there's not really enough context to do anything useful with them. Given the lack of GPU context being dumped, this patch removes the stack trace, so that abrt ignores the messages. Signed-off-by: NDave Jones <davej@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 19 10月, 2011 1 次提交
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由 Alex Deucher 提交于
FB scratch indices are dword indices, but we were treating them as byte indices. As such, we were getting the wrong FB scratch data for non-0 indices. Fix the indices and guard the indexing against indices larger than the scratch allocation. Fixes memory corruption on some boards if data was written past the end of the FB scratch array. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reported-by: NDave Airlie <airlied@redhat.com> Tested-by: NDave Airlie <airlied@redhat.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 18 10月, 2011 20 次提交
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由 Alex Deucher 提交于
Settings in this table reflect the physical panel/connector rather than the internal dig encoding. v2: fix typo for DRM_MODE_CONNECTOR_VGA case. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
It's handled via external clock. It should already be protected by the external ss flag, but add an explicit check just in case. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
llano has fully routeable dig encoders similar to DCE3.2 while ontario has a hardcoded mapping similar to DCE4.0. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
r600-NI shared the same blit suspend code. Clean it up and make it a shared function. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
factor out most of evergreen blit code and use the refactored code from r600 that is now common for both r600 and evergreen Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
blit copy functions deal with GPU pages, not CPU pages, so rename the variables and parameters accordingly Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
reorganize the code such that only the primitives (i.e., the functions that load the CP ring) are hardware specific; dynamically link the primitives in a (new) pointer structure inside r600_blit at blit initialization time so that the functions that control the blit operations can be made common for r600 and evergreen parts Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
Lots of new (and hopefully useful) benchmark. Load the driver with radeon_benchmark=<test_number> and enjoy. Among tests added are VRAM to VRAM blits and blits with buffer size sweeps. The latter can be from GTT to VRAM, VRAM to GTT, and VRAM to VRAM and there are two types of sweeps: powers of two and (probably more interesting) buffers sizes that correspond to common modes. Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
factor out repeated code into functions fix units in which the throughput is reported (megabytes per second and megabits per second make sense, others are kind of confusing) make report more amenable to awk and friends (e.g. whitespace is always the separator, unit is separated from the number, etc) add #defines for some hard coded constants besides "beautification" this reorg is done in preparation for writing more elaborate benchmarks Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
some 3d register bits look like magic in r600 blit functions use predefined constants to make it more intuitive what they are Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
some bits in 3D registers used by blit functions look like magic and this is hard to follow; change them to a little bit more meaningful pre-defined constants Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Covert 4k pages to multiples of 64x64x4 tiles. This is also more efficient than a scanline based approach from the MC's perspective. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
Covert 4k pages to multiples of 64x64x4 tiles. This is also more efficient than a scanline based approach from the MC's perspective. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jean Delvare 提交于
There is no point in re-doing in post_xfer all the initialization that was already done by pre_xfer. Instead, only do the work which differs from pre_xfer. Signed-off-by: NJean Delvare <jdelvare@suse.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Andi Kleen 提交于
This shrinks the sizes of a lot of functions in the radeon driver dramatically. With a non force inline + -Os kernel this is default anyways. Cc: David Airlie <airlied@linux.ie> Signed-off-by: NAndi Kleen <ak@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Andi Kleen 提交于
With this patch I'm only about 50k larger with DRM debugging enables (why is that enabled by default?!?), and slightly smaller without. [airlied: moved r100.c additions to radeon_ring.c] Signed-off-by: NAndi Kleen <ak@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Andi Kleen 提交于
Remove bogus inlines in evergreen and r100. Signed-off-by: NAndi Kleen <ak@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Andi Kleen 提交于
With the dropped inlines gccs starts warning about genuinely unused functions. Remove r600_bpe_from_format, evergreen_cs_track_validate_cb, evergreen-cs_packet_next_is_pkt3_nop which are all unused. Signed-off-by: NAndi Kleen <ak@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Andi Kleen 提交于
Signed-off-by: NAndi Kleen <ak@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Andi Kleen 提交于
Fixes evergreen_cs_parse 4080 23124 +19044 and others compared to a non force inline kernel. Signed-off-by: NAndi Kleen <ak@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 12 10月, 2011 2 次提交
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由 Ilija Hadzic 提交于
Looks like the same pcie gen2 speed initialization for Evergreen also works on Cayman and seems to come up fine, so enable it if the module parameter says so Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ilija Hadzic 提交于
Enabling pcie gen2 speed was skipped for Northern Islands AISCs, although it looks like it works just fine with the same initialization sequence used for evergreen. According to Alex D. gen2 init was skipped to prevent a crash that has been caused by some other bug that has been fixed in the meantime; so now it should be safe to enable it. Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 10 10月, 2011 5 次提交
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由 Alex Deucher 提交于
If a card wasn't PCIE, we always set the DMA mask to 32 bits. This is only applies to the old rage128/r1xx gart block on early radeon asics (~r1xx-r4xx). Newer PCI and IGP cards can handle 40 bits just fine. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Chen Jie <chenj@lemote.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Michael Witten 提交于
The value of RADEON_DEBUGFS_MAX_NUM_FILES has been used to specify the size of an array, each element of which looks like this: struct radeon_debugfs { struct drm_info_list *files; unsigned num_files; }; Consequently, the number of debugfs files may be much greater than RADEON_DEBUGFS_MAX_NUM_FILES, something that the current code ignores: if ((_radeon_debugfs_count + nfiles) > RADEON_DEBUGFS_MAX_NUM_FILES) { DRM_ERROR("Reached maximum number of debugfs files.\n"); DRM_ERROR("Report so we increase RADEON_DEBUGFS_MAX_NUM_FILES.\n"); return -EINVAL; } This commit fixes this make, and accordingly renames: RADEON_DEBUGFS_MAX_NUM_FILES to: RADEON_DEBUGFS_MAX_COMPONENTS Signed-off-by: NMichael Witten <mfwitten@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
When force == false, we don't do load detection in the connector detect functions. Unforunately, we also return the previous connector state so we never get disconnect events for DVI-I, DVI-A, or VGA. Save whether we detected the monitor via load detection previously and use that to determine whether we return the previous state or not. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=41561Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
DVI-D and HDMI-A are digital only, so there's no need to attempt analog load detect. Also, skip bail before the !force check, or we fail to get a disconnect events. The next patches in the series attempt to fix disconnect events for connectors with analog support (DVI-I, HDMI-B, DVI-A). Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=41561Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jean Delvare 提交于
Commit 9b9fe724 accidentally used RADEON_GPIO_EN_* where RADEON_GPIO_MASK_* was intended. This caused improper initialization of I2C buses, mostly visible when setting i2c_algo_bit.bit_test=1. Using the right constants fixes the problem. Signed-off-by: NJean Delvare <jdelvare@suse.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Jerome Glisse <j.glisse@gmail.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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