- 14 2月, 2009 1 次提交
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由 Randy Dunlap 提交于
Fix struct pci_platform_pm_ops kernel-doc notation. Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 17 1月, 2009 1 次提交
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由 Rafael J. Wysocki 提交于
There is a problem in our handling of suspend-resume of PCI devices that many of them have their standard config registers restored with interrupts enabled and they are put into the full power state with interrupts enabled as well. This may lead to the following scenario: * an interrupt vector is shared between two or more devices * one device is resumed earlier and generates an interrupt * the interrupt handler of another device tries to handle it and attempts to access the device the config space of which hasn't been restored yet and/or which still is in a low power state * the system crashes as a result To prevent this from happening we should restore the standard configuration registers of all devices with interrupts disabled and we should put them into the D0 power state right after that. Unfortunately, this cannot be done using the existing pci_set_power_state(), because it can sleep. Also, to do it we have to make sure that the config spaces of all devices were actually saved during suspend. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Acked-by: NLinus Torvalds <torvalds@linux-foundation.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 08 1月, 2009 11 次提交
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由 Rafael J. Wysocki 提交于
It generally is better to avoid accessing devices behind bridges that may not be in the D0 power state, because in that case the bridges' secondary buses may not be accessible. For this reason, during the early phase of resume (ie. with interrupts disabled), before restoring the standard config registers of a device, check the power state of the bridge the device is behind and postpone the restoration of the device's config space, as well as any other operations that would involve accessing the device, if that state is not D0. In such cases the restoration of the device's config space will be retried during the "normal" phase of resume (ie. with interrupts enabled), so that the bridge can be put into D0 before that happens. Also, save standard configuration registers of PCI devices during the "normal" phase of suspend (ie. with interrupts enabled), so that the bridges the devices are behind can be put into low power states (we don't put bridges into low power states at the moment, but we may want to do it in the future and it seems reasonable to design for that). Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Rafael J. Wysocki 提交于
PCI devices without drivers are not disabled during suspend and hibernation, but they are enabled during resume, with the help of pci_reenable_device(), so there is an unbalanced execution of pcibios_enable_device() in the resume code path. To correct this introduce function pci_disable_enabled_device() that will disable the argument device, if it is enabled when the function is being run, without updating the device's pci_dev structure and use it in the suspend code path to balance the pci_reenable_device() executed during resume. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Acked-by: NPavel Machek <pavel@suse.cz> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Stephen Hemminger 提交于
Change PCI VPD API which was only used by sysfs to something usable in drivers. * move iteration over multiple words to the low level * use conventional types for arguments * add exportable wrapper Signed-off-by: NStephen Hemminger <shemminger@vyatta.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Jesse Barnes 提交于
When PCI devices are initialized, we check whether they support PCI PM caps and set the device can_wakeup flag if so. However, some devices may have platform provided wakeup events rather than PCI PME signals, so we need to set can_wakeup in that case too. Doing so should allow wakeups from many more devices, especially on cost constrained systems. Reported-by: NAlan Stern <stern@rowland.harvard.edu> Tested-by: NJoseph Chan <JosephChan@via.com.tw> Acked-by: N"Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yu Zhao 提交于
This patch splits a new function, pci_bus_add_child(), from pci_bus_add_devices(). The new function can be used to register PCI buses to the device core. Signed-off-by: NYu Zhao <yu.zhao@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yu Zhao 提交于
Add a function to map a given resource number to a corresponding register so drivers can get the offset and type of device specific BARs. Signed-off-by: NYu Zhao <yu.zhao@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yu Zhao 提交于
Export __pci_read_base() so it can be used by whole PCI subsystem. Signed-off-by: NYu Zhao <yu.zhao@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yu Zhao 提交于
Change parameter of pci_ari_enabled() from 'pci_dev' to 'pci_bus'. ARI forwarding on the bridge mostly concerns the subordinate devices rather than the bridge itself. So this change will make the function easier to use. Signed-off-by: NYu Zhao <yu.zhao@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Rafael J. Wysocki 提交于
Since interrupts will soon be disabled at PCI resume time, we need to pre-allocate memory to save/restore PCI config space (or use GFP_ATOMIC, but this is safer). Reported-by: NLinus Torvalds <torvalds@linux-foundation.org> Signed-off-by: N"Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Andrew Patterson 提交于
The _OSC capability OSC_MSI_SUPPORT is set when the root bridge is added with pci_acpi_osc_support(), so we no longer need to do it in the PCI MSI driver. Also adds the function pci_msi_enabled, which returns true if pci=nomsi is not on the kernel command-line. Signed-off-by: NAndrew Patterson <andrew.patterson@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Jesse Barnes 提交于
/proc/bus/pci allows you to mmap resource ranges too, so we should probably be checking to make sure the mapping is somewhat valid. Uses the same code as the recent sysfs mmap range checking patch from Linus. Acked-by: NDavid Miller <davem@davemloft.net> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 23 10月, 2008 1 次提交
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由 Taku Izumi 提交于
Currently linux doesn't have any code to set the "MSI supported" bit in Support Fireld of _OSC. This patch adds the code for that. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NTaku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 21 10月, 2008 4 次提交
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由 Benjamin Herrenschmidt 提交于
This adds the ability to mmap legacy IO space to the legacy_io files in sysfs on platforms that support it. This will allow to clean up X to use this instead of /dev/mem for legacy IO accesses such as those performed by Int10. While at it I moved pci_create/remove_legacy_files() to pci-sysfs.c where I think they belong, thus making more things statis in there and cleaned up some spurrious prototypes in the ia64 pci.h file Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yu Zhao 提交于
This patch adds support for PCI Express Alternative Routing-ID Interpretation (ARI) capability. The ARI capability extends the Function Number field of the PCI Express Endpoint by reusing the Device Number which is otherwise hardwired to 0. With ARI, an Endpoint can have up to 256 functions. Signed-off-by: NYu Zhao <yu.zhao@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Zhao, Yu 提交于
This is a cleanup that changes all PCI configuration space size representations to the macros (PCI_CFG_SPACE_SIZE and PCI_CFG_SPACE_EXP_SIZE). And the macros are also moved from drivers/pci/probe.c to drivers/pci/pci.h. Signed-off-by: NYu Zhao <yu.zhao@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Mike Travis 提交于
Stephen Hemminger wrote: > Looks like Mike created cpulistaffinty in sysfs but never completed > the job. This patch hooks things up correctly, taking care to remove the new file when the bus is destroyed. Signed-off-by: NStephen Hemminger <shemminger@vyatta.com> Signed-off-by: NMike Travis <travis@sgi.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 17 7月, 2008 1 次提交
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由 Rafael J. Wysocki 提交于
Since the second argument of acpi_pci_choose_state() and platform_pci_choose_state() is never used, remove it. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Signed-off-by: NAndi Kleen <ak@linux.intel.com> Acked-by: NPavel Machek <pavel@suse.cz> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 08 7月, 2008 2 次提交
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由 Rafael J. Wysocki 提交于
* Introduce function acpi_pm_device_sleep_wake() for enabling and disabling the system wake-up capability of devices that are power manageable by ACPI. * Introduce function acpi_bus_can_wakeup() allowing other (dependent) subsystems to check if ACPI is able to enable the system wake-up capability of given device. * Introduce callback .sleep_wake() in struct pci_platform_pm_ops and for the ACPI PCI 'driver' make it use acpi_pm_device_sleep_wake(). * Introduce callback .can_wakeup() in struct pci_platform_pm_ops and for the ACPI 'driver' make it use acpi_bus_can_wakeup(). * Move the PME# handlig code out of pci_enable_wake() and split it into two functions, pci_pme_capable() and pci_pme_active(), allowing the caller to check if given device is capable of generating PME# from given power state and to enable/disable the device's PME# functionality, respectively. * Modify pci_enable_wake() to use the new ACPI callbacks and the new PME#-related functions. * Drop the generic .platform_enable_wakeup() callback that is not used any more. * Introduce device_set_wakeup_capable() that will set the power.can_wakeup flag of given device. * Rework PCI device PM initialization so that, if given device is capable of generating wake-up events, either natively through the PME# mechanism, or with the help of the platform, its power.can_wakeup flag is set and its power.should_wakeup flag is unset as appropriate. * Make ACPI set the power.can_wakeup flag for devices found to be wake-up capable by it. * Make the ACPI wake-up code enable/disable GPEs for devices that have the wakeup.flags.prepared flag set (which means that their wake-up power has been enabled). Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Rafael J. Wysocki 提交于
Introduce function pointer platform_pci_power_manageable to be used by the platform-related code to point to a function allowing us to check if given device is power manageable by the platform. Introduce acpi_pci_power_manageable() playing that role for ACPI. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 03 7月, 2008 1 次提交
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由 Benjamin Li 提交于
For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the VPD end tag will hang the device. This problem was initially observed when a vpd entry was created in sysfs ('/sys/bus/pci/devices/<id>/vpd'). A read to this sysfs entry will dump 32k of data. Reading a full 32k will cause an access beyond the VPD end tag causing the device to hang. Once the device is hung, the bnx2 driver will not be able to reset the device. We believe that it is legal to read beyond the end tag and therefore the solution is to limit the read/write length. A majority of this patch is from Matthew Wilcox who gave code for reworking the PCI vpd size information. A PCI quirk added for the Broadcom NIC's to limit the read/write's. Signed-off-by: NBenjamin Li <benli@broadcom.com> Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 12 6月, 2008 1 次提交
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由 Rafael J. Wysocki 提交于
Since the second argument of acpi_pci_choose_state() and platform_pci_choose_state() is never used, remove it. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Acked-by: NPavel Machek <pavel@suse.cz> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 11 6月, 2008 1 次提交
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由 Alex Chiang 提交于
Currently, /sys/bus/pci/slots/ only exposes hotplug attributes when a hotplug driver is loaded, but PCI slots have attributes such as address, speed, width, etc. that are not related to hotplug at all. Introduce pci_slot as the primary data structure and kobject model. Hotplug attributes described in hotplug_slot become a secondary structure associated with the pci_slot. This patch only creates the infrastructure that allows the separation of PCI slot attributes and hotplug attributes. In this patch, the PCI hotplug core remains the only user of this infrastructure, and thus, /sys/bus/pci/slots/ will still only become populated when a hotplug driver is loaded. A later patch in this series will add a second user of this new infrastructure and demonstrate splitting the task of exposing pci_slot attributes from hotplug_slot attributes. - Make pci_slot the primary sysfs entity. hotplug_slot becomes a subsidiary structure. o pci_create_slot() creates and registers a slot with the PCI core o pci_slot_add_hotplug() gives it hotplug capability - Change the prototype of pci_hp_register() to take the bus and slot number (on parent bus) as parameters. - Remove all the ->get_address methods since this functionality is now handled by pci_slot directly. [achiang@hp.com: rpaphp-correctly-pci_hp_register-for-empty-pci-slots] Tested-by: NBadari Pulavarty <pbadari@us.ibm.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: make headers_check happy] [akpm@linux-foundation.org: nuther build fix] [akpm@linux-foundation.org: fix typo in #include] Signed-off-by: NAlex Chiang <achiang@hp.com> Signed-off-by: NMatthew Wilcox <matthew@wil.cx> Cc: Greg KH <greg@kroah.com> Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Cc: Len Brown <lenb@kernel.org> Acked-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 21 4月, 2008 1 次提交
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由 Ben Hutchings 提交于
Vital Product Data (VPD) may be exposed by PCI devices in several ways. It is generally unsafe to read this information through the existing interfaces to user-land because of stateful interfaces. This adds: - abstract operations for VPD access (struct pci_vpd_ops) - VPD state information in struct pci_dev (struct pci_vpd) - an implementation of the VPD access method specified in PCI 2.2 (in access.c) - a 'vpd' binary file in sysfs directories for PCI devices with VPD operations defined It adds a probe for PCI 2.2 VPD in pci_scan_device() and release of VPD state in pci_release_dev(). Signed-off-by: NBen Hutchings <bhutchings@solarflare.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 02 2月, 2008 3 次提交
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由 Greg Kroah-Hartman 提交于
This moves the pci_bus class device to be a real struct device and at the same time, place it in the device tree in the correct location. Note, the old "bridge" symlink is now gone, but this was a non-standard link and no userspace program used it. If you need to determine the device that the bus is on, follow the standard device symlink, or walk up the device tree. Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Greg Kroah-Hartman 提交于
Fixes a few coding style issues in the internal pci.h file Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Linas Vepstas 提交于
PCI error recovery usually involves the PCI adapter being reset. If the device is using MSI, the reset will cause the MSI state to be lost; the device driver needs to restore the MSI state. The pci_restore_msi_state() routine is currently protected by CONFIG_PM; remove this, and also export the symbol, so that it can be used in a modle. Signed-off-by: NLinas Vepstas <linas@austin.ibm.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 22 10月, 2007 1 次提交
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由 Keshavamurthy, Anil S 提交于
When devices are under a p2p bridge, upstream transactions get replaced by the device id of the bridge as it owns the PCIE transaction. Hence its necessary to setup translations on behalf of the bridge as well. Due to this limitation all devices under a p2p share the same domain in a DMAR. We just cache the type of device, if its a native PCIe device or not for later use. [akpm@linux-foundation.org: BUG_ON -> WARN_ON+recover] Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 10月, 2007 2 次提交
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由 Randy Dunlap 提交于
For cases in which CONFIG_PCIEAER=y (such as distro kernels), allow users to disable PCIE Advanced Error Reporting by using "pci=noaer" on the kernel command line. This can be used to work around hardware or (kernel) software problems. Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Kay Sievers 提交于
This changes the uevent buffer functions to use a struct instead of a long list of parameters. It does no longer require the caller to do the proper buffer termination and size accounting, which is currently wrong in some places. It fixes a known bug where parts of the uevent environment are overwritten because of wrong index calculations. Many thanks to Mathieu Desnoyers for finding bugs and improving the error handling. Signed-off-by: NKay Sievers <kay.sievers@vrfy.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 23 8月, 2007 1 次提交
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由 Kumar Gala 提交于
We need pci_bus_find_capability() in some arch/powerpc code so move the prototype into a header accessible to it. Also kill the duplicate prototype for pci_bus_alloc_resource(). Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 25 7月, 2007 1 次提交
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由 Tejun Heo 提交于
Some odd ACPI implementations choke if certain controller is disabled when ACPI suspend is invoked but we still need to make sure the PCI device is enabled during resume. Simply using pci_enable_device() unbalances device enable count. Export __pci_reenable_device(). Signed-off-by: NTejun Heo <htejun@gmail.com> Signed-off-by: NJeff Garzik <jeff@garzik.org>
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- 22 7月, 2007 1 次提交
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由 Shaohua Li 提交于
applied after Rafel's 'PM: Update global suspend and hibernation operations framework' patch set Signed-off-by: Shaohua Li<shaohua.li@intel.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 03 5月, 2007 1 次提交
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由 Michael Ellerman 提交于
The msi descriptors are linked together with what looks a lot like a linked list, but isn't a struct list_head list. Make it one. The only complication is that previously we walked a list of irqs, and got the descriptor for each with get_irq_msi(). Now we have a list of descriptors and need to get the irq out of it, so it needs to be in the actual struct msi_desc. We use 0 to indicate no irq is setup. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 13 3月, 2007 1 次提交
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由 Eric W. Biederman 提交于
There are two ways pci_save_state and pci_restore_state are used. As helper functions during suspend/resume, and as helper functions around a hardware reset event. When used as helper functions around a hardware reset event there is no reason to believe the calls will be paired, nor is there a good reason to believe that if we restore the msi state from before the reset that it will match the current msi state. Since arch code may change the msi message without going through the driver, drivers currently do not have enough information to even know when to call pci_save_state to ensure they will have msi state in sync with the other kernel irq reception data structures. It turns out the solution is straight forward, cache the state in the existing msi data structures (not the magic pci saved things) and have the msi code update the cached state each time we write to the hardware. This means we never need to read the hardware to figure out what the hardware state should be. By modifying the caching in this manner we get to remove our save_state routines and only need to provide restore_state routines. The only fields that were at all tricky to regenerate were the msi and msi-x control registers and the way we regenerate them currently is a bit dependent upon assumptions on how we use the allow msi registers to be configured and used making the code a little bit brittle. If we ever change what cases we allow or how we configure the msi bits we can address the fragility then. Signed-off-by: NEric W. Biederman <ebiederm@xmission.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de> Acked-by: NAuke Kok <auke-jan.h.kok@intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 05 3月, 2007 1 次提交
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由 Eric W. Biederman 提交于
In some cases when we are not using msi we need a way to ensure that the hardware does not have an msi capability enabled. Currently the code has been calling disable_msi_mode to try and achieve that. However disable_msi_mode has several other side effects and is only available when msi support is compiled in so it isn't really appropriate. Instead this patch implements pci_msi_off which disables all msi and msix capabilities unconditionally with no additional side effects. pci_disable_device was redundantly clearing the bus master enable flag and clearing the msi enable bit. A device that is not allowed to perform bus mastering operations cannot generate intx or msi interrupt messages as those are essentially a special case of dma, and require bus mastering. So the call in pci_disable_device to disable msi capabilities was redundant. quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off. Signed-off-by: NEric W. Biederman <ebiederm@xmission.com> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 08 2月, 2007 3 次提交
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由 Michael Ellerman 提交于
The PCI save/restore code doesn't need to care about MSI vs MSI-X, all it really wants is to say "save/restore all MSI(-X) info for this device". This is borne out in the code, we call the MSI and MSI-X save routines side by side, and similarly with the restore routines. So combine the MSI/MSI-X routines into pci_save_msi_state() and pci_restore_msi_state(). It is up to those routines to decide what state needs to be saved. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Michael Ellerman 提交于
I don't see any reason why we need pci_msi_quirk, quirk code can just call pci_no_msi() instead. Remove the check of pci_msi_quirk in msi_init(). This is safe as all calls to msi_init() are protected by calls to pci_msi_supported(), which checks pci_msi_enable, which is disabled by pci_no_msi(). The pci_disable_msi routines didn't check pci_msi_quirk, only pci_msi_enable, but as far as I can see that was a bug not a feature. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Hidetoshi Seto 提交于
Original patch was posted as "PCI : Move pci_fixup_device and is_enabled". This 3 of 3 patches does: - add __pci_reenable_device (recover former change of 1st patch) Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Inaky Perez-Gonzalez <inaky@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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