- 04 6月, 2021 1 次提交
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由 Omkar Kulkarni 提交于
Add TCP_ULP as a storage common TCP offload FW resource layout. This will be used by the core driver (QED) for both the NVMeTCP and iSCSI. Acked-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NPrabhakar Kushwaha <pkushwaha@marvell.com> Signed-off-by: NOmkar Kulkarni <okulkarni@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NShai Malin <smalin@marvell.com> Reviewed-by: NHannes Reinecke <hare@suse.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 7月, 2020 1 次提交
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由 Gustavo A. R. Silva 提交于
One-element arrays are being deprecated[1]. Replace the one-element array with a simple value type '__le32 reserved1'[2], once it seems this is just a placeholder for alignment. [1] https://github.com/KSPP/linux/issues/79 [2] https://github.com/KSPP/linux/issues/86Tested-by: Nkernel test robot <lkp@intel.com> Link: https://github.com/GustavoARSilva/linux-hardening/blob/master/cii/0-day/qed_hsi-20200718.mdSigned-off-by: NGustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 7月, 2020 8 次提交
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由 Alexander Lobakin 提交于
Add all necessary code (NVM parsing, MFW and Ethtool reports etc.) to support extended speed and FEC modes. These new modes are supported by the new boards revisions and newer MFW versions. Misc: correct port type for MEDIA_KR. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
These modes are relevant only for several boards, but may be reported by MFW as well as the others. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
These ports ship on new boards revisions and are supported by newer firmware versions. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Reformat a few nvm_cfg* structures (and partly qed_dev) prior to adding new fields and definitions. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Add all necessary routines for reading supported FEC modes from NVM and querying FEC control to the MFW (if the running version supports it). Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Prior to adding new fields and bitfields, reformat the related structures according to the Linux style (spaces to tabs, lowercase hex, indentation etc.). Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Set the corresponding advertised and supported link modes according to the detected transceiver type and device capabilities. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Prior to adding new bitfields, reformat the existing ones from spaces to tabs, and unify all hex values to lowercase. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 7月, 2020 3 次提交
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由 Alexander Lobakin 提交于
Current code assumes that both host and device operates in Little Endian in lots of places. While this is true for x86 platform, this doesn't mean we should not care about this. This commit addresses all parts of the code that were pointed out by sparse checker. All operations with restricted (__be*/__le*) types are now protected with explicit from/to CPU conversions, even if they're noops on common setups. I'm sure there are more such places, but this implies a deeper code investigation, and is a subject for future works. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
To not mix functional and stylistic changes, correct indentation of code that will be modified in the subsequent commits. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Static variables (and functions, unless they're inline) should not be declared in header files. Move the static array iro_arr[] from "qed_hsi.h" to the sole place where it's used, "qed_init_ops.c". This eliminates lots of warnings (42 of them actually) against W=1+: In file included from drivers/net/ethernet/qlogic/qed/qed.h:51:0, from drivers/net/ethernet/qlogic/qed/qed_ooo.c:40: drivers/net/ethernet/qlogic/qed/qed_hsi.h:4421:18: warning: 'iro_arr' defined but not used [-Wunused-const-variable=] static const u32 iro_arr[] = { ^~~~~~~ Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 7月, 2020 2 次提交
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由 Alexander Lobakin 提交于
Set the actual copyright holder and years in all qed source files. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
QLogic QED drivers source code is dual licensed under GPL-2.0/BSD-3-Clause. Remove all the boilerplates in the existing code and replace it with the correct SPDX tag. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 5月, 2020 3 次提交
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由 Igor Russkikh 提交于
MCP may signal driver about generic critical failure. Driver has to collect mdump information (get_retain), it pushes that to logs and triggers generic notification on "hardware attention" event. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Fan failure is sent by firmware, driver reacts on this error with newly introduced notification path. It will collect dump and shut down the device to prevent physical breakage Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
On various critical errors, notification handler should also report the err information into the management firmware. MFW can interact with server/motherboard backend agents - these are used by server manufacturers to monitor server HW health. Thus, it is important for driver to report on any faulty conditions Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 1月, 2020 10 次提交
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由 Michal Kalderon 提交于
Add to debug dump more information on the platform it was collected from (pci func, path id). Provide human readable reg fifo erros. Removed static debug arrays from HSI Functions, and move them to the hwfn. Some structures were slightly changed (removing reserved chip id for example) which lead to many long initializations being modified with one parameter less during initialization. This leads to some long diffs that don't really change anything. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
Part of the FW drop includes new debug capabilities implemented in the qed_debug file. This patch dumps additional information during ethtool -d for better debugging. The data dumped is the ilt (internal logical table) and information gathered by the management firmware incase there was a crash and driver was not able to extract the information (mdump). Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This feature enables the FW to page out FW code when required Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This patch contains several HSI changes. The changes are part of features like RDMA VF and OVS, the patch also contains a fix to how the init code determines if the dmae is ready to be used. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
- Remove struct iscsi_slow_path_hdr and field fw_cid from several structs - Remove struct iscsi_spe_func_dstry - Remove fields pbe_page_size_log and pbl_page_size_log from struct iscsi_conn_offload_param Signed-off-by: NManish Rangankar <manish.rangankar@marvell.com> Signed-off-by: NSaurav Kashyap <saurav.kashyap@marvell.com> Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
LL2 queues were a limited resource due to FW constraints. This FW introduced a new resource which is a context based ll2 queue (memory on host). The additional ll2 queues are required for RDMA SRIOV. The code refers to the previous ll2 queues as ram-based or legacy, and the new queues as ctx-based. This change decreased the "legacy" ram-based queues therefore the first ll2 queue used for iWARP was converted to the ctx-based ll2 queue. This feature also exposed a bug in the DIRECT_REG_WR64 macro implementation which didn't have an effect in other use cases. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
There are several wide-bus registers written to by the fw_funcs that require using the dmae for atomicity. Therefore using the dmae channel functionality was added to the fw_funcs file, since the code is very similar to the previously used code, the structures used were moved to qed_hsi. Due to FW conventions, the names of the flags in the struct changed. Since this required slight modification in the places that set the flags the code was modified to use GET/SET FIELD macros. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This patch contains changes in initialization and usage of the QM blocks. Instead of setting a rate limiter per vport the rate limiters are now a global resource and set independentaly. The patch also contains a field name change: vport_wfq which is part of vport_params was renamed to wfq as the vport prefix is redundant. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This patch contains register initialization related changes. - Modifications to the runtime offsets - these are defines used by the driver or firmware functions to set values that are used by the initialization functions to set device register values. - Global window values changes to provide different device register ranges. - Additional device registers addresses were added to the register file, used in later stages. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
IRO stands for internal RAM offsets. Updating the FW binary produces different iro offsets. This file contains the different values, and a new representation of the values. Update the FW version Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 9月, 2019 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
The patch adds driver support for configuring the grc dump config flags. Signed-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 8月, 2019 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
The patch adds API for configuring the NVM config attributes using Management FW (MFW) interfaces. Signed-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 5月, 2019 1 次提交
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由 Michal Kalderon 提交于
This patch refactors the current llh implementation. It exposes a hw resource called ppfid (port-pfid) and implements an API for configuring the resource. Default configuration which was used until now limited the number of filters per PF and did not support engine affinity per protocol. The new API enables allocating more filter rules per PF and enables affinitizing protocol packets to a certain engine which enables full 100g protocol offload support. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 2月, 2019 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
The patch adds driver interface to read the SmartAN capability from management firmware. Signed-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 1月, 2019 1 次提交
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由 Tomer Tayar 提交于
This patch adds the detection and handling of a parity error ("process kill event"), including the update of the protocol drivers, and the prevention of any HW access that will lead to device access towards the host while recovery is in progress. It also provides the means for the protocol drivers to trigger a recovery process on their decision. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 1月, 2019 1 次提交
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由 David S. Miller 提交于
This is new code and not bug fixes. This reverts all changes added by merge commit 8fb18be9Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 1月, 2019 1 次提交
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由 Tomer Tayar 提交于
This patch adds the detection and handling of a parity error ("process kill event"), including the update of the protocol drivers, and the prevention of any HW access that will lead to device access towards the host while recovery is in progress. It also provides the means for the protocol drivers to trigger a recovery process on their decision. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 12月, 2018 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
The value for OEM_CFG_UPDATE command differs between driver and the Management firmware (mfw). Fix this gap with adding a reserved field. Fixes: cac6f691 ("qed: Add support for Unified Fabric Port.") Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 11月, 2018 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
The patch adds driver support for MBI image update through MFW. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 10月, 2018 1 次提交
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由 Rahul Verma 提交于
Added transceiver modes with different speed and media type, speed capability and supported board types in HSI, which will be utilizing to display correct specification of link modes and speed type. Signed-off-by: NRahul Verma <Rahul.Verma@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 10月, 2018 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
Currently driver registers to physical link notifications (of the device) from Management firmware (MFW). Driver doesn't get notified if there's a change in the virtual link e.g., link-flap on the peer PF interface. Virtual link indication from MFW reflects the per PF link status instead of the physical link. The patch adds driver support for, - Advertising the virtual link support to MFW. - Handling the virtual link notification from MFW. Please consider applying it to 'net-next'. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 10月, 2018 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
Add driver support for configuring/reading the 20G link speed. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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