1. 14 8月, 2022 5 次提交
    • I
      perf pmu-events: Hide the pmu_events · 1ba3752a
      Ian Rogers 提交于
      Hide that the pmu_event structs are an array with a new wrapper struct.
      Signed-off-by: NIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ravi Bangoria <ravi.bangoria@amd.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20220812230949.683239-12-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      1ba3752a
    • I
      perf pmu-events: Don't assume pmu_event is an array · 660842e4
      Ian Rogers 提交于
      The current code assumes that a struct pmu_event can be iterated over
      forward until a NULL pmu_event is encountered.
      
      This makes it difficult to refactor pmu_event.
      
      Add a loop function taking a callback function that's passed the struct
      pmu_event.
      
      This way the pmu_event is only needed for one element and not an entire
      array.
      
      Switch existing code iterating over the pmu_event arrays to use the new
      loop function pmu_events_table_for_each_event.
      Signed-off-by: NIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ravi Bangoria <ravi.bangoria@amd.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20220812230949.683239-11-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      660842e4
    • I
      perf pmu-events: Hide pmu_events_map · 29be2fe0
      Ian Rogers 提交于
      Move usage of the table to pmu-events.c so it may be hidden. By
      abstracting the table the implementation can later be changed.
      Signed-off-by: NIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ravi Bangoria <ravi.bangoria@amd.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20220812230949.683239-8-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      29be2fe0
    • I
      perf pmu-events: Avoid passing pmu_events_map · eeac7730
      Ian Rogers 提交于
      Preparation for hiding pmu_events_map as an implementation detail. While
      the map is passed, the table of events is all that is normally wanted.
      
      While modifying the function's types, rename pmu_events_map__find to
      pmu_events_table__find to match later encapsulation. Similarly rename
      pmu_add_cpu_aliases_map to pmu_add_cpu_aliases_table.
      Signed-off-by: NIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ravi Bangoria <ravi.bangoria@amd.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20220812230949.683239-7-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      eeac7730
    • I
      perf pmu-events: Hide pmu_sys_event_tables · 2519db2a
      Ian Rogers 提交于
      Move usage of the table to pmu-events.c so it may be hidden. By
      abstracting the table the implementation can later be changed.
      Signed-off-by: NIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ravi Bangoria <ravi.bangoria@amd.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20220812230949.683239-6-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      2519db2a
  2. 25 6月, 2022 1 次提交
  3. 12 2月, 2022 1 次提交
    • I
      perf cpumap: Use for each loop · 6a12a63e
      Ian Rogers 提交于
      Improve readability in perf_pmu__cpus_match() by using
      perf_cpu_map__for_each_cpu().
      Signed-off-by: NIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Alexey Bayduraev <alexey.v.bayduraev@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: André Almeida <andrealmeid@collabora.com>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Darren Hart <dvhart@infradead.org>
      Cc: Davidlohr Bueso <dave@stgolabs.net>
      Cc: Dmitriy Vyukov <dvyukov@google.com>
      Cc: Eric Dumazet <edumazet@google.com>
      Cc: German Gomez <german.gomez@arm.com>
      Cc: Hao Luo <haoluo@google.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Masami Hiramatsu <mhiramat@kernel.org>
      Cc: Miaoqian Lin <linmq006@gmail.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Riccardo Mancini <rickyman7@gmail.com>
      Cc: Shunsuke Nakamura <nakamura.shun@fujitsu.com>
      Cc: Song Liu <song@kernel.org>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
      Cc: Steven Rostedt (VMware) <rostedt@goodmis.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Thomas Richter <tmricht@linux.ibm.com>
      Cc: Yury Norov <yury.norov@gmail.com>
      Link: http://lore.kernel.org/lkml/20220211103415.2737789-3-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      6a12a63e
  4. 02 1月, 2022 1 次提交
    • J
      perf pmu: Fix alias events list · e0257a01
      John Garry 提交于
      Commit 0e0ae874 ("perf list: Display hybrid PMU events with cpu
      type") changes the event list for uncore PMUs or arm64 heterogeneous CPU
      systems, such that duplicate aliases are incorrectly listed per PMU
      (which they should not be), like:
      
        # perf list
        ...
        unc_cbo_cache_lookup.any_es
        [Unit: uncore_cbox L3 Lookup any request that access cache and found
        line in E or S-state]
        unc_cbo_cache_lookup.any_es
        [Unit: uncore_cbox L3 Lookup any request that access cache and found
        line in E or S-state]
        unc_cbo_cache_lookup.any_i
        [Unit: uncore_cbox L3 Lookup any request that access cache and found
        line in I-state]
        unc_cbo_cache_lookup.any_i
        [Unit: uncore_cbox L3 Lookup any request that access cache and found
        line in I-state]
        ...
      
      Notice how the events are listed twice.
      
      The named commit changed how we remove duplicate events, in that events
      for different PMUs are not treated as duplicates. I suppose this is to
      handle how "Each hybrid pmu event has been assigned with a pmu name".
      
      Fix PMU alias listing by restoring behaviour to remove duplicates for
      non-hybrid PMUs.
      
      Fixes: 0e0ae874 ("perf list: Display hybrid PMU events with cpu type")
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Tested-by: NZhengjun Xing <zhengjun.xing@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: https://lore.kernel.org/r/1640103090-140490-1-git-send-email-john.garry@huawei.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      e0257a01
  5. 08 11月, 2021 1 次提交
  6. 26 10月, 2021 1 次提交
    • J
      perf list: Display hybrid PMU events with cpu type · 0e0ae874
      Jin Yao 提交于
      Add a new option '--cputype' to 'perf list' to display core-only PMU
      events or atom-only PMU events.
      
      Each hybrid PMU event has been assigned with a PMU name, this patch
      compares the PMU name before listing the result.
      
      For example:
      
        perf list --cputype atom
        ...
        cache:
          core_reject_l2q.any
               [Counts the number of request that were not accepted into the L2Q because the L2Q is FULL. Unit: cpu_atom]
        ...
      
      The "Unit: cpu_atom" is displayed in the brief description section
      to indicate this is an atom event.
      Signed-off-by: NJin Yao <yao.jin@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Jin Yao <yao.jin@intel.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: http://lore.kernel.org/lkml/20210903025239.22754-1-yao.jin@linux.intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      0e0ae874
  7. 20 10月, 2021 4 次提交
    • I
      perf parse-events: Add const to evsel name · 8e8bbfb3
      Ian Rogers 提交于
      The evsel name is strdup-ed before assignment and so can be const.
      
      A later change will add another similar string.
      
      Using const makes it clearer that these are not out arguments.
      Signed-off-by: NIan Rogers <irogers@google.com>
      Acked-by: NAndi Kleen <ak@linux.intel.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Antonov <alexander.antonov@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andrew Kilroy <andrew.kilroy@arm.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Changbin Du <changbin.du@intel.com>
      Cc: Denys Zagorui <dzagorui@cisco.com>
      Cc: Fabian Hemmer <copy@copy.sh>
      Cc: Felix Fietkau <nbd@nbd.name>
      Cc: Heiko Carstens <hca@linux.ibm.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Kees Kook <keescook@chromium.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Nicholas Fraser <nfraser@codeweavers.com>
      Cc: Nick Desaulniers <ndesaulniers@google.com>
      Cc: Paul Clarke <pc@us.ibm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Riccardo Mancini <rickyman7@gmail.com>
      Cc: Sami Tolvanen <samitolvanen@google.com>
      Cc: ShihCheng Tu <mrtoastcheng@gmail.com>
      Cc: Song Liu <songliubraving@fb.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Sumanth Korikkar <sumanthk@linux.ibm.com>
      Cc: Thomas Richter <tmricht@linux.ibm.com>
      Cc: Wan Jiabing <wanjiabing@vivo.com>
      Cc: Zhen Lei <thunder.leizhen@huawei.com>
      Link: https://lore.kernel.org/r/20211015172132.1162559-14-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      8e8bbfb3
    • I
      perf pmu: Make pmu_event tables const. · 47f572aa
      Ian Rogers 提交于
      Make lookup nature of data structures clearer through their type. Reduce
      scope of architecture specific pmu_event tables by making them static.
      Suggested-by: NJohn Garry <john.garry@huawei.com>
      Reviewed-by: NJohn Garry <john.garry@huawei.com>
      Signed-off-by: NIan Rogers <irogers@google.com>
      Acked-by: NAndi Kleen <ak@linux.intel.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Antonov <alexander.antonov@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andrew Kilroy <andrew.kilroy@arm.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Changbin Du <changbin.du@intel.com>
      Cc: Denys Zagorui <dzagorui@cisco.com>
      Cc: Fabian Hemmer <copy@copy.sh>
      Cc: Felix Fietkau <nbd@nbd.name>
      Cc: Heiko Carstens <hca@linux.ibm.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Kees Kook <keescook@chromium.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Nicholas Fraser <nfraser@codeweavers.com>
      Cc: Nick Desaulniers <ndesaulniers@google.com>
      Cc: Paul Clarke <pc@us.ibm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Riccardo Mancini <rickyman7@gmail.com>
      Cc: Sami Tolvanen <samitolvanen@google.com>
      Cc: ShihCheng Tu <mrtoastcheng@gmail.com>
      Cc: Song Liu <songliubraving@fb.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Sumanth Korikkar <sumanthk@linux.ibm.com>
      Cc: Thomas Richter <tmricht@linux.ibm.com>
      Cc: Wan Jiabing <wanjiabing@vivo.com>
      Cc: Zhen Lei <thunder.leizhen@huawei.com>
      Link: https://lore.kernel.org/r/20211015172132.1162559-5-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      47f572aa
    • I
      perf pmu: Make pmu_sys_event_tables const. · 857974a6
      Ian Rogers 提交于
      Make lookup nature of data structures clearer through their type.
      Reviewed-by: NJohn Garry <john.garry@huawei.com>
      Signed-off-by: NIan Rogers <irogers@google.com>
      Acked-by: NAndi Kleen <ak@linux.intel.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Antonov <alexander.antonov@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andrew Kilroy <andrew.kilroy@arm.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Changbin Du <changbin.du@intel.com>
      Cc: Denys Zagorui <dzagorui@cisco.com>
      Cc: Fabian Hemmer <copy@copy.sh>
      Cc: Felix Fietkau <nbd@nbd.name>
      Cc: Heiko Carstens <hca@linux.ibm.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Kees Kook <keescook@chromium.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Nicholas Fraser <nfraser@codeweavers.com>
      Cc: Nick Desaulniers <ndesaulniers@google.com>
      Cc: Paul Clarke <pc@us.ibm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Riccardo Mancini <rickyman7@gmail.com>
      Cc: Sami Tolvanen <samitolvanen@google.com>
      Cc: ShihCheng Tu <mrtoastcheng@gmail.com>
      Cc: Song Liu <songliubraving@fb.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Sumanth Korikkar <sumanthk@linux.ibm.com>
      Cc: Thomas Richter <tmricht@linux.ibm.com>
      Cc: Wan Jiabing <wanjiabing@vivo.com>
      Cc: Zhen Lei <thunder.leizhen@huawei.com>
      Link: https://lore.kernel.org/r/20211015172132.1162559-4-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      857974a6
    • I
      perf pmu: Add const to pmu_events_map. · 0ec43c08
      Ian Rogers 提交于
      The pmu_events_map is generated at compile time and used for lookup. For
      testing purposes we need to swap the map being used.
      
      Having the pmu_events_map be non-const is misleading as it may be an out
      argument.
      
      Make it const and update uses so they work on const too.
      Reviewed-by: NJohn Garry <john.garry@huawei.com>
      Signed-off-by: NIan Rogers <irogers@google.com>
      Acked-by: NAndi Kleen <ak@linux.intel.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Antonov <alexander.antonov@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andrew Kilroy <andrew.kilroy@arm.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Changbin Du <changbin.du@intel.com>
      Cc: Denys Zagorui <dzagorui@cisco.com>
      Cc: Fabian Hemmer <copy@copy.sh>
      Cc: Felix Fietkau <nbd@nbd.name>
      Cc: Heiko Carstens <hca@linux.ibm.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Kees Kook <keescook@chromium.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Nicholas Fraser <nfraser@codeweavers.com>
      Cc: Nick Desaulniers <ndesaulniers@google.com>
      Cc: Paul Clarke <pc@us.ibm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Riccardo Mancini <rickyman7@gmail.com>
      Cc: Sami Tolvanen <samitolvanen@google.com>
      Cc: ShihCheng Tu <mrtoastcheng@gmail.com>
      Cc: Song Liu <songliubraving@fb.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Sumanth Korikkar <sumanthk@linux.ibm.com>
      Cc: Thomas Richter <tmricht@linux.ibm.com>
      Cc: Wan Jiabing <wanjiabing@vivo.com>
      Cc: Zhen Lei <thunder.leizhen@huawei.com>
      Link: https://lore.kernel.org/r/20211015172132.1162559-3-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      0ec43c08
  8. 03 9月, 2021 1 次提交
    • K
      perf pmu: Add PMU alias support · 13d60ba0
      Kan Liang 提交于
      A perf uncore PMU may have two PMU names, a real name and an alias. The
      alias is exported at /sys/bus/event_source/devices/uncore_*/alias.
      The perf tool should support the alias as well.
      
      Add alias_name in the struct perf_pmu to store the alias. For the PMU
      which doesn't have an alias. It's NULL.
      
      Introduce two X86 specific functions to retrieve the real name and the
      alias separately.
      
      Only go through the sysfs to retrieve the mapping between the real name
      and the alias once. The result is cached in a list, uncore_pmu_list.
      
      Nothing changed for the other ARCHs.
      
      With the patch, the perf tool can monitor the PMU with either the real
      name or the alias.
      
      Use the real name,
       $ perf stat -e uncore_cha_2/event=1/ -x,
         4044879584,,uncore_cha_2/event=1/,2528059205,100.00,,
      
      Use the alias,
       $ perf stat -e uncore_type_0_2/event=1/ -x,
         3659675336,,uncore_type_0_2/event=1/,2287306455,100.00,,
      
      Committer notes:
      
      Rename 'struct perf_pmu_alias_name' to 'pmu_alias', the 'perf_' prefix
      should be used for libperf, things inside just tools/perf/ are being
      moved away from that prefix.
      
      Also 'pmu_alias' is shorter and reflects the abstraction.
      
      Also don't use 'pmu' as the name for variables for that type, we should
      use that for the 'struct perf_pmu' variables, avoiding confusion. Use
      'pmu_alias' for 'struct pmu_alias' variables.
      Co-developed-by: NJin Yao <yao.jin@linux.intel.com>
      Co-developed-by: NArnaldo Carvalho de Melo <acme@kernel.org>
      Signed-off-by: NKan Liang <kan.liang@linux.intel.com>
      Reviewed-by: NAndi Kleen <ak@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Riccardo Mancini <rickyman7@gmail.com>
      Link: http://lore.kernel.org/lkml/20210902065955.1299-2-yao.jin@linux.intel.comSigned-off-by: NJin Yao <yao.jin@linux.intel.com>
      Signed-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      13d60ba0
  9. 12 8月, 2021 1 次提交
    • J
      perf tools: Enable on a list of CPUs for hybrid · 1d3351e6
      Jin Yao 提交于
      The 'perf record' and 'perf stat' commands have supported the option
      '-C/--cpus' to count or collect only on the list of CPUs provided. This
      option needs to be supported for hybrid as well.
      
      For hybrid support, it needs to check that the cpu list are available
      on hybrid PMU. One example for AlderLake, cpu0-7 is 'cpu_core', cpu8-11
      is 'cpu_atom'.
      
      Before:
      
        # perf stat -e cpu_core/cycles/ -C11 -- sleep 1
      
         Performance counter stats for 'CPU(s) 11':
      
           <not supported>      cpu_core/cycles/
      
               1.006179431 seconds time elapsed
      
      The 'perf stat' command silently returned "<not supported>" without any
      helpful information. It should error out pointing out that that cpu11
      was not 'cpu_core'.
      
      After:
      
        # perf stat -e cpu_core/cycles/ -C11 -- sleep 1
        WARNING: 11 isn't a 'cpu_core', please use a CPU list in the 'cpu_core' range (0-7)
        failed to use cpu list 11
      
      We also need to support the events without pmu prefix specified.
      
        # perf stat -e cycles -C11 -- sleep 1
        WARNING: 11 isn't a 'cpu_core', please use a CPU list in the 'cpu_core' range (0-7)
      
         Performance counter stats for 'CPU(s) 11':
      
                 1,067,373      cpu_atom/cycles/
      
               1.005544738 seconds time elapsed
      
      The perf tool creates two cycles events automatically, cpu_core/cycles/ and
      cpu_atom/cycles/. It checks that cpu11 is not 'cpu_core', then shows a warning
      for cpu_core/cycles/ and only count the cpu_atom/cycles/.
      
      If part of cpus are 'cpu_core' and part of cpus are 'cpu_atom', for example,
      
        # perf stat -e cycles -C0,11 -- sleep 1
        WARNING: use 0 in 'cpu_core' for 'cycles', skip other cpus in list.
        WARNING: use 11 in 'cpu_atom' for 'cycles', skip other cpus in list.
      
         Performance counter stats for 'CPU(s) 0,11':
      
                 1,914,704      cpu_core/cycles/
                 2,036,983      cpu_atom/cycles/
      
               1.005815641 seconds time elapsed
      
      It now automatically selects cpu0 for cpu_core/cycles/, selects cpu11 for
      cpu_atom/cycles/, and output with some warnings.
      
      Some more complex examples,
      
        # perf stat -e cycles,instructions -C0,11 -- sleep 1
        WARNING: use 0 in 'cpu_core' for 'cycles', skip other cpus in list.
        WARNING: use 11 in 'cpu_atom' for 'cycles', skip other cpus in list.
        WARNING: use 0 in 'cpu_core' for 'instructions', skip other cpus in list.
        WARNING: use 11 in 'cpu_atom' for 'instructions', skip other cpus in list.
      
         Performance counter stats for 'CPU(s) 0,11':
      
                 2,780,387      cpu_core/cycles/
                 1,583,432      cpu_atom/cycles/
                 3,957,277      cpu_core/instructions/
                 1,167,089      cpu_atom/instructions/
      
               1.006005124 seconds time elapsed
      
        # perf stat -e cycles,cpu_atom/instructions/ -C0,11 -- sleep 1
        WARNING: use 0 in 'cpu_core' for 'cycles', skip other cpus in list.
        WARNING: use 11 in 'cpu_atom' for 'cycles', skip other cpus in list.
        WARNING: use 11 in 'cpu_atom' for 'cpu_atom/instructions/', skip other cpus in list.
      
         Performance counter stats for 'CPU(s) 0,11':
      
                 3,290,301      cpu_core/cycles/
                 1,953,073      cpu_atom/cycles/
                 1,407,869      cpu_atom/instructions/
      
               1.006260912 seconds time elapsed
      Signed-off-by: NJin Yao <yao.jin@linux.intel.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jin Yao <yao.jin@intel.com>
      Cc: Kan Liang <kan.liang@intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: https //lore.kernel.org/r/20210723063433.7318-4-yao.jin@linux.intel.com
      Signed-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      1d3351e6
  10. 11 8月, 2021 2 次提交
    • J
      perf pmu: Make pmu_add_sys_aliases() public · e199f47f
      John Garry 提交于
      Function pmu_add_sys_aliases() will be required for the PMU events test
      for system events aliases, so make it public.
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: linuxarm@huawei.com
      Link: https //lore.kernel.org/r/1627566986-30605-10-git-send-email-john.garry@huawei.com
      Signed-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      e199f47f
    • J
      perf pmu: Check .is_uncore field in pmu_add_cpu_aliases_map() · 5806099a
      John Garry 提交于
      Calling pmu_is_uncore() for fake PMUs does not work, as it checks sysfs
      for the PMU details (which won't exist).
      
      Check .is_uncore field instead, which makes sense anyway.
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: linuxarm@huawei.com
      Link: https //lore.kernel.org/r/1627566986-30605-7-git-send-email-john.garry@huawei.com
      Signed-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      5806099a
  11. 28 7月, 2021 1 次提交
    • J
      perf pmu: Fix alias matching · c07d5c92
      John Garry 提交于
      Commit c47a5599 ("perf tools: Fix pattern matching for same
      substring in different PMU type"), may have fixed some alias matching,
      but has broken some others.
      
      Firstly it cannot handle the simple scenario of PMU name in form
      pmu_name{digits} - it can only handle pmu_name_{digits}.
      
      Secondly it cannot handle more complex matching in the case where we
      have multiple tokens. In this scenario, the code failed to realise that
      we may examine multiple substrings in the PMU name.
      
      Fix in two ways:
      
      - Change perf_pmu__valid_suffix() to accept a PMU name without '_' in the
        suffix
      
      - Only pay attention to perf_pmu__valid_suffix() for the final token
      
      Also add const qualifiers as necessary to avoid casting.
      
      Fixes: c47a5599 ("perf tools: Fix pattern matching for same substring in different PMU type")
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Tested-by: NJin Yao <yao.jin@linux.intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: http://lore.kernel.org/lkml/1626793819-79090-1-git-send-email-john.garry@huawei.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      c07d5c92
  12. 14 7月, 2021 1 次提交
    • J
      perf pmu: Skip invalid hybrid pmu · 49afa7f6
      Jin Yao 提交于
      On hybrid platform, such as Alderlake, if atom CPUs are offlined,
      the kernel still exports the sysfs path '/sys/devices/cpu_atom/' for
      'cpu_atom' pmu but the file '/sys/devices/cpu_atom/cpus' is empty,
      which indicates this is an invalid pmu.
      
      Need to check and skip the invalid hybrid pmu.
      
      Before:
      
        # perf list
        ...
        branch-instructions OR cpu_atom/branch-instructions/ [Kernel PMU event]
        branch-instructions OR cpu_core/branch-instructions/ [Kernel PMU event]
        branch-misses OR cpu_atom/branch-misses/           [Kernel PMU event]
        branch-misses OR cpu_core/branch-misses/           [Kernel PMU event]
        bus-cycles OR cpu_atom/bus-cycles/                 [Kernel PMU event]
        bus-cycles OR cpu_core/bus-cycles/                 [Kernel PMU event]
        ...
      
      The cpu_atom events are still displayed even if atom CPUs are offlined.
      
      After:
      
        # perf list
        ...
        branch-instructions OR cpu_core/branch-instructions/ [Kernel PMU event]
        branch-misses OR cpu_core/branch-misses/           [Kernel PMU event]
        bus-cycles OR cpu_core/bus-cycles/                 [Kernel PMU event]
        ...
      
      Now only cpu_core events are displayed.
      Signed-off-by: NJin Yao <yao.jin@linux.intel.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Jin Yao <yao.jin@intel.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: http://lore.kernel.org/lkml/20210708013701.20347-2-yao.jin@linux.intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      49afa7f6
  13. 10 7月, 2021 1 次提交
    • J
      perf tools: Fix pattern matching for same substring in different PMU type · c47a5599
      Jin Yao 提交于
      Some different PMU types may have the same substring. For example, on
      Icelake server we have PMU types "uncore_imc" and
      "uncore_imc_free_running". Both PMU types have the substring
      "uncore_imc".  But the parser wrongly thinks they are the same PMU type.
      
      We enable an imc event,
      perf stat -e uncore_imc/event=0xe3/ -a -- sleep 1
      
      Perf actually expands the event to:
      
        uncore_imc_0/event=0xe3/
        uncore_imc_1/event=0xe3/
        uncore_imc_2/event=0xe3/
        uncore_imc_3/event=0xe3/
        uncore_imc_4/event=0xe3/
        uncore_imc_5/event=0xe3/
        uncore_imc_6/event=0xe3/
        uncore_imc_7/event=0xe3/
        uncore_imc_free_running_0/event=0xe3/
        uncore_imc_free_running_1/event=0xe3/
        uncore_imc_free_running_3/event=0xe3/
        uncore_imc_free_running_4/event=0xe3/
      
      That's because the "uncore_imc_free_running" matches the
      pattern "uncore_imc*".
      
      Now we check that the last characters of PMU name is '_<digit>'.
      
      For example, for pattern "uncore_imc*", "uncore_imc_0" is parsed ok, but
      "uncore_imc_free_running_0" fails.
      
      Fixes: b2b9d3a3 ("perf pmu: Support wildcards on pmu name in dynamic pmu events")
      Signed-off-by: NJin Yao <yao.jin@linux.intel.com>
      Reviewed-by: NKan Liang <kan.liang@linux.intel.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Agustin Vega-Frias <agustinv@codeaurora.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: http://lore.kernel.org/lkml/20210701064253.1175-1-yao.jin@linux.intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      c47a5599
  14. 29 4月, 2021 4 次提交
  15. 09 4月, 2021 1 次提交
  16. 24 3月, 2021 1 次提交
  17. 15 3月, 2021 1 次提交
    • J
      perf pmu: Validate raw event with sysfs exported format bits · e4064776
      Jin Yao 提交于
      A raw PMU event (eventsel+umask) in the form of rNNN is supported
      by perf but lacks of checking for the validity of raw encoding.
      
      For example, bit 16 and bit 17 are not valid on KBL but perf doesn't
      report warning when encoding with these bits.
      
      Before:
      
        # ./perf stat -e cpu/r031234/ -a -- sleep 1
      
         Performance counter stats for 'system wide':
      
                         0      cpu/r031234/
      
               1.003798924 seconds time elapsed
      
      It may silently measure the wrong event!
      
      The kernel supported bits have been exported through
      /sys/devices/<pmu>/format/. Perf collects the information to
      'struct perf_pmu_format' and links it to 'pmu->format' list.
      
      The 'struct perf_pmu_format' has a bitmap which records the
      valid bits for this format. For example,
      
        root@kbl-ppc:/sys/devices/cpu/format# cat umask
        config:8-15
      
      The valid bits (bit8-bit15) are recorded in bitmap of format 'umask'.
      
      We collect total valid bits of all formats, save to a local variable
      'masks' and reverse it. Now '~masks' represents total invalid bits.
      
      bits = config & ~masks;
      
      The set bits in 'bits' indicate the invalid bits used in config.
      Finally we use bitmap_scnprintf to report the invalid bits.
      
      Some architectures may not export supported bits through sysfs,
      so if masks is 0, perf_pmu__warn_invalid_config directly returns.
      
      After:
      
      Single event without name:
      
        # ./perf stat -e cpu/r031234/ -a -- sleep 1
        WARNING: event 'N/A' not valid (bits 16-17 of config '31234' not supported by kernel)!
      
         Performance counter stats for 'system wide':
      
                         0      cpu/r031234/
      
               1.001597373 seconds time elapsed
      
      Multiple events with names:
      
        # ./perf stat -e cpu/rf01234,name=aaa/,cpu/r031234,name=bbb/ -a -- sleep 1
        WARNING: event 'aaa' not valid (bits 20,22 of config 'f01234' not supported by kernel)!
        WARNING: event 'bbb' not valid (bits 16-17 of config '31234' not supported by kernel)!
      
         Performance counter stats for 'system wide':
      
                         0      aaa
                         0      bbb
      
               1.001573787 seconds time elapsed
      
      Warnings are reported for invalid bits.
      Co-developed-by: NJiri Olsa <jolsa@redhat.com>
      Signed-off-by: NJin Yao <yao.jin@linux.intel.com>
      Reviewed-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Jin Yao <yao.jin@intel.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: http://lore.kernel.org/lkml/20210310051138.12154-1-yao.jin@linux.intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      e4064776
  18. 18 12月, 2020 2 次提交
    • J
      perf pmu: Add pmu_add_sys_aliases() · 4513c719
      John Garry 提交于
      Add pmu_add_sys_aliases() to add system PMU events aliases.
      
      For adding system PMU events, iterate through all the events for all SoC
      event tables in pmu_sys_event_tables[].
      
      Matches must satisfy both:
      - PMU identifier matches event "compat" value
      - event "Unit" member must match, same as uncore event aliases matched by
        CPUID
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Acked-by: NKajol Jain <kjain@linux.ibm.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Kim Phillips <kim.phillips@amd.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linuxarm@huawei.com
      Link: http://lore.kernel.org/lkml/1607080216-36968-5-git-send-email-john.garry@huawei.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      4513c719
    • J
      perf pmu: Add pmu_id() · 51d54847
      John Garry 提交于
      Add a function to read the PMU id sysfs entry. This is only done for uncore
      PMUs where this would possibly be relevant.
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Acked-by: NKajol Jain <kjain@linux.ibm.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Kim Phillips <kim.phillips@amd.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linuxarm@huawei.com
      Link: http://lore.kernel.org/lkml/1607080216-36968-4-git-send-email-john.garry@huawei.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      51d54847
  19. 15 9月, 2020 2 次提交
    • N
      perf test: Free formats for perf pmu parse test · d26383dc
      Namhyung Kim 提交于
      The following leaks were detected by ASAN:
      
        Indirect leak of 360 byte(s) in 9 object(s) allocated from:
          #0 0x7fecc305180e in calloc (/lib/x86_64-linux-gnu/libasan.so.5+0x10780e)
          #1 0x560578f6dce5 in perf_pmu__new_format util/pmu.c:1333
          #2 0x560578f752fc in perf_pmu_parse util/pmu.y:59
          #3 0x560578f6a8b7 in perf_pmu__format_parse util/pmu.c:73
          #4 0x560578e07045 in test__pmu tests/pmu.c:155
          #5 0x560578de109b in run_test tests/builtin-test.c:410
          #6 0x560578de109b in test_and_print tests/builtin-test.c:440
          #7 0x560578de401a in __cmd_test tests/builtin-test.c:661
          #8 0x560578de401a in cmd_test tests/builtin-test.c:807
          #9 0x560578e49354 in run_builtin /home/namhyung/project/linux/tools/perf/perf.c:312
          #10 0x560578ce71a8 in handle_internal_command /home/namhyung/project/linux/tools/perf/perf.c:364
          #11 0x560578ce71a8 in run_argv /home/namhyung/project/linux/tools/perf/perf.c:408
          #12 0x560578ce71a8 in main /home/namhyung/project/linux/tools/perf/perf.c:538
          #13 0x7fecc2b7acc9 in __libc_start_main ../csu/libc-start.c:308
      
      Fixes: cff7f956 ("perf tests: Move pmu tests into separate object")
      Signed-off-by: NNamhyung Kim <namhyung@kernel.org>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Stephane Eranian <eranian@google.com>
      Link: http://lore.kernel.org/lkml/20200915031819.386559-12-namhyung@kernel.orgSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      d26383dc
    • N
      perf test: Free aliases for PMU event map aliases test · 22fe5a25
      Namhyung Kim 提交于
      The aliases were never released causing the following leaks:
      
        Indirect leak of 1224 byte(s) in 9 object(s) allocated from:
          #0 0x7feefb830628 in malloc (/lib/x86_64-linux-gnu/libasan.so.5+0x107628)
          #1 0x56332c8f1b62 in __perf_pmu__new_alias util/pmu.c:322
          #2 0x56332c8f401f in pmu_add_cpu_aliases_map util/pmu.c:778
          #3 0x56332c792ce9 in __test__pmu_event_aliases tests/pmu-events.c:295
          #4 0x56332c792ce9 in test_aliases tests/pmu-events.c:367
          #5 0x56332c76a09b in run_test tests/builtin-test.c:410
          #6 0x56332c76a09b in test_and_print tests/builtin-test.c:440
          #7 0x56332c76ce69 in __cmd_test tests/builtin-test.c:695
          #8 0x56332c76ce69 in cmd_test tests/builtin-test.c:807
          #9 0x56332c7d2214 in run_builtin /home/namhyung/project/linux/tools/perf/perf.c:312
          #10 0x56332c6701a8 in handle_internal_command /home/namhyung/project/linux/tools/perf/perf.c:364
          #11 0x56332c6701a8 in run_argv /home/namhyung/project/linux/tools/perf/perf.c:408
          #12 0x56332c6701a8 in main /home/namhyung/project/linux/tools/perf/perf.c:538
          #13 0x7feefb359cc9 in __libc_start_main ../csu/libc-start.c:308
      
      Fixes: 956a7835 ("perf test: Test pmu-events aliases")
      Signed-off-by: NNamhyung Kim <namhyung@kernel.org>
      Reviewed-by: NJohn Garry <john.garry@huawei.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Stephane Eranian <eranian@google.com>
      Link: http://lore.kernel.org/lkml/20200915031819.386559-11-namhyung@kernel.orgSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      22fe5a25
  20. 23 6月, 2020 3 次提交
    • J
      perf pmu: Improve CPU core PMU HW event list ordering · ce0dc7d2
      John Garry 提交于
      For perf list, the CPU core PMU HW event ordering is such that not all
      events may will be listed adjacent - consider this example:
      
        $ tools/perf/perf list
      
        List of pre-defined events (to be used in -e):
      
          duration_time                                      [Tool event]
      
          branch-instructions OR cpu/branch-instructions/    [Kernel PMU event]
          branch-misses OR cpu/branch-misses/                [Kernel PMU event]
          bus-cycles OR cpu/bus-cycles/                      [Kernel PMU event]
          cache-misses OR cpu/cache-misses/                  [Kernel PMU event]
          cache-references OR cpu/cache-references/          [Kernel PMU event]
          cpu-cycles OR cpu/cpu-cycles/                      [Kernel PMU event]
          cstate_core/c3-residency/                          [Kernel PMU event]
          cstate_core/c6-residency/                          [Kernel PMU event]
          cstate_core/c7-residency/                          [Kernel PMU event]
          cstate_pkg/c2-residency/                           [Kernel PMU event]
          cstate_pkg/c3-residency/                           [Kernel PMU event]
          cstate_pkg/c6-residency/                           [Kernel PMU event]
          cstate_pkg/c7-residency/                           [Kernel PMU event]
          cycles-ct OR cpu/cycles-ct/                        [Kernel PMU event]
          cycles-t OR cpu/cycles-t/                          [Kernel PMU event]
          el-abort OR cpu/el-abort/                          [Kernel PMU event]
          el-capacity OR cpu/el-capacity/                    [Kernel PMU event]
      
      Notice in the above example how the cstate_core PMU events are mixed in
      the middle of the CPU core events.
      
      For my arm64 platform, all the uncore events get mixed in, making the list
      very disorganised:
      
          page-faults OR faults                              [Software event]
          task-clock                                         [Software event]
          duration_time                                      [Tool event]
          L1-dcache-load-misses                              [Hardware cache event]
          L1-dcache-loads                                    [Hardware cache event]
          L1-icache-load-misses                              [Hardware cache event]
          L1-icache-loads                                    [Hardware cache event]
          branch-load-misses                                 [Hardware cache event]
          branch-loads                                       [Hardware cache event]
          dTLB-load-misses                                   [Hardware cache event]
          dTLB-loads                                         [Hardware cache event]
          iTLB-load-misses                                   [Hardware cache event]
          iTLB-loads                                         [Hardware cache event]
          br_mis_pred OR armv8_pmuv3_0/br_mis_pred/          [Kernel PMU event]
          br_mis_pred_retired OR armv8_pmuv3_0/br_mis_pred_retired/ [Kernel PMU event]
          br_pred OR armv8_pmuv3_0/br_pred/                  [Kernel PMU event]
          br_retired OR armv8_pmuv3_0/br_retired/            [Kernel PMU event]
          br_return_retired OR armv8_pmuv3_0/br_return_retired/ [Kernel PMU event]
          bus_access OR armv8_pmuv3_0/bus_access/            [Kernel PMU event]
          bus_cycles OR armv8_pmuv3_0/bus_cycles/            [Kernel PMU event]
          cid_write_retired OR armv8_pmuv3_0/cid_write_retired/ [Kernel PMU event]
          cpu_cycles OR armv8_pmuv3_0/cpu_cycles/            [Kernel PMU event]
          dtlb_walk OR armv8_pmuv3_0/dtlb_walk/              [Kernel PMU event]
          exc_return OR armv8_pmuv3_0/exc_return/            [Kernel PMU event]
          exc_taken OR armv8_pmuv3_0/exc_taken/              [Kernel PMU event]
          hisi_sccl1_ddrc0/act_cmd/                          [Kernel PMU event]
          hisi_sccl1_ddrc0/flux_rcmd/                        [Kernel PMU event]
          hisi_sccl1_ddrc0/flux_rd/                          [Kernel PMU event]
          hisi_sccl1_ddrc0/flux_wcmd/                        [Kernel PMU event]
          hisi_sccl1_ddrc0/flux_wr/                          [Kernel PMU event]
          hisi_sccl1_ddrc0/pre_cmd/                          [Kernel PMU event]
          hisi_sccl1_ddrc0/rnk_chg/                          [Kernel PMU event]
      
      ...
      
          hisi_sccl7_l3c21/wr_hit_cpipe/                     [Kernel PMU event]
          hisi_sccl7_l3c21/wr_hit_spipe/                     [Kernel PMU event]
          hisi_sccl7_l3c21/wr_spipe/                         [Kernel PMU event]
          inst_retired OR armv8_pmuv3_0/inst_retired/        [Kernel PMU event]
          inst_spec OR armv8_pmuv3_0/inst_spec/              [Kernel PMU event]
          itlb_walk OR armv8_pmuv3_0/itlb_walk/              [Kernel PMU event]
          l1d_cache OR armv8_pmuv3_0/l1d_cache/              [Kernel PMU event]
          l1d_cache_refill OR armv8_pmuv3_0/l1d_cache_refill/ [Kernel PMU event]
          l1d_cache_wb OR armv8_pmuv3_0/l1d_cache_wb/        [Kernel PMU event]
          l1d_tlb OR armv8_pmuv3_0/l1d_tlb/                  [Kernel PMU event]
          l1d_tlb_refill OR armv8_pmuv3_0/l1d_tlb_refill/    [Kernel PMU event]
      
      So the events are list alphabetically. However, CPU core event listing is
      special from commit dc098b35 ("perf list: List kernel supplied event
      aliases"), in that the alias and full event is shown (in that order).
      As such, the core events may become sparse.
      
      Improve this by grouping the CPU core events and ensure that they are
      listed first for kernel PMU events. For the first example, above, this
      now looks like:
      
          duration_time                                      [Tool event]
          branch-instructions OR cpu/branch-instructions/    [Kernel PMU event]
          branch-misses OR cpu/branch-misses/                [Kernel PMU event]
          bus-cycles OR cpu/bus-cycles/                      [Kernel PMU event]
          cache-misses OR cpu/cache-misses/                  [Kernel PMU event]
          cache-references OR cpu/cache-references/          [Kernel PMU event]
          cpu-cycles OR cpu/cpu-cycles/                      [Kernel PMU event]
          cycles-ct OR cpu/cycles-ct/                        [Kernel PMU event]
          cycles-t OR cpu/cycles-t/                          [Kernel PMU event]
          el-abort OR cpu/el-abort/                          [Kernel PMU event]
          el-capacity OR cpu/el-capacity/                    [Kernel PMU event]
          el-commit OR cpu/el-commit/                        [Kernel PMU event]
          el-conflict OR cpu/el-conflict/                    [Kernel PMU event]
          el-start OR cpu/el-start/                          [Kernel PMU event]
          instructions OR cpu/instructions/                  [Kernel PMU event]
          mem-loads OR cpu/mem-loads/                        [Kernel PMU event]
          mem-stores OR cpu/mem-stores/                      [Kernel PMU event]
          ref-cycles OR cpu/ref-cycles/                      [Kernel PMU event]
          topdown-fetch-bubbles OR cpu/topdown-fetch-bubbles/ [Kernel PMU event]
          topdown-recovery-bubbles OR cpu/topdown-recovery-bubbles/ [Kernel PMU event]
          topdown-slots-issued OR cpu/topdown-slots-issued/  [Kernel PMU event]
          topdown-slots-retired OR cpu/topdown-slots-retired/ [Kernel PMU event]
          topdown-total-slots OR cpu/topdown-total-slots/    [Kernel PMU event]
          tx-abort OR cpu/tx-abort/                          [Kernel PMU event]
          tx-capacity OR cpu/tx-capacity/                    [Kernel PMU event]
          tx-commit OR cpu/tx-commit/                        [Kernel PMU event]
          tx-conflict OR cpu/tx-conflict/                    [Kernel PMU event]
          tx-start OR cpu/tx-start/                          [Kernel PMU event]
          cstate_core/c3-residency/                          [Kernel PMU event]
          cstate_core/c6-residency/                          [Kernel PMU event]
          cstate_core/c7-residency/                          [Kernel PMU event]
          cstate_pkg/c2-residency/                           [Kernel PMU event]
          cstate_pkg/c3-residency/                           [Kernel PMU event]
          cstate_pkg/c6-residency/                           [Kernel PMU event]
          cstate_pkg/c7-residency/                           [Kernel PMU event]
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Acked-by: NNamhyung Kim <namhyung@kernel.org>
      Tested-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linuxarm@huawei.com
      Link: http://lore.kernel.org/lkml/1592384514-119954-3-git-send-email-john.garry@huawei.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      ce0dc7d2
    • J
      perf pmu: List kernel supplied event aliases for arm64 · c1b4745b
      John Garry 提交于
      In commit dc098b35 ("perf list: List kernel supplied event aliases"),
      the aliases for events are supplied in addition to CPU event in perf list.
      
      This relies on the name of the core PMU being "cpu", which is not the case
      for arm64, so arm64 has always missed this. Use generic is_pmu_core()
      helper which takes account of arm64 to make this feature work for arm64
      (and possibly other archs).
      
      Sample, before:
      
        armv8_pmuv3_0/br_mis_pred/          [Kernel PMU event]
      
      after:
      
        br_mis_pred OR armv8_pmuv3_0/br_mis_pred/          [Kernel PMU event]
      Signed-off-by: NJohn Garry <john.garry@huawei.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Acked-by: NNamhyung Kim <namhyung@kernel.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linuxarm@huawei.com
      Link: http://lore.kernel.org/lkml/1592384514-119954-2-git-send-email-john.garry@huawei.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      c1b4745b
    • A
      perf pmu: Add a perf_pmu__fake object to use with __parse_events() · e46fc8d9
      Arnaldo Carvalho de Melo 提交于
      When wanting to use the support in __parse_events() for fake pmus, just
      pass it.
      
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Michael Petlan <mpetlan@redhat.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Stephane Eranian <eranian@google.com>
      Signed-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      e46fc8d9
  21. 28 5月, 2020 1 次提交
    • I
      perf parse-events: Make add PMU verbose output clearer · 4ac22b48
      Ian Rogers 提交于
      On a CPU like skylakex an uncore_iio_0 PMU may alias with
      uncore_iio_free_running_0. The latter PMU doesn't support fc_mask as a
      parameter and so pmu_config_term fails. Typically parse_events_add_pmu
      is called in a loop where if one alias succeeds errors are ignored,
      however, if multiple errors occur parse_events__handle_error will
      currently give a WARN_ONCE.
      
      This change removes the WARN_ONCE in parse_events__handle_error and
      makes it a pr_debug. It adds verbose messages to parse_events_add_pmu
      warning that non-fatal errors may occur, while giving details on the pmu
      and config terms for useful context. pmu_config_term is altered so the
      failing term and pmu are present in the case of the 'unknown term' error
      which makes spotting the free_running case more straightforward.
      
      Before:
      
        $ perf --debug verbose=3 stat -M llc_misses.pcie_read sleep 1
        Using CPUID GenuineIntel-6-55-4
        metric expr unc_iio_data_req_of_cpu.mem_read.part0 + unc_iio_data_req_of_cpu.mem_read.part1 + unc_iio_data_req_of_cpu.mem_read.part2 + unc_iio_data_req_of_cpu.mem_read.part3 for LLC_MISSES.PCIE_READ
        found event unc_iio_data_req_of_cpu.mem_read.part0
        found event unc_iio_data_req_of_cpu.mem_read.part1
        found event unc_iio_data_req_of_cpu.mem_read.part2
        found event unc_iio_data_req_of_cpu.mem_read.part3
        metric expr unc_iio_data_req_of_cpu.mem_read.part0 + unc_iio_data_req_of_cpu.mem_read.part1 + unc_iio_data_req_of_cpu.mem_read.part2 + unc_iio_data_req_of_cpu.mem_read.part3 for LLC_MISSES.PCIE_READ
        found event unc_iio_data_req_of_cpu.mem_read.part0
        found event unc_iio_data_req_of_cpu.mem_read.part1
        found event unc_iio_data_req_of_cpu.mem_read.part2
        found event unc_iio_data_req_of_cpu.mem_read.part3
        adding {unc_iio_data_req_of_cpu.mem_read.part0,unc_iio_data_req_of_cpu.mem_read.part1,unc_iio_data_req_of_cpu.mem_read.part2,unc_iio_data_req_of_cpu.mem_read.part3}:W,{unc_iio_data_req_of_cpu.mem_read.part0,unc_iio_data_req_of_cpu.mem_read.part1,unc_iio_data_req_of_cpu.mem_read.part2,unc_iio_data_req_of_cpu.mem_read.part3}:W
        intel_pt default config: tsc,mtc,mtc_period=3,psb_period=3,pt,branch
        WARNING: multiple event parsing errors
        ...
        Invalid event/parameter 'fc_mask'
        ...
      
      After:
      
        $ perf --debug verbose=3 stat -M llc_misses.pcie_read sleep 1
        Using CPUID GenuineIntel-6-55-4
        metric expr unc_iio_data_req_of_cpu.mem_read.part0 + unc_iio_data_req_of_cpu.mem_read.part1 + unc_iio_data_req_of_cpu.mem_read.part2 + unc_iio_data_req_of_cpu.mem_read.part3 for LLC_MISSES.PCIE_READ
        found event unc_iio_data_req_of_cpu.mem_read.part0
        found event unc_iio_data_req_of_cpu.mem_read.part1
        found event unc_iio_data_req_of_cpu.mem_read.part2
        found event unc_iio_data_req_of_cpu.mem_read.part3
        metric expr unc_iio_data_req_of_cpu.mem_read.part0 + unc_iio_data_req_of_cpu.mem_read.part1 + unc_iio_data_req_of_cpu.mem_read.part2 + unc_iio_data_req_of_cpu.mem_read.part3 for LLC_MISSES.PCIE_READ
        found event unc_iio_data_req_of_cpu.mem_read.part0
        found event unc_iio_data_req_of_cpu.mem_read.part1
        found event unc_iio_data_req_of_cpu.mem_read.part2
        found event unc_iio_data_req_of_cpu.mem_read.part3
        adding {unc_iio_data_req_of_cpu.mem_read.part0,unc_iio_data_req_of_cpu.mem_read.part1,unc_iio_data_req_of_cpu.mem_read.part2,unc_iio_data_req_of_cpu.mem_read.part3}:W,{unc_iio_data_req_of_cpu.mem_read.part0,unc_iio_data_req_of_cpu.mem_read.part1,unc_iio_data_req_of_cpu.mem_read.part2,unc_iio_data_req_of_cpu.mem_read.part3}:W
        intel_pt default config: tsc,mtc,mtc_period=3,psb_period=3,pt,branch
        Attempting to add event pmu 'uncore_iio_free_running_5' with 'unc_iio_data_req_of_cpu.mem_read.part0,' that may result in non-fatal errors
        After aliases, add event pmu 'uncore_iio_free_running_5' with 'fc_mask,ch_mask,umask,event,' that may result in non-fatal errors
        Attempting to add event pmu 'uncore_iio_free_running_3' with 'unc_iio_data_req_of_cpu.mem_read.part0,' that may result in non-fatal errors
        After aliases, add event pmu 'uncore_iio_free_running_3' with 'fc_mask,ch_mask,umask,event,' that may result in non-fatal errors
        Attempting to add event pmu 'uncore_iio_free_running_1' with 'unc_iio_data_req_of_cpu.mem_read.part0,' that may result in non-fatal errors
        After aliases, add event pmu 'uncore_iio_free_running_1' with 'fc_mask,ch_mask,umask,event,' that may result in non-fatal errors
        Multiple errors dropping message: unknown term 'fc_mask' for pmu 'uncore_iio_free_running_3' (valid terms: event,umask,config,config1,config2,name,period,percore)
        ...
      
        So before you see a 'WARNING: multiple event parsing errors' and
        'Invalid event/parameter'. After you see 'Attempting... that may result
        in non-fatal errors' then 'Multiple errors...' with details that
        'fc_mask' wasn't known to a free running counter. While not completely
        clean, this makes it clearer that an error hasn't really occurred.
      
      v2. addresses review feedback from Jiri Olsa <jolsa@redhat.com>.
      Signed-off-by: NIan Rogers <irogers@google.com>
      Reviewed-by: NAndi Kleen <ak@linux.intel.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: John Garry <john.garry@huawei.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Link: http://lore.kernel.org/lkml/20200513220635.54700-1-irogers@google.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      4ac22b48
  22. 06 5月, 2020 3 次提交
  23. 18 4月, 2020 1 次提交
    • K
      perf pmu: Add support for PMU capabilities · 9fbc61f8
      Kan Liang 提交于
      The PMU capabilities information, which is located at
      /sys/bus/event_source/devices/<dev>/caps, is required by perf tool.  For
      example, the max LBR information is required to stitch LBR call stack.
      
      Add perf_pmu__caps_parse() to parse the PMU capabilities information.
      The information is stored in a list.
      
      The following patch will store the capabilities information in perf
      header.
      
      Committer notes:
      
      Here's an example of such directories and its files in an i5 7th gen
      machine:
      
        [root@seventh ~]# ls -lad /sys/bus/event_source/devices/*/caps
        drwxr-xr-x. 2 root root 0 Apr 14 13:33 /sys/bus/event_source/devices/cpu/caps
        drwxr-xr-x. 2 root root 0 Apr 14 13:33 /sys/bus/event_source/devices/intel_pt/caps
        [root@seventh ~]# ls -la /sys/bus/event_source/devices/intel_pt/caps
        total 0
        drwxr-xr-x. 2 root root    0 Apr 14 13:33 .
        drwxr-xr-x. 5 root root    0 Apr 14 13:12 ..
        -r--r--r--. 1 root root 4096 Apr 16 13:10 cr3_filtering
        -r--r--r--. 1 root root 4096 Apr 16 11:42 cycle_thresholds
        -r--r--r--. 1 root root 4096 Apr 16 13:10 ip_filtering
        -r--r--r--. 1 root root 4096 Apr 16 13:10 max_subleaf
        -r--r--r--. 1 root root 4096 Apr 14 13:33 mtc
        -r--r--r--. 1 root root 4096 Apr 14 13:33 mtc_periods
        -r--r--r--. 1 root root 4096 Apr 16 13:10 num_address_ranges
        -r--r--r--. 1 root root 4096 Apr 16 13:10 output_subsys
        -r--r--r--. 1 root root 4096 Apr 16 13:10 payloads_lip
        -r--r--r--. 1 root root 4096 Apr 16 13:10 power_event_trace
        -r--r--r--. 1 root root 4096 Apr 14 13:33 psb_cyc
        -r--r--r--. 1 root root 4096 Apr 14 13:33 psb_periods
        -r--r--r--. 1 root root 4096 Apr 16 13:10 ptwrite
        -r--r--r--. 1 root root 4096 Apr 16 13:10 single_range_output
        -r--r--r--. 1 root root 4096 Apr 16 12:03 topa_multiple_entries
        -r--r--r--. 1 root root 4096 Apr 16 13:10 topa_output
        [root@seventh ~]# cat /sys/bus/event_source/devices/intel_pt/caps/topa_output
        1
        [root@seventh ~]# cat /sys/bus/event_source/devices/intel_pt/caps/topa_multiple_entries
        1
        [root@seventh ~]# cat /sys/bus/event_source/devices/intel_pt/caps/mtc
        1
        [root@seventh ~]# cat /sys/bus/event_source/devices/intel_pt/caps/power_event_trace
        0
        [root@seventh ~]#
      
        [root@seventh ~]# ls -la /sys/bus/event_source/devices/cpu/caps/
        total 0
        drwxr-xr-x. 2 root root    0 Apr 14 13:33 .
        drwxr-xr-x. 6 root root    0 Apr 14 13:12 ..
        -r--r--r--. 1 root root 4096 Apr 16 13:10 branches
        -r--r--r--. 1 root root 4096 Apr 14 13:33 max_precise
        -r--r--r--. 1 root root 4096 Apr 16 13:10 pmu_name
        [root@seventh ~]# cat /sys/bus/event_source/devices/cpu/caps/max_precise
        3
        [root@seventh ~]# cat /sys/bus/event_source/devices/cpu/caps/branches
        32
        [root@seventh ~]# cat /sys/bus/event_source/devices/cpu/caps/pmu_name
        skylake
        [root@seventh ~]#
      
      Wow, first time I've heard about
      /sys/bus/event_source/devices/cpu/caps/max_precise, I think I'll use it!
      :-)
      Signed-off-by: NKan Liang <kan.liang@linux.intel.com>
      Reviewed-by: NAndi Kleen <ak@linux.intel.com>
      Acked-by: NJiri Olsa <jolsa@redhat.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexey Budankov <alexey.budankov@linux.intel.com>
      Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Pavel Gerasimov <pavel.gerasimov@intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Vitaly Slobodskoy <vitaly.slobodskoy@intel.com>
      Link: http://lore.kernel.org/lkml/20200319202517.23423-2-kan.liang@linux.intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
      9fbc61f8