Nodes need not contain '0x' for the unit address. Drop it to fix the
below warning:

arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: reserved-memory:
'memory@0x60000' does not match any of the regexes
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-19-vkoul@kernel.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

memory node like other node should be node@reg, which is missing in this
case, so fix it up

arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 1073741824, 0, 536870912]]}
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-18-vkoul@kernel.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

reg property should be array of values, here it is a single array,
leading to below warning:

arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:reg:0: [268435456, 3869, 268439328, 168, 557056, 8192, 269484032, 4096] is too long
arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:ranges: 'oneOf' conditional failed, one must be fixed:
arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:ranges: 'oneOf' conditional failed, one must be fixed:
[[2164260864, 0, 270532608, 270532608, 0, 1048576, 2181038080, 0, 271581184, 271581184, 0, 13631488]] is not of type 'null'
[2164260864, 0, 270532608, 270532608, 0, 1048576, 2181038080, 0, 271581184, 271581184, 0, 13631488] is too long
arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:reg:0: [536870912, 3869, 536874784, 168, 524288, 8192, 537919488, 4096] is too long
arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:ranges: 'oneOf' conditional failed, one must be fixed:
arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:ranges: 'oneOf' conditional failed, one must be fixed:
[[2164260864, 0, 538968064, 538968064, 0, 1048576, 2181038080, 0, 540016640, 540016640, 0, 13631488]] is not of type 'null'
[2164260864, 0, 538968064, 538968064, 0, 1048576, 2181038080, 0, 540016640, 540016640, 0, 13631488] is too long
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-17-vkoul@kernel.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

We expect bootloader to full memory details but passing empty values
can give warning, so add a default value
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Tested-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-15-vkoul@kernel.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

We expect bootloader to full memory details but passing empty values
can give warning, so add a default value
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-14-vkoul@kernel.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

We expect bootloader to full memory details but passing empty values
can give warning, so add a default value
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Tested-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-13-vkoul@kernel.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This commits add support for Sony Xperia 10II based on the SM6125 SoC.

Currently working features:
- dmesg output to bootloader preconfigured display
- USB
- eMMC
- Volume down button
Signed-off-by: NMartin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210621195308.654587-2-martin.botka@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This commits adds the Device tree file for SM6125 SoC.
Signed-off-by: NMartin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210621195308.654587-1-martin.botka@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add dma properties to I2C and SPI nodes to make sure DMA transfers can go
through. While at it, fix up the property order in SPI nodes to make #address-
and #size-cells go after all the meaningful properties.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210615142249.170512-1-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Shuffle memory regions to make firmware loading succeed and then enable
the ipa device.
Tested-by: NSteev Klimaszewski <steev@kali.org>
Link: https://lore.kernel.org/r/20210615232816.835325-1-bjorn.andersson@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add DMA properties to I2C hosts to allow for DMA transfers.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-40-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This was overlooked earlier, fix it to ensure the busses can
work properly.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-39-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The autorepeat feature is not needed on gpio-keys.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-38-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Enable the internal uSD slot to let the user have more storage.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-37-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-36-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Delete the node on Ganges devices, as they use a different one.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-35-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

After further consideration, it is not worth to keep another
separate DTSI, as the differences between Nile and Ganges are
very minimal. Instead, let's just address the minimal differences
between Kirin and Mermaid.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-34-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Let's get loud!
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-33-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Enable and configure DWC3 and QUSB2 PHY to enable USB
functionality on Nile and Ganges boards.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-32-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Refer to nodes by their labels to match the current
convention.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-31-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add all of the RPM PM660/PM660L regulators and the fixed ones,
defining the common electrical part of this platform.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-30-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Configure the second DSI host/phy and account for them in
the mmcc node.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-29-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add nodes for camss, cci and its pinctrl in order to bring up
camera functionality.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-28-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add IMEM node and PIL reloc info as its child.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-27-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This SoC is almost identical to its older brother,
SDM660, with a few minor exceptions like the
different GPU.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-26-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

There is SO MUCH common code between these two SoCs that it makes
no sense to keep what is essentially a duplicate of 630.dtsi. Instead,
it's better to just change the things that differ.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-25-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add VADC, temperature alarm and thermal zones for pm660(l)
to allow for temperature and voltage readouts and prevent
PMIC overheating.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-24-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The PM660L PMIC has SPMI regulators on the PMIC SID 3: let's add
the compatible in order to probe them.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-23-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This will enable backlight control on WLED-enabled devices.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-22-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The PM660 PMIC has SPMI regulators on the PMIC SID 1: let's
declare the second pmic subtree and add the spmi vregs compatible
to probe them there.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-21-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The SDM630 SoC features an Adreno 508.0 GPU with a minimum frequency
of 160MHz and a maximum of (depending on the speed-bin) 775MHz.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-20-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Enlarge the size to make sure all relevant registers can be reached.
This will be required to support the modem.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-19-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Configure the ADSP remote processor and add a simple sound{}
node to make way for future development.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-18-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add a basic thermal-zones configuration to make sure the SoC
doesn't overheat itself to death.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-17-konrad.dybcio@somainline.org
[bjorn: Sorted thermal-zones below "soc"]
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add SMP2P nodes that are required for ADSP and modem bringup.
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-16-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This will enable temperature reporting for various SoC
components.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-15-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The Adreno SMMU in SDM630 needs this compatible string for proper
context handling and split pagetables support.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-14-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add the required clocks and power domains for the SMMUs to work.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-13-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add the GPU Clock Controller in SDM630 and keep it disabled by
default.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-12-konrad.dybcio@somainline.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The SDHC port 1 has interconnects and can make use of DVFS:
define the interconnections and the OPP table in order to
optimize performance and power consumption.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-11-konrad.dybcio@somainline.org
[bjorn: Dropped "sdhc1-" prefix from opp-table node]
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>