1. 20 9月, 2006 1 次提交
  2. 19 9月, 2006 2 次提交
    • L
      Revert mmiocfg heuristics and blacklist changes · 79e453d4
      Linus Torvalds 提交于
      This reverts commits 11012d41 and
      40dd2d20, which allowed us to use the
      MMIO accesses for PCI config cycles even without the area being marked
      reserved in the e820 memory tables.
      
      Those changes were needed for EFI-environment Intel macs, but broke some
      newer Intel 965 boards, so for now it's better to revert to our old
      2.6.17 behaviour and at least avoid introducing any new breakage.
      
      Andi Kleen has a set of patches that work with both EFI and the broken
      Intel 965 boards, which will be applied once they get wider testing.
      
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Edgar Hucek <hostmaster@ed-soft.at>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      79e453d4
    • L
      x86: save/restore eflags in context switch · 47a5c6fa
      Linus Torvalds 提交于
      (And reset it on new thread creation)
      
      It turns out that eflags is important to save and restore not just
      because of iopl, but due to the magic bits like the NT bit, which we
      don't want leaking between different threads.
      Tested-by: NMike Galbraith <efault@gmx.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      47a5c6fa
  3. 18 9月, 2006 2 次提交
  4. 17 9月, 2006 1 次提交
  5. 15 9月, 2006 1 次提交
  6. 14 9月, 2006 3 次提交
  7. 13 9月, 2006 5 次提交
  8. 12 9月, 2006 8 次提交
  9. 10 9月, 2006 3 次提交
  10. 09 9月, 2006 4 次提交
  11. 08 9月, 2006 1 次提交
  12. 07 9月, 2006 5 次提交
  13. 04 9月, 2006 1 次提交
  14. 03 9月, 2006 1 次提交
    • G
      [ARM] 3762/1: Fix ptrace cache coherency bug for ARM1136 VIPT nonaliasing Harvard caches · a188ad2b
      George G. Davis 提交于
      Patch from George G. Davis
      
      Resolve ARM1136 VIPT non-aliasing cache coherency issues observed when
      using ptrace to set breakpoints and cleanup copy_{to,from}_user_page()
      while we're here as requested by Russell King because "it's also far
      too heavy on non-v6 CPUs".
      
      NOTES:
      
      1. Only access_process_vm() calls copy_{to,from}_user_page().
      2. access_process_vm() calls get_user_pages() to pin down the "page".
      3. get_user_pages() calls flush_dcache_page(page) which ensures cache
         coherency between kernel and userspace mappings of "page".  However
         flush_dcache_page(page) may not invalidate I-Cache over this range
         for all cases, specifically, I-Cache is not invalidated for the VIPT
         non-aliasing case.  So memory is consistent between kernel and user
         space mappings of "page" but I-Cache may still be hot over this
         range.  IOW, we don't have to worry about flush_cache_page() before
         memcpy().
      4. Now, for the copy_to_user_page() case, after memcpy(), we must flush
         the caches so memory is consistent with kernel cache entries and
         invalidate the I-Cache if this mm region is executable.  We don't
         need to do anything after memcpy() for the copy_from_user_page()
         case since kernel cache entries will be invalidated via the same
         process above if we access "page" again.  The flush_ptrace_access()
         function (borrowed from SPARC64 implementation) is added to handle
         cache flushing after memcpy() for the copy_to_user_page() case.
      Signed-off-by: NGeorge G. Davis <gdavis@mvista.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a188ad2b
  15. 02 9月, 2006 2 次提交