1. 01 3月, 2010 2 次提交
  2. 03 12月, 2009 2 次提交
  3. 10 9月, 2009 10 次提交
  4. 24 3月, 2009 3 次提交
  5. 31 12月, 2008 1 次提交
    • A
      KVM: Add locking to virtual i8259 interrupt controller · 3f353858
      Avi Kivity 提交于
      While most accesses to the i8259 are with the kvm mutex taken, the call
      to kvm_pic_read_irq() is not.  We can't easily take the kvm mutex there
      since the function is called with interrupts disabled.
      
      Fix by adding a spinlock to the virtual interrupt controller.  Since we
      can't send an IPI under the spinlock (we also take the same spinlock in
      an irq disabled context), we defer the IPI until the spinlock is released.
      Similarly, we defer irq ack notifications until after spinlock release to
      avoid lock recursion.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      3f353858
  6. 15 10月, 2008 4 次提交
    • M
      KVM: PIC: enhance IPI avoidance · e4825800
      Marcelo Tosatti 提交于
      The PIC code makes little effort to avoid kvm_vcpu_kick(), resulting in
      unnecessary guest exits in some conditions.
      
      For example, if the timer interrupt is routed through the IOAPIC, IRR
      for IRQ 0 will get set but not cleared, since the APIC is handling the
      acks.
      
      This means that everytime an interrupt < 16 is triggered, the priority
      logic will find IRQ0 pending and send an IPI to vcpu0 (in case IRQ0 is
      not masked, which is Linux's case).
      
      Introduce a new variable isr_ack to represent the IRQ's for which the
      guest has been signalled / cleared the ISR. Use it to avoid more than
      one IPI per trigger-ack cycle, in addition to the avoidance when ISR is
      set in get_priority().
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      e4825800
    • M
      KVM: fix i8259 reset irq acking · 85428ac7
      Marcelo Tosatti 提交于
      The irq ack during pic reset has three problems:
      
      - Ignores slave/master PIC, using gsi 0-8 for both.
      - Generates an ACK even if the APIC is in control.
      - Depends upon IMR being clear, which is broken if the irq was masked
      at the time it was generated.
      
      The last one causes the BIOS to hang after the first reboot of
      Windows installation, since PIT interrupts stop.
      
      [avi: fix check whether pic interrupts are seen by cpu]
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: NAvi Kivity <avi@qumranet.com>
      85428ac7
    • M
      KVM: irq ack notification · f5244726
      Marcelo Tosatti 提交于
      Based on a patch from: Ben-Ami Yassour <benami@il.ibm.com>
      which was based on a patch from: Amit Shah <amit.shah@qumranet.com>
      
      Notify IRQ acking on PIC/APIC emulation. The previous patch missed two things:
      
      - Edge triggered interrupts on IOAPIC
      - PIC reset with IRR/ISR set should be equivalent to ack (LAPIC probably
      needs something similar).
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      CC: Amit Shah <amit.shah@qumranet.com>
      CC: Ben-Ami Yassour <benami@il.ibm.com>
      Signed-off-by: NAvi Kivity <avi@qumranet.com>
      f5244726
    • A
      KVM: Consolidate PIC isr clearing into a function · 7edd0ce0
      Avi Kivity 提交于
      Signed-off-by: NAvi Kivity <avi@qumranet.com>
      7edd0ce0
  7. 20 7月, 2008 2 次提交
  8. 31 1月, 2008 1 次提交
  9. 30 1月, 2008 2 次提交
  10. 13 10月, 2007 3 次提交