- 27 3月, 2018 3 次提交
-
-
由 Gabriel Fernandez 提交于
stm32mp1 RCC IP 1 has a reset SET register and a reset CLEAR register. Writing '0' on reset SET register has no effect Writing '1' on reset SET register activates the reset of the corresponding peripheral Writing '0' on reset CLEAR register has no effect Writing '1' on reset CLEAR register releases the reset of the corresponding peripheral See Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Katsuhiro Suzuki 提交于
Add reset lines for audio subsystem (AIO) on UniPhier Pro4/Pro5/PXs2 SoCs. Signed-off-by: NKatsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Masahiro Yamada 提交于
This config select's MFD_SYSCON, but does not depend on HAS_IOMEM. Compile testing on architecture without HAS_IOMEM causes "unmet direct dependencies" in Kconfig phase. Detected by "make ARCH=score allyesconfig". Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 21 2月, 2018 1 次提交
-
-
由 Joel Stanley 提交于
ASPEED BMC SoCs have a reset controller in the LPC IP that can be controlled using this driver to release the UARTs from reset. No special configuration is required, so only the compatible string is added. Signed-off-by: NJoel Stanley <joel@jms.id.au> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 16 2月, 2018 1 次提交
-
-
由 Martin Blumenstingl 提交于
Commit a5a10afe ("reset: meson: add level reset support for GX SoC family") only enabled the level resets for the newer GX SoC family. However, the older 32-Meson SoCs (Meson8, Meson8b and Meson8m2) also support level resets using the same offset as the newer GX SoCs. This removes the separation between Meson8b and the GX SoCs from the reset-meson driver to enable the level resets also on Meson8b. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 27 11月, 2017 2 次提交
-
-
由 Yixun Lan 提交于
Try to add compatible string explictly to support new Meson-AXG SoC. Signed-off-by: NYixun Lan <yixun.lan@amlogic.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Masahiro Yamada 提交于
Commit bb475230 ("reset: make optional functions really optional") converted *_get_optional* functions, but device_reset_optional() was left behind. Convert it in the same way. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 02 11月, 2017 1 次提交
-
-
由 Greg Kroah-Hartman 提交于
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
-
- 18 10月, 2017 3 次提交
-
-
由 Philipp Zabel 提交于
The reset-simple driver can be used without changes. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NAlexandru Gagniuc <alex.g@adaptrum.com>
-
由 Philipp Zabel 提交于
The reset-simple driver can be used without changes. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Acked-by: NGabriel Fernandez <gabriel.fernandez@st.com>
-
由 Philipp Zabel 提交于
Add reset line status readback, inverted status support, and socfpga device tree quirks to the simple reset driver, and use it to replace the socfpga driver. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 17 10月, 2017 4 次提交
-
-
由 Philipp Zabel 提交于
Use the newly created copies in the reset-simple driver to replace the sunxi platform driver code and reset operations. The separate sunxi driver still remains to register the early reset controllers, but it reuses the reset operations in reset-simple. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NAlexandru Gagniuc <alex.g@adaptrum.com> Reviewed-by: NChen-Yu Tsai <wens@csie.org>
-
由 Philipp Zabel 提交于
Copy reusable parts from the sunxi driver, to add a driver for simple reset controllers with reset lines that can be controlled by toggling bits in exclusive, contiguous register ranges using read-modify-write cycles under a spinlock. The following patches will replace compatible reset drivers with reset-simple, extending it where necessary. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NAlexandru Gagniuc <alex.g@adaptrum.com> Reviewed-by: NChen-Yu Tsai <wens@csie.org>
-
由 Neil Armstrong 提交于
The if (bank >= REG_COUNT) is not need since already checked by the default rcdev->of_xlate implementation which guarantees that id < rcdev->nr_resets. Suggested-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Neil Armstrong 提交于
The Amlogic GX SoC family embeds alternate registers to drive the reset levels next to the pulse registers. This patch adds support for level reset handling on the GX family only. The Meson8 family has an alternate way to handle level reset. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 05 10月, 2017 1 次提交
-
-
由 Masahiro Yamada 提交于
Add basic reset data for Socionext's new SoC PXs3. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 04 10月, 2017 3 次提交
-
-
由 Dinh Nguyen 提交于
Enable the reset driver to get built for the Stratix10 platform. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Kunihiko Hayashi 提交于
Add reset lines for ethernet controller on Pro4, PXs2, LD11 and LD20 SoCs. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Dinh Nguyen 提交于
The SoCFPGA Stratix10 reset controller has 32-bit registers. Thus, we cannot use BITS_PER_LONG in computing the register and bit offset. Instead, we should be using the width of the hardware register for the calculation. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 21 9月, 2017 1 次提交
-
-
由 Geert Uytterhoeven 提交于
The HSDK reset driver is only useful when building for an ARC HSDK platform. While at it, drop the "default n", as that is the default. Fixes: e0be864f ("ARC: reset: introduce HSDKv1 reset driver") Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> [p.zabel@pengutronix.de: rebased, renamed RESET_HSDK_V1 to RESET_HSDK] Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 19 9月, 2017 1 次提交
-
-
由 Eugeniy Paltsev 提交于
ARC AXS10x boards support custom IP-block which allows to control reset signals of selected peripherals. For example DW GMAC, etc... This block is controlled via memory-mapped register (AKA CREG) which represents up-to 32 reset lines. This regiter is self-clearing so we don't need to deassert line after reset. As of today only the following lines are used: - DW GMAC - line 5 Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 18 9月, 2017 2 次提交
-
-
由 Vineet Gupta 提交于
There is no plan yet to do a v2 board. And even if we were to do it only some IPs would actually change, so it be best to add suffixes at that point, not now ! Signed-off-by: NVineet Gupta <vgupta@synopsys.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Thomas Meyer 提交于
This avoids the error: drivers/reset/reset-hsdk-v1.o: In function `hsdkv1_reset_probe': /home/thomas/git/linux/drivers/reset/reset-hsdk-v1.c:101: undefined reference to `devm_ioremap_resource' collect2: error: ld returned 1 exit status Signed-off-by: NThomas Meyer <thomas@m3y3r.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 05 9月, 2017 1 次提交
-
-
由 Martin Blumenstingl 提交于
The reset controllers (on xRX200 and newer SoCs have two of them) are provided by the RCU module. This was initially implemented as a simple reset controller. However, the RCU module provides more functionality (ethernet GPHYs, USB PHY, etc.), which makes it a MFD device. The old reset controller driver implementation from arch/mips/lantiq/xway/reset.c did not honor this fact. For some devices the request and the status bits are different. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de> Acked-by: NRob Herring <robh@kernel.org> Cc: john@phrozen.org Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17125/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
- 14 8月, 2017 3 次提交
-
-
由 Katsuhiro Suzuki 提交于
Add a reset line for analog signal amplifier core (ADAMV) on UniPhier LD11/LD20 SoCs. Signed-off-by: NKatsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Katsuhiro Suzuki 提交于
Add a reset line for video input subsystem (EXIV) on UniPhier LD11/LD20 SoCs. Signed-off-by: NKatsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Katsuhiro Suzuki 提交于
Add reset lines for audio subsystem (AIO) and SoC internal audio codec (EVEA) on UniPhier LD11/LD20 SoCs. Signed-off-by: NKatsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 11 8月, 2017 3 次提交
-
-
由 Philipp Zabel 提交于
The Allwinner reset controller has 32-bit registers, but resource_size is measured in bytes, not number of registers. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Acked-by: NChen-Yu Tsai <wens@csie.org>
-
由 Masahiro Yamada 提交于
This macro turned out not so useful as I had expected. Hardware engineers said they would change reset bit assignments for every SoC going forward. This means we can not share the macros among SoCs. Just use primitive macros. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Masahiro Yamada 提交于
This SoC is too old. It is difficult to maintain any longer. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 07 8月, 2017 1 次提交
-
-
由 Linus Walleij 提交于
This reverts commit 2acb037f. We ended up merging the reset controller into the clock controller so we can now get rid of this stand-alone implementation. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 20 7月, 2017 1 次提交
-
-
由 Eugeniy Paltsev 提交于
The HSDK v1 periphery IPs can be reset by accessing some registers from the CGU block. The list of available reset lines is documented in the DT bindings. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 19 7月, 2017 4 次提交
-
-
由 Rob Herring 提交于
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org> Reviewed-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Philipp Zabel 提交于
By now there are drivers using shared reset controls and (de)assert calls on platforms with self-deasserting reset lines and thus reset drivers that do not implement .assert() and .deassert(). As long as the initial state of the reset line is deasserted, there is no reason for a reset_control_assert call to return an error for shared reset controls, or for a reset_control_deassert call to return an error for either shared or exclusive reset controls: after a call to reset_control_deassert the reset line is guaranteed to be deasserted, and after a call to reset_control_assert it is valid for the reset line to stay deasserted for shared reset controls. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Vivek Gautam 提交于
Many devices may want to request a bunch of resets and control them. So it's better to manage them as an array. Add APIs to _get() an array of reset_control, reusing the _assert(), _deassert(), and _reset() APIs for single reset controls. Since reset controls already may control multiple reset lines with a single hardware bit, from the user perspective, reset control arrays are not at all different from single reset controls. Note that these APIs don't guarantee that the reset lines managed in the array are handled in any particular order. Cc: Felipe Balbi <balbi@kernel.org> Cc: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: NVivek Gautam <vivek.gautam@codeaurora.org> [p.zabel@pengutronix.de: changed API to hide reset control arrays behind struct reset_control] Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Arvind Yadav 提交于
File size before: text data bss dec hex filename 794 232 0 1026 402 drivers/reset/reset-zx2967.o File size After adding 'const': text data bss dec hex filename 842 184 0 1026 402 drivers/reset/reset-zx2967.o Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: NBaoyou Xie <baoyou.xie@linaro.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 06 6月, 2017 2 次提交
-
-
由 Andrew F. Davis 提交于
Some TI Keystone family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a reset driver that communicates to the system controller over the TI SCI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. Signed-off-by: NAndrew F. Davis <afd@ti.com> [s-anna@ti.com: documentation changes, revised commit message] Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Acked-by: NSantosh Shilimkar <ssantosh@kernel.org> [p.zabel@pengutronix.de: const struct reset_control_ops] Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Philipp Zabel 提交于
Use kref for reference counting and enjoy the advantages of refcount_t. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 24 5月, 2017 2 次提交
-
-
由 Jeremy Linton 提交于
The hi6220_reset driver can be built as a standalone module yet it cannot be loaded because it depends on GPL exported symbols. Lets set the module license so that the module loads, and things like the on-board kirin drm starts working. Signed-off-by: NJeremy Linton <lintonrjeremy@gmail.com> Reviewed-by: NXinliang Liu <xinliang.liu@linaro.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Linus Walleij 提交于
The Cortina Systems Gemini reset controller is a simple 32bit register with self-deasserting reset lines. It is accessed using regmap over syscon. Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-