- 30 7月, 2019 1 次提交
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由 Martin Blumenstingl 提交于
Commit d01f449c ("of_net: add NVMEM support to of_get_mac_address") added support for reading the MAC address from an nvmem-cell. This required changing the logic to return an error pointer upon failure. If stmmac is loaded before the nvmem provider driver then of_get_mac_address() return an error pointer with -EPROBE_DEFER. Propagate this error so the stmmac driver will be probed again after the nvmem provider driver is loaded. Default to a random generated MAC address in case of any other error, instead of using the error pointer as MAC address. Fixes: d01f449c ("of_net: add NVMEM support to of_get_mac_address") Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 6月, 2019 1 次提交
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由 Jose Abreu 提交于
Because of PHYLINK conversion we stopped parsing the phy-handle property from DT. Unfortunatelly, some wrapper drivers still rely on this phy node to configure the PHY. Let's restore the parsing of PHY handle while these wrapper drivers are not fully converted to PHYLINK. Fixes: 74371272 ("net: stmmac: Convert to phylink and remove phylib logic") Reported-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NJose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Tested-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 6月, 2019 1 次提交
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由 Jose Abreu 提交于
Convert everything to phylink. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 6月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details the full gnu general public license is included in this distribution in the file called copying this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope [that] it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details the full gnu general public license is included in this distribution in the file called copying extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 57 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAlexios Zavras <alexios.zavras@intel.com> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.515993066@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 26 5月, 2019 1 次提交
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由 Biao Huang 提交于
The specific clk_csr value can be zero, and stmmac_clk is necessary for MDC clock which can be set dynamically. So, change the condition from plat->clk_csr to plat->stmmac_clk to fix clk_csr can't be zero issue. Fixes: cd7201f4 ("stmmac: MDC clock dynamically based on the csr clock input") Signed-off-by: NBiao Huang <biao.huang@mediatek.com> Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 3月, 2019 1 次提交
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由 Christophe Roullier 提交于
In Documentation stmmac.txt there is possibility to fixed CSR Clock range selection with property clk_csr. This patch add the management of this property For example to use it, add in your ethernet node DT: clk_csr = <3>; Signed-off-by: NChristophe Roullier <christophe.roullier@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 9月, 2018 1 次提交
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由 Jongsung Kim 提交于
Synopsys DWC Ethernet MAC can be configured to have 1..32, 64, or 128 unicast filter entries. (Table 7-8 MAC Address Registers from databook) Fix dwmac1000_validate_ucast_entries() to accept values between 1 and 32 in addition. Signed-off-by: NJongsung Kim <neidhard.kim@lge.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 8月, 2018 1 次提交
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由 Jose Abreu 提交于
Add the bindings parsing for XGMAC2 IP block. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Joao Pinto <jpinto@synopsys.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 7月, 2018 1 次提交
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由 Corentin Labbe 提交于
This patch remove the following documentation warning drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c:103: warning: Excess function parameter 'priv' description in 'stmmac_axi_setup' It was introduced in commit afea0365 ("stmmac: rework DMA bus setting and introduce new platform AXI structure") Signed-off-by: NCorentin Labbe <clabbe@baylibre.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 5月, 2018 1 次提交
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由 Christophe Roullier 提交于
Manage dwmac-4.20a version from synopsys Signed-off-by: NChristophe Roullier <christophe.roullier@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 2月, 2018 2 次提交
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由 Niklas Cassel 提交于
Honor error code from stmmac_dt_phy() instead of always returning -ENODEV. No functional change intended. Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Niklas Cassel 提交于
The device tree binding for stmmac says: - Multiple TX Queues parameters: below the list of all the parameters to configure the multiple TX queues: - snps,tx-queues-to-use: number of TX queues to be used in the driver [...] - For each TX queue [...] However, if one specifies snps,tx-queues-to-use = 2, but omits the queue subnodes, or defines just one queue subnode, since the driver appears to initialize queues with sane default values, we will get tx queue timeouts. This is because the initialization code only initializes as many queues as it finds subnodes. Potentially leaving some queues uninitialized. To avoid hard to debug issues, return an error if the number of subnodes differ from snps,tx-queues-to-use/snps,rx-queues-to-use. Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 11月, 2017 1 次提交
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由 Bhadram Varka 提交于
Numbers in DT are stored in “cells” which are 32-bits in size. of_property_read_u8 does not work properly because of endianness problem. This causes it to always return 0 with little-endian architectures. Fix it by using of_property_read_u32() OF API. Signed-off-by: NBhadram Varka <vbhadram@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 10月, 2017 2 次提交
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由 Jose Abreu 提交于
According to DWMAC databook the first queue operating mode must always be in DCB. As MTL_QUEUE_DCB = 1, we need to always set the first queue operating mode to DCB otherwise driver will think that queue is in AVB mode (because MTL_QUEUE_AVB = 0). Signed-off-by: NJose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Corentin Labbe 提交于
stmmac bindings docs said that its mdio node must have compatible = "snps,dwmac-mdio"; Since dwmac-sun8i does not have any good reasons to not doing it, all their MDIO node must have it. Since these compatible is automatically registered, dwmac-sun8i compatible does not need to be in need_mdio_ids. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 9月, 2017 1 次提交
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由 Thomas Meyer 提交于
Make sure (of/i2c/platform)_device_id tables are NULL terminated. Found by coccinelle spatch "misc/of_table.cocci" Signed-off-by: NThomas Meyer <thomas@m3y3r.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 6月, 2017 1 次提交
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由 Icenowy Zheng 提交于
Allwinner V3s SoC has an Ethernet MAC and an internal PHY like the ones in H3 SoC, however the MAC has no external *MII interfaces available at GPIOs, thus only MII connection to internal PHY is supported. Add this variant of EMAC to dwmac-sun8i driver. The default value of the syscon EMAC-related register seems to have changed from H3, but it seems to be a harmless change. Signed-off-by: NIcenowy Zheng <icenowy@aosc.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 6月, 2017 1 次提交
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由 LABBE Corentin 提交于
The dwmac-sun8i is a heavy hacked version of stmmac hardware by allwinner. In fact the only common part is the descriptor management and the first register function. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 3月, 2017 1 次提交
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由 Thierry Reding 提交于
Recent changes to support multiple queues in the device tree bindings resulted in the number of RX and TX queues to be initialized to zero for device trees not adhering to the new bindings. Restore backwards-compatibility with those device trees by falling back to a single RX and TX queues each. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-By: NJoao Pinto <jpinto@synopsys.com> Tested-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 3月, 2017 2 次提交
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由 Joao Pinto 提交于
This patch adds the configuration of RX queues' routing. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Joao Pinto 提交于
This patch adds the configuration of RX and TX queues' priority. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 3月, 2017 4 次提交
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由 Joao Pinto 提交于
This patch adds the configuration of the AVB Credit-Based Shaper. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Joao Pinto 提交于
This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Thierry Reding 提交于
clk_prepare_enable() and clk_disable_unprepare() for this clock aren't properly balanced, which can trigger a WARN_ON() in the common clock framework. Reviewed-By: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Thierry Reding 提交于
There aren't currently any users of the "clk_ptp_ref", but there are other references to "ptp_ref", so I'm leaning towards considering that a typo. Fix it. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 3月, 2017 1 次提交
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由 Joao Pinto 提交于
The axi variable was not being freed upon device removal. With devm_kzalloc it ensures that it is properly freed. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 2月, 2017 2 次提交
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由 LABBE Corentin 提交于
As said by checkpatch ENOSYS means 'invalid syscall nr' and nothing else. This patch replace ENOSYS by the more appropriate value EINVAL. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Acked-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 LABBE Corentin 提交于
This patch fix the checkpatch warning about free software address. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Acked-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 2月, 2017 1 次提交
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由 Heiner Kallweit 提交于
Most likely a copy & paste error in referenced commit. Restore the debug message to what it was before. Fixes: f573c0b9 ("stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure") Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Acked-By: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 1月, 2017 1 次提交
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由 Julia Lawall 提交于
The function stmmac_dt_phy provides several possibilities for initializing plat->mdio_node, all of which have the effect of increasing the reference count of the assigned value. This field is not updated elsewhere, so the value is live until the end of the lifetime of plat (devm_allocated), just after the end of stmmac_remove_config_dt. Thus, add an of_node_put on plat->mdio_node in stmmac_remove_config_dt. It is possible that the field mdio_node is never initialized, but of_node_put is NULL-safe, so it is also safe to call of_node_put in that case. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 1月, 2017 1 次提交
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由 Dan Carpenter 提交于
The break statement should be indented one more tab. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 1月, 2017 3 次提交
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由 jpinto 提交于
This patch adds a new glue driver called dwmac-dwc-qos-eth which was based in the dwc_eth_qos as is. To assure retro-compatibility a slight tweak was also added to stmmac_platform. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Tested-by: NNiklas Cassel <niklas.cassel@axis.com> Reviewed-by: NLars Persson <larper@axis.com> Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 jpinto 提交于
This patch moves stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to the plat_stmmacenet_data structure. It also moves these platform variables initialization to stmmac_platform. This was done for two reasons: a) If PCI is used, platform related code is being executed in stmmac_main resulting in warnings that have no sense and conceptually was not right b) stmmac as a synopsys reference ethernet driver stack will be hosting more and more drivers to its structure like synopsys/dwc_eth_qos.c. These drivers have their own DT bindings that are not compatible with stmmac's. One of the most important are the clock names, and so they need to be parsed in the glue logic and initialized there, and that is the main reason why the clocks were passed to the platform structure. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Tested-by: NNiklas Cassel <niklas.cassel@axis.com> Reviewed-by: NLars Persson <larper@axis.com> Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 jpinto 提交于
This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating. It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock gating is needed by stmmac users also. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Tested-by: NNiklas Cassel <niklas.cassel@axis.com> Reviewed-by: NLars Persson <larper@axis.com> Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 1月, 2017 1 次提交
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由 Niklas Cassel 提交于
For core revision 3.x Address-Aligned Beats is available in two registers. The DT property snps,aal was created for AAL in the DMA bus register, which is a read/write bit. The DT property snps,axi_all was created for AXI_AAL in the AXI bus mode register, which is a read only bit that reflects the value of AAL in the DMA bus register. Since the value of snps,axi_all is never used in the driver, and since the property was created for a bit that is read only, it should be safe to remove the property. Acked-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 12月, 2016 4 次提交
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由 Niklas Cassel 提交于
The driver currently always sets the PBLx8/PBLx4 bit, which means that the pbl values configured via the pbl/txpbl/rxpbl DT properties are always multiplied by 8/4 in the hardware. In order to allow the DT to configure lower pbl values, while at the same time not changing behavior of any existing device trees using the pbl/txpbl/rxpbl settings, add a property to disable the multiplication of the pbl by 8/4 in the hardware. Suggested-by: NRabin Vincent <rabinv@axis.com> Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Acked-by: NAlexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Niklas Cassel 提交于
GMAC and newer supports independent programmable burst lengths for DMA tx/rx. Add new optional devicetree properties representing this. To be backwards compatible, snps,pbl will still be valid, but snps,txpbl/snps,rxpbl will override the value in snps,pbl if set. If the IP is synthesized to use the AXI interface, there is a register and a matching DT property inside the optional stmmac-axi-config DT node for controlling burst lengths, named snps,blen. However, using this register, it is not possible to control tx and rx independently. Also, this register is not available if the IP was synthesized with, e.g., the AHB interface. Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Acked-by: NAlexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Niklas Cassel 提交于
commit 64c3b252 ("net: stmmac: fixed the pbl setting with DT") changed the parsing of the DT binding. Before 64c3b252, snps,fixed-burst and snps,mixed-burst were parsed regardless if the property snps,pbl existed or not. After the commit, fixed burst and mixed burst are only parsed if snps,pbl exists. Now when snps,aal has been added, it too is only parsed if snps,pbl exists. Since the DT binding does not specify that fixed burst, mixed burst or aal depend on snps,pbl being specified, undo changes introduced by 64c3b252. The issue commit 64c3b252 ("net: stmmac: fixed the pbl setting with DT") tries to address is solved in another way: The databook specifies that all values other than 1, 2, 4, 8, 16, or 32 results in undefined behavior, so snps,pbl = <0> is invalid. If pbl is 0 after parsing, set pbl to DEFAULT_DMA_PBL. This handles the case where the property is omitted, and also handles the case where the property is specified without any data. Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Acked-by: NAlexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Niklas Cassel 提交于
devicetree binding for stmmac states: - compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac" For backwards compatibility: "st,spear600-gmac" is also supported. Previously, when specifying "snps,dwmac-4.10a", "snps,dwmac" as your compatible string, plat_stmmacenet_data would have both has_gmac and has_gmac4 set. This would lead to stmmac_hw_init calling dwmac1000_setup rather than dwmac4_setup, resulting in a non-functional driver. This happened since the check for has_gmac is done before the check for has_gmac4. However, the order should not matter, so it does not make sense to have both set. If something is valid for both, you should do as the stmmac_interrupt does: if (priv->plat->has_gmac || priv->plat->has_gmac4) ... The places where it was obvious that the author actually meant if (has_gmac || has_gmac4) rather than if (has_gmac) has been updated. Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 12月, 2016 1 次提交
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由 Niklas Cassel 提交于
WR_OSR_LMT and RD_OSR_LMT have a reset value of 1. Since the reset value wasn't cleared before writing, the value in the register would be incorrect if specifying an uneven value for snps,wr_osr_lmt/snps,rd_osr_lmt. Zero is a valid value for the properties, since the databook specifies: maximum outstanding requests = WR_OSR_LMT + 1. We do not want to change the behavior for existing users when the property is missing. Therefore, default to 1 if the property is missing, since that is the same as the reset value. Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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