1. 11 4月, 2017 10 次提交
  2. 04 4月, 2017 1 次提交
    • A
      perf: qcom: Add L3 cache PMU driver · 3071f13d
      Agustin Vega-Frias 提交于
      This adds a new dynamic PMU to the Perf Events framework to program
      and control the L3 cache PMUs in some Qualcomm Technologies SOCs.
      
      The driver supports a distributed cache architecture where the overall
      cache for a socket is comprised of multiple slices each with its own PMU.
      Access to each individual PMU is provided even though all CPUs share all
      the slices. User space needs to aggregate to individual counts to provide
      a global picture.
      
      The driver exports formatting and event information to sysfs so it can
      be used by the perf user space tools with the syntaxes:
         perf stat -a -e l3cache_0_0/read-miss/
         perf stat -a -e l3cache_0_0/event=0x21/
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NAgustin Vega-Frias <agustinv@codeaurora.org>
      [will: fixed sparse issues]
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      3071f13d
  3. 01 4月, 2017 3 次提交
    • M
      drivers/perf: arm_pmu: split irq request from enable · c09adab0
      Mark Rutland 提交于
      For historical reasons, we lazily request and free interrupts in the
      arm pmu driver. This requires us to refcount use of the pmu (by way of
      counting the active events) in order to request/free interrupts at the
      correct times, which complicates the driver somewhat.
      
      The existing logic is flawed, as it only considers currently online CPUs
      when requesting, freeing, or managing the affinity of interrupts.
      Intervening hotplug events can result in erroneous IRQ affinity, online
      CPUs for which interrupts have not been requested, or offline CPUs whose
      interrupts are still requested.
      
      To fix this, this patch splits the requesting of interrupts from any
      per-cpu management (i.e. per-cpu enable/disable, and configuration of
      cpu affinity). We now request all interrupts up-front at probe time (and
      never free them, since we never unregister PMUs).
      
      The management of affinity, and per-cpu enable/disable now happens in
      our cpu hotplug callback, ensuring it occurs consistently. This means
      that we must now invoke the CPU hotplug callback at boot time in order
      to configure IRQs, and since the callback also resets the PMU hardware,
      we can remove the duplicate reset in the probe path.
      
      This rework renders our event refcounting unnecessary, so this is
      removed.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      [will: make armpmu_get_cpu_irq static]
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      c09adab0
    • M
      drivers/perf: arm_pmu: manage interrupts per-cpu · 7ed98e01
      Mark Rutland 提交于
      When requesting or freeing interrupts, we use platform_get_irq() to find
      relevant irqs, backing this up with additional information in an
      optional irq_affinity table.
      
      This means that our irq request and free paths are tied to a
      platform_device, and our request path must jump through a number of
      hoops in order to determine the required affinity of each interrupt.
      
      Given that the affinity must be static, we can compute the affinity once
      up-front at probe time, simplifying the irq request and free paths. By
      recording interrupts in a per-cpu data structure, we simplify a few
      paths, and permit a subsequent rework of the request and free paths.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      [will: rename local nr_irqs variable to avoid conflict with global]
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      7ed98e01
    • M
      drivers/perf: arm_pmu: rework per-cpu allocation · 2681f018
      Mark Rutland 提交于
      For historical reasons, we allocate per-cpu data associated with a PMU
      rather late, in cpu_pmu_init, after we've parsed whatever hardware
      information we were provided with.
      
      In order to allow use to store some per-cpu data early in the probe
      path, we need to allocate (and initialise) the per-cpu data earlier.
      This patch reworks the way we allocate the pmu and associated per-cpu
      data in order to make that possible.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      [will: make armpmu_{alloc,free} static
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      2681f018
  4. 19 3月, 2017 26 次提交