Driver for the SH73A0's clocks that are too specific to be supported by a
generic driver.
Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

In these Makefiles, at least one of "obj-y" and "obj-" is non-empty,
hence built-in.o is always created without such a trick.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NPeter Foley <pefoley2@pefoley.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au> [shmobile]
Acked-by: David S. Miller <davem@davemloft.net> [networking]
Signed-off-by: NMichal Marek <mmarek@suse.cz>

Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Driver for the R8A7740's clocks that are too specific to be supported by a
generic driver.
Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The R8A7779 SoC has several clocks that are too custom to be supported in a
generic driver. Those clocks are all fixed rate clocks with multiplier and
divisor set according to boot mode configuration.

Based on work for R-Car Gen2 SoCs by Laurent Pinchart.

Cc: devicetree@vger.kernel.org
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Signed-off-by: NWolfram Sang <wsa@sang-engineering.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Device tree clock binding document for EMMA Mobile EV2 SMU,
And Common clock framework based implementation of it.
Following nodes are defined to describe clock tree.
- renesas,emev2-smu
- renesas,emev2-smu-clkdiv
- renesas,emev2-smu-gclk

These bindings are designed manually based on
 19UH0037EJ1000_SMU : System Management Unit User's Manual

So far, reparent is not implemented, and is fixed to index #0.
Clock tree description is not included, and should be provided
by device-tree.
Signed-off-by: NTakashi Yoshii <takasi-y@ops.dti.ne.jp>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.

Those clocks are found on Renesas ARM SoCs.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

DIV6 clocks are divider gate clocks controlled through a single
register. The divider is expressed on 6 bits, hence the name, and can
take values from 1/1 to 1/64.

Those clocks are found on Renesas ARM SoCs.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are
too custom to be supported in a generic driver. Those clocks can be
divided in two categories:

- Fixed rate clocks with multiplier and divisor set according to boot
  mode configuration

- Custom divider clocks with SoC-specific divider values

This driver supports both.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>