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  1. 15 2月, 2017 1 次提交
    • H
      spi: lantiq-ssc: add support for Lantiq SSC SPI controller · 17f84b79
      由 Hauke Mehrtens 提交于 
      This driver supports the Lantiq SSC SPI controller in master
mode. This controller is found on Intel (former Lantiq) SoCs like
the Danube, Falcon, xRX200, xRX300.

The hardware uses two hardware FIFOs one for received and one for
transferred bytes. When the driver writes data into the transmit FIFO
the complete word is taken from the FIFO into a shift register. The
data from this shift register is then written to the wire. This driver
uses the interrupts signaling the status of the FIFOs and not the shift
register. It is also possible to use the interrupts for the shift
register, but they will send a signal after every word. When using the
interrupts for the shift register we get a signal when the last word is
written into the shift register and not when it is written to the wire.
After all FIFOs are empty the driver busy waits till the hardware is
not busy any more and returns the transfer status.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: NMark Brown <broonie@kernel.org>
      17f84b79
  3. 09 12月, 2016 1 次提交
  5. 01 12月, 2016 1 次提交
  7. 23 11月, 2016 1 次提交
  9. 14 11月, 2016 1 次提交
  11. 09 11月, 2016 1 次提交
  13. 15 9月, 2016 1 次提交
  15. 02 9月, 2016 1 次提交
  17. 19 8月, 2016 1 次提交
  19. 08 8月, 2016 1 次提交
    • R
      spi: add driver for J-Core SPI controller · 2cb1b3b3
      由 Rich Felker 提交于 
      The J-Core "spi2" device is a PIO-based SPI master controller. It
differs from "bitbang" devices in that that it's clocked in hardware
rather than via soft clock modulation over gpio, and performs
byte-at-a-time transfers between the cpu and SPI controller.

This driver will be extended to support future versions of the J-Core
SPI controller with DMA transfers when they become available.
Signed-off-by: NRich Felker <dalias@libc.org>
Signed-off-by: NMark Brown <broonie@kernel.org>
      2cb1b3b3
  21. 08 7月, 2016 1 次提交
  23. 13 5月, 2016 1 次提交
    • P
      spi: pic32-sqi: Fix linker error, undefined reference to `bad_dma_ops'. · 21825ff1
      由 Purna Chandra Mandal 提交于 
      Even if DMA support is disabled code using DMA mapping APIs compiles fine,
but fails in linking.
-------
drivers/built-in.o: In function `ring_desc_ring_free':
spi-pic32-sqi.c:(.text+0x2cfbe0): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cfbe4): undefined reference to `bad_dma_ops'
drivers/built-in.o: In function `pic32_sqi_probe':
spi-pic32-sqi.c:(.text+0x2cfe48): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cfeb0): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cff38): undefined reference to `bad_dma_ops'
--------
Correct dependency by adding 'depends on HAS_DMA' in Kconfig.
Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      21825ff1
  25. 02 5月, 2016 1 次提交
  27. 30 4月, 2016 1 次提交
  29. 22 4月, 2016 1 次提交
  31. 19 4月, 2016 1 次提交
  33. 05 4月, 2016 1 次提交
  35. 23 3月, 2016 1 次提交
  37. 24 2月, 2016 1 次提交
  39. 18 2月, 2016 1 次提交
  41. 14 2月, 2016 1 次提交
  43. 08 2月, 2016 1 次提交
  45. 06 2月, 2016 1 次提交
    • L
      spi: Add Analog Devices AXI SPI Engine controller support · b1353d1c
      由 Lars-Peter Clausen 提交于 
      This patch adds support for the AXI SPI Engine controller which is a FPGA
soft-peripheral which is used in some of Analog Devices' reference designs.

The AXI SPI Engine controller is part of the SPI Engine framework[1] and
allows memory mapped access to the SPI Engine control bus. This allows it
to be used as a general purpose software driven SPI controller. The SPI
Engine in addition offers some optional advanced acceleration and
offloading capabilities, which are not part of this patch though and will
be introduced separately.

At the core of the SPI Engine framework is a small sort of co-processor
that accepts a command stream and turns the commands into low-level SPI
transactions. Communication is done through three memory mapped FIFOs in
the register map of the AXI SPI Engine peripheral. One FIFO for the command
stream and one each for transmit and receive data.

The driver translates a spi_message in a command stream and writes it to
the peripheral which executes it asynchronously. This allows it to perform
very precise timings which are required for some SPI slave devices to
achieve maximum performance (e.g. analog-to-digital and digital-to-analog
converters). The execution flow is synchronized to the host system by a
special synchronize instruction which generates a interrupt.

[1] https://wiki.analog.com/resources/fpga/peripherals/spi_engineSigned-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@kernel.org>
      b1353d1c
  47. 03 2月, 2016 1 次提交
  49. 16 1月, 2016 1 次提交
  51. 13 12月, 2015 1 次提交
  53. 01 12月, 2015 1 次提交
  55. 30 10月, 2015 1 次提交
  57. 23 10月, 2015 1 次提交
    • J
      spi/bcm63xx: move register definitions into the driver · 44d8fb30
      由 Jonas Gorski 提交于 
      Move all register definitions and structs into the driver. This allows
us dropping the platform_data struct and drop any arch specific
includes. Make use of different device names to identify the version of
the block we have.

Since we now have full control over the message width, we can drop the
size check, which was broken anyway, since it never set ret to any error
code.

Also since we now have no arch depedendent resources, we can now allow
compiling it for any arch, hidden behind COMPILE_TEST.
Signed-off-by: NJonas Gorski <jogo@openwrt.org>
Signed-off-by: NMark Brown <broonie@kernel.org>
      44d8fb30
  59. 07 10月, 2015 1 次提交
  61. 29 8月, 2015 1 次提交
  63. 07 8月, 2015 1 次提交
  65. 07 7月, 2015 1 次提交
  67. 13 6月, 2015 1 次提交
  69. 09 6月, 2015 1 次提交
  71. 06 5月, 2015 1 次提交
  73. 04 5月, 2015 1 次提交
    • Y
      spi: bcm2835: depends GPIOLIB · e0d58cdc
      由 Yoshinori Sato 提交于 
      I got following error on CONFIG_GPIOLIB=n.

drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
drivers/spi/spi-bcm2835.c:356:21: error: dereferencing pointer to incomplete type 'struct gpio_chip'
  return !strcmp(chip->label, data);
                     ^
drivers/spi/spi-bcm2835.c: In function 'bcm2835_spi_setup':
drivers/spi/spi-bcm2835.c:382:9: error: implicit declaration of function 'gpiochip_find' [-Werror=implicit-function-declaration]
  chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
         ^
drivers/spi/spi-bcm2835.c:382:7: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
  chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
       ^
drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
drivers/spi/spi-bcm2835.c:357:1: warning: control reaches end of non-void function [-Wreturn-type]
 }
 ^
Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: NMark Brown <broonie@kernel.org>
      e0d58cdc
  75. 24 4月, 2015 1 次提交
  77. 18 4月, 2015 1 次提交
  79. 15 4月, 2015 1 次提交
    • G
      spi: bcm2835: Add GPIOLIB dependency · 8844d0f1
      由 Guenter Roeck 提交于 
      Fix:

drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
drivers/spi/spi-bcm2835.c:356:21: error:
			dereferencing pointer to incomplete type
drivers/spi/spi-bcm2835.c: In function 'bcm2835_spi_setup':
drivers/spi/spi-bcm2835.c:382:2: error:
	`		implicit declaration of function 'gpiochip_find'
drivers/spi/spi-bcm2835.c:387:21: error:
			dereferencing pointer to incomplete type

by adding the now mandatory GPIOLIB dependency.

Fixes: a30a555d ("spi: bcm2835: transform native-cs to gpio-cs
	on first spi_setup")
Cc: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NMark Brown <broonie@kernel.org>
      8844d0f1