- 09 4月, 2014 7 次提交
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由 Ben Widawsky 提交于
As we've learned over time, the HW context is just a series of GPU commands that we're able to decode without any changes in intel_error_decode. Since many bugs recently have been implicated in the HW context state, it makes sense to dump the whole context object in a form which can be parsed. Sample: render ring --- HW Context = 0x042db000 ringbuffer (render ring) at 0x0160c000; HEAD points to: 0x0160c000 0x0160c000: 0x00000000: MI_NOOP 0x0160c004: 0x00000000: MI_NOOP 0x0160c008: 0x00000000: MI_NOOP 0x0160c00c: 0x00000000: MI_NOOP 0x0160c010: 0x00000000: MI_NOOP 0x0160c014: 0x00000000: MI_NOOP 0x0160c018: 0x00000000: MI_NOOP 0x0160c01c: 0x00000000: MI_NOOP Unfortunately, our decoder isn't quite smart enough to deal with the variable length LRIs - but that is a tools problem. Signed-off-by: NBen Widawsky <ben@bwidawsk.net> [danvet: Clarify commit message a bit, seems to have lost a few crucial words.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Jesse Barnes 提交于
This always indicates a bug somewhere. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ben Widawsky 提交于
I opted to do this instead of grabbing the context reference after eb_create since eb_create can potentially call the shrinker, and that makes things very complicated. This simple patch balances the ref count without requiring a great deal of review to make sure the shrinker path is safe. Theoretically (by design) the shrinker can end up destroying a context, which enforces the reasoning for doing the fix this way instead of moving the reference to later in the function. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NBen Widawsky <ben@bwidawsk.net> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ville Syrjälä 提交于
Sprite LP2+ registers don't exist on ILK/SNB so don't read them. Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ville Syrjälä 提交于
We don't do CPU access to GPU contexts so making the GPU access snoop the CPU caches seems silly, and potentially expensive. v2: Use !IS_VALLEYVIEW instead of HAS_LLC as this is really about what the PTEs can represent. Add a comment clarifying the situation. Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Akash Goel 提交于
On Gen4+ platforms (except BDW), Render Cache Operational flush cannot be enabled. This WA is apparently required for all Gen4+ platforms,except BDW. In BDW, the bit has been repurposed otherwise. This has been tested only on vlv. v2: Corrected the code regarding the wrong usage of MASKED_BIT_DISABLE (Chris) v3: Enhancing the scope of WA to Gen4+ platforms except BDW (Ville) v4: Adding WA for g4x, crestline, broadwater (Ville) Signed-off-by: NAkash Goel <akash.goel@intel.com> Signed-off-by: NSourab Gupta <sourab.gupta@intel.com> Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
Backmerge drm-next after the big s/crtc->fb/crtc->primary->fb/ cocinelle patch to avoid endless amounts of conflict hilarity in my -next queue for 3.16. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 08 4月, 2014 1 次提交
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由 Russell King 提交于
Loading cursors to the LCD controller's SRAM can be corrupted when the configured pixel clock is relatively slow. This seems to be caused when we write back-to-back to the SRAM registers. There doesn't appear to be any status register we can read to check when an access has completed. Inserting a dummy read between the writes appears to fix the problem. Cc: <stable@vger.kernel.org> # 3.13 Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 05 4月, 2014 7 次提交
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git://anongit.freedesktop.org/drm-intel由 Dave Airlie 提交于
Merge window -fixes pull request as usual. Well, I did sneak in Jani's drm_i915_private_t typedef removal, need to have fun with a big sed job too ;-) Otherwise: - hdmi interlaced fixes (Jesse&Ville) - pipe error/underrun/crc tracking fixes, regression in late 3.14-rc (but not cc: stable since only really relevant for igt runs) - large cursor wm fixes (Chris) - fix gpu turbo boost/throttle again, was getting stuck due to vlv rps patches (Chris+Imre) - fix runtime pm fallout (Paulo) - bios framebuffer inherit fix (Chris) - a few smaller things * tag 'drm-intel-fixes-2014-04-04' of git://anongit.freedesktop.org/drm-intel: (196 commits) Skip intel_crt_init for Dell XPS 8700 drm/i915: vlv: fix RPS interrupt mask setting Revert "drm/i915/vlv: fixup DDR freq detection per Punit spec" drm/i915: move power domain init earlier during system resume drm/i915: Fix the computation of required fb size for pipe drm/i915: don't get/put runtime PM at the debugfs forcewake file drm/i915: fix WARNs when reading DDI state while suspended drm/i915: don't read cursor registers on powered down pipes drm/i915: get runtime PM at i915_display_info drm/i915: don't read pp_ctrl_reg if we're suspended drm/i915: get runtime PM at i915_reg_read_ioctl drm/i915: don't schedule force_wake_timer at gen6_read drm/i915: vlv: reserve the GT power context only once during driver init drm/i915: prefer struct drm_i915_private to drm_i915_private_t drm/i915/overlay: prefer struct drm_i915_private to drm_i915_private_t drm/i915/ringbuffer: prefer struct drm_i915_private to drm_i915_private_t drm/i915/display: prefer struct drm_i915_private to drm_i915_private_t drm/i915/irq: prefer struct drm_i915_private to drm_i915_private_t drm/i915/gem: prefer struct drm_i915_private to drm_i915_private_t drm/i915/dma: prefer struct drm_i915_private to drm_i915_private_t ...
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git://anongit.freedesktop.org/tegra/linux由 Dave Airlie 提交于
drm/tegra: Changes for v3.15-rc1 Implement eDP support for Tegra124 and support the PRIME vmap()/vunmap() operations. A symbol that is required for upcoming V4L2 support is now exported by the host1x driver. Relicense drivers under the GPL v2 for consistency. One exception is the public header file, which is relicensed under MIT to abide by the common rule. * tag 'drm/tegra/for-3.15-rc1' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: Use standard GPL v2 license text drm/tegra: Relicense under GPL v2 drm/tegra: Relicense public header under MIT drm/tegra: Add eDP support gpu: host1x: export host1x_syncpt_incr_max() function drm/tegra: prime: Add vmap support
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git://anongit.freedesktop.org/tegra/linux由 Dave Airlie 提交于
drm/panel: Changes for v3.15-rc1 Add support for a couple more simple panels. A few cleanups to the simple panel driver are also included (gpiod interface conversion, removal of redundant call to regulator_disable()). * tag 'drm/panel/for-3.15-rc1' of git://anongit.freedesktop.org/tegra/linux: drm/panel: add support for LG LD070WX3-SL01 panel drm/panel: add support for LG LH500WX1-SD03 panel drm/panel: simple: Allow DSI panels to provide mode flags drm/panel: simple: Allow GPIO accesses to sleep drm/panel: remove redundant regulator_disable() drm/panel: use gpiod interface for enable GPIO drm/panel: Add LG 12.9" LCD panel MAINTAINERS: Add entry for DRM panel drivers Conflicts: MAINTAINERS
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由 Dave Airlie 提交于
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Summaries: - Add MIPI-DSI Driver, and dt bindigs - Add S6E8AA0 MIPI-DSI based panel drivers, and dt bindings - Add LD9040 parallel panel driver . this driver is placed in drivers/gpu/drm/panel, and it seems to be used for exynos drm as of now, - Some fixups Changelog v2: - Remove super device support, and relevant dt bindings for more reviews. - Fix module build errors you pointed out. - Re-based it to drm-next again. * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/bridge: export ptn3460_init function drm/exynos: remove MODULE_DEVICE_TABLE definitions ARM: dts: exynos4412-trats2: enable exynos/fimd node ARM: dts: exynos4210-trats: enable exynos/fimd node ARM: dts: exynos4412-trats2: add panel node ARM: dts: exynos4210-trats: add panel node ARM: dts: exynos4: add MIPI DSI Master node drm/panel: add S6E8AA0 driver ARM: dts: exynos4210-universal_c210: add proper panel node drm/panel: add ld9040 driver panel/ld9040: add DT bindings panel/s6e8aa0: add DT bindings drm/exynos: add DSIM driver exynos/dsim: add DT bindings drm/exynos: disallow fbdev initialization if no device is connected drm/mipi_dsi: create dsi devices only for nodes with reg property drm/mipi_dsi: add flags to DSI messages
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git://people.freedesktop.org/~thomash/linux由 Dave Airlie 提交于
Pull request of 2014-04-04 The second vmwgfx pull request for the 3.15 merge window. Contains a fbdev fix by Christopher Friedt, one fix for a locking order violation introduced in 3.14 (hit when using queries) and finally a removal of the DRM_AUTH requirement around some vmwgfx IOCTLS where the caller is already required to have an open handle to the object. * tag 'vmwgfx-next-2014-04-04' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: correct fb_fix_screeninfo.line_length drm/vmwgfx: Remove authorization requirements around some more ioctls drm/vmwgfx: Fix query buffer locking order violation
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git://people.freedesktop.org/~thomash/linux由 Dave Airlie 提交于
Pull request of 2014-04-04 Currently only a single patch fixing up mixed use of the ttm_bo_reserve and ww_mutex APIs * tag 'ttm-next-2014-04-04' of git://people.freedesktop.org/~thomash/linux: drm/ttm: Hide the implementation details of reservation
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由 Dave Airlie 提交于
If we get a msg.reply of REPLY_DEFER, we also get an err of 0 so we fail reads with 0 < size and return -EPROTO instead of trying again. v2: same fix in i2c code. Found writing MST support. Reviewed-by: NJani Nikula <jani.nikula@intel.com> Reviewed-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 04 4月, 2014 25 次提交
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由 Inki Dae 提交于
This patch exports ptn3460_init function so that other modules can call this function. Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Inki Dae 提交于
This patch removes MODULE_DEVICE_TABLE definition to of_device_id of DP and MIPI-DSI drivers. Eyxnos drm should be built as single module so these definitions should be removed. Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Andrzej Hajda 提交于
The patch changes fimd node status to OK. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch changes fimd node status to OK. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds s6e8aa0 panel node for trats2. It adds also trats2 specific properties for DSI and regulator required by panel. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds s6e8aa0 panel node for trats. It adds also trats specific properties for DSI. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
This is a common part of DSI node for all Exynos4 boards. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds MIPI-DSI based S6E8AA0 AMOLED LCD panel driver. Driver uses mipi_dsi bus to communicate with panel and exposes drm_panel interface. v2 - added bus error handling, - set maxmimum DSI packet size on init, - removed unsupported brightness drm_panel callbacks, - minor improvements v3 - switched to gpiod framework, - minor fixes in error handling Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
This patch replaces panel bindings for panel initialized by boot loader with bindings to proper ld9040 panel. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds LD9040 parallel RGB panel driver with SPI control interface. The driver uses drm_panel framework. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds bindings for ld9040 panel. Bindings describe panel resources, boot delays, display timings and physical size. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds bindings for s6e8aa0 panel. Bindings describes panel resources, boot delays, display timings, orientation and physical size. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds driver for Exynos DSI master (DSIM). It is a platform driver which is registered as exynos_drm_display sub-driver of exynos_drm framework and implements DRM encoder/connector pair. It is also MIPI-DSI host driver and provides DSI bus for panels. It interacts with its panel(s) using drm_panel framework. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The patch adds DT bindings for Exynos DSI Master. DSIM follows rules for DSI bus host bindings [1]. Properties describes its resources: memory, interrupt, clocks, phy, regulators, frequencies of clocks and video interfaces. [1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
This patch adds explicit check if there is a connector with connected status before fbdev initialization. It prevents creation of default fbdev 1024x768 which is unusable on panels with bigger resolutions. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
MIPI DSI host node can contain child nodes which are not DSI devices. Checking for existence of reg property can be used to distinguish such nodes. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
This patch adds flags field to mipi_dsi_msg structure and two flags: - MIPI_DSI_MSG_REQ_ACK - request ACK from peripheral for given message, - MIPI_DSI_MSG_USE_LPM - use Low Power Mode to transmit message. The first flag is usually helpful during DSI diagnostic, the second flag is required by some peripherals during configuration phase. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Giacomo Comes 提交于
The Dell XPS 8700 has a onboard Display port and HDMI port and no VGA port. The call intel_crt_init freeze the machine, so skip such call. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73559 Signed-off-by: Giacomo Comes <comes at naic.edu> Cc: stable@vger.kernel.org Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Imre Deak 提交于
This typo may lead to missed RPS interrupts and as a result a too low or too high frequency for the current workload. The interrupt mask will be set properly at a subsequent GPU idle event, but can get corrupted again at the next RPS up/down event. Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Deepak S 提交于
As per the inputs provided by hardware team we still use DDR Rates as 0,1=800, 2=1066, 3=1333. With this change, Turbo freqs used on current machines matches. This reverts commit f64a28a7. commit f64a28a7 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Mon Nov 4 16:07:00 2013 -0800 drm/i915/vlv: fixup DDR freq detection per Punit spec v2: Add reference to previous commit which changed this. (Daniel) Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDeepak S <deepak.s@linux.intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Imre Deak 提交于
During resume the intel hda audio driver depends on the i915 driver reinitializing the audio power domain. Since the order of calling the i915 resume handler wrt. that of the audio driver is not guaranteed, move the power domain reinitialization step to the resume_early handler. This is guaranteed to run before the resume handler of any other driver. The power domain initialization in turn requires us to enable the i915 pci device first, so move that part earlier too. Accordingly disabling of the i915 pci device should happen after the audio suspend handler ran. So move the disabling later from the i915 resume handler to the resume_late handler. v2: - move intel_uncore_sanitize/early_sanitize earlier too, so they don't get reordered wrt. intel_power_domains_init_hw() Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76152Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NTakashi Iwai <tiwai@suse.de> Cc: stable@vger.kernel.org [danvet: Add cc: stable and loud comments that this is just a hack.] [danvet: Fix "Should it be static?" sparse warning reported by Wu Fengguang's kbuilder.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Thierry Reding 提交于
Use the more canonical and concise variant of the GPL v2 license text. Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
The majority of the code in this driver is licensed under the GPL v2, so relicense the rest under GPL v2 as well for consistency. Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
This file will eventually be exported to libdrm, where all the public header files use the MIT license. Reported-by: NErik Faye-Lund <kusmabite@gmail.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NEmil Goode <emilgoode@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Add support for eDP functionality found on Tegra124 and later SoCs. Only fast link training is currently supported. Signed-off-by: NThierry Reding <treding@nvidia.com>
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