1. 08 6月, 2017 35 次提交
  2. 07 6月, 2017 5 次提交
    • A
      net: fec: Clear and enable MIB counters on imx51 · 2b30842b
      Andrew Lunn 提交于
      Both the IMX51 and IMX53 datasheet indicates that the MIB counters
      should be cleared during setup. Otherwise random numbers are returned
      via ethtool -S.  Add a quirk and a function to do this.
      
      Tested on an IMX51.
      Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2b30842b
    • D
      Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net · 216fe8f0
      David S. Miller 提交于
      Just some simple overlapping changes in marvell PHY driver
      and the DSA core code.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      216fe8f0
    • D
      Merge branch 'phylib-support-for-MV88X3310-10G-phy' · 9747e231
      David S. Miller 提交于
      Russell King says:
      
      ====================
      net: Add phylib support for MV88X3310 10G phy
      
      This patch series adds support for the Marvell 88x3310 PHY found on
      the SolidRun Macchiatobin board.
      
      The first patch introduces a set of generic Clause 45 PHY helpers that
      C45 PHY drivers can make use of if they wish.
      
      Patch 2 ensures that the Clause 22 aneg_done function will not be
      called for incompatible Clause 45 PHYs.
      
      Patch 3 fixes the aneg restart to be compatible with C45 PHYs - it can
      currently only cope with C22 PHYs.
      
      Patch 4 moves the "gen10g" driver into the Clause 45 code, grouping all
      core clause 45 code together.
      
      Patch 5 adds the phy_interface_t types for XAUI and 10GBase-KR links.
      As 10GBase-KR appears to be compatible with XFI and SFI, XFI and SFI,
      I currently see no reason to add XFI and SFI interface modes.  There
      seems to be vendor code out there using these, but they all alias back
      to the same hardware settings.
      
      Patch 6 adds support for the MV88X3310 PHY, which supports both the
      copper and fiber interfaces.  It should be noted that the MV88X3310
      automatically switches its MAC facing interface between 10GBase-KR
      and SGMII depending on the negotiated speed.  This was discussed with
      Florian, and we agreed to update the phy interface mode depending on
      the properties of the actual link mode to the PHY.
      
      v2:
      - update sysfs-class-net-phydev documentation
      - avoid genphy_aneg_done for non-C22 PHYs
      - expand comment about 0x30 constant
      - add comment about lack of reset
      - configure driver using MARVELL_10G_PHY
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9747e231
    • R
      net: phy: add Marvell Alaska X 88X3310 10Gigabit PHY support · 20b2af32
      Russell King 提交于
      Add phylib support for the Marvell Alaska X 10 Gigabit PHY (MV88X3310).
      This phy is able to operate at 10G, 1G, 100M and 10M speeds, and only
      supports Clause 45 accesses.
      
      The PHY appears (based on the vendor IDs) to be two different vendors
      IP, with each devad containing several instances.
      
      This PHY driver has only been tested with the RJ45 copper port, fiber
      port and a Marvell Armada 8040-based ethernet interface.
      
      It should be noted that to use the full range of speeds, MAC drivers
      need to also reconfigure the link mode as per phydev->interface, since
      the PHY automatically changes its interface mode depending on the
      negotiated speed.
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      20b2af32
    • R
      net: phy: add XAUI and 10GBASE-KR PHY connection types · c125ca09
      Russell King 提交于
      XAUI allows XGMII to reach an extended distance by using a XGXS layer at
      each end of the MAC to PHY link, operating over four Serdes lanes.
      
      10GBASE-KR is a single lane Serdes backplane ethernet connection method
      with autonegotiation on the link.  Some PHYs use this to connect to the
      ethernet interface at 10G speeds, switching to other connection types
      when utilising slower speeds.
      
      10GBASE-KR is also used for XFI and SFI to connect to XFP and SFP fiber
      modules.
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c125ca09