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  1. 29 6月, 2019 6 次提交
  3. 27 6月, 2019 1 次提交
  5. 26 6月, 2019 9 次提交
  7. 22 6月, 2019 8 次提交
  9. 15 6月, 2019 13 次提交
  11. 12 6月, 2019 3 次提交
    • L
      i2c: iop: Use GPIO descriptors · fdb7e884
      由 Linus Walleij 提交于 
      The IOP3xx has some elaborate code to directly slam the
GPIO lines multiplexed with I2C down low before enablement,
apparently a workaround for a hardware bug found in the
early chips.

After consulting the developer documentation for IOP80321
and IOP80331 I can clearly see that this may be useful for
IOP80321 family (mach-iop32x) but it is highly dubious for
any 80331 series or later chip: in these chips the lines
are not multiplexed for UARTs.

We convert the code to pass optional GPIO descriptors
and register these only on the 80321-based boards where
it makes sense, optionally obtain them in the driver and
use the gpiod_set_raw_value() to ascertain the line gets
driven low when needed.

The GPIO driver does not give the GPIO chip a reasonable
label so the patch also adds that so that these machine
descriptor tables can be used.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      fdb7e884
    • L
      i2c: s3c2410: Convert to use GPIO descriptors · ed7357c9
      由 Linus Walleij 提交于 
      The S3C2410 does some funny dance around its pins:
- First try to call back to the platform to get and control
  some GPIO pins
- If this doesn't work, it tries to get a pin control handle
- If this doesn't work, it retrieves two GPIOs from the device
  tree node and does nothing with them

If we're gonna retrieve two GPIOs and do nothing with them, we
might as well do it using the GPIO descriptor API. When we use
the resource management API, the code gets smaller.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      ed7357c9
    • A
      i2c: bcm2835: Model Divider in CCF · bebff81f
      由 Annaliese McDermond 提交于 
      Model the I2C bus clock divider as a part of the Core Clock Framework.
Primarily this removes the clk_get_rate() call from each transfer.
This call causes problems for slave drivers that themselves have
internal clock components that are controlled by an I2C interface.
When the slave's internal clock component is prepared, the prepare
lock is obtained, and it makes calls to the I2C subsystem to
command the hardware to activate the clock.  In order to perform
the I2C transfer, this driver sets the divider, which requires
it to get the parent clock rate, which it does with clk_get_rate().
Unfortunately, this function will try to take the clock prepare
lock, which is already held by the slave's internal clock calls
creating a deadlock.

Modeling the divider in the CCF natively removes this dependency
and the divider value is only set upon changing the bus clock
frequency or changes in the parent clock that cascade down to this
divisor.  This obviates the need to set the divider with every
transfer and avoids the deadlock described above.  It also should
provide better clock debugging and save a few cycles on each
transfer due to not having to recalcuate the divider value.
Signed-off-by: NAnnaliese McDermond <nh6z@nh6z.net>
Acked-by: NStefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      bebff81f