Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>

The core of PXA955 is PJ4. Add new PJ4 support. And add new macro
CONFIG_PXA95x.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

The PXA-SPI driver relies on some files / defines which are arm specific
and are within the ARM tree. The CE4100 SoC which is x86 has also the
SPI core.
This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to
include/linux where the CE4100 can access them.

This move got verified by building the following defconfigs:
   cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig
   imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig
   raumfeld_defconfig magician_defconfig
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>

Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>

We now:
 * check for a v3 controller before setting 8-bit bus width
 * offer a callback for platform code to switch to 8-bit mode, which
   allows non-v3 controllers to support it
 * rely on mmc->caps |= MMC_CAP_8_BIT_DATA; in platform code to specify
   that the board designers have indeed brought out all the pins for
   8-bit to the slot.

We were previously relying only on whether the *controller* supported
8-bit, which doesn't tell us anything about the pin configuration in
the board design.

This fixes the MMC card regression reported by Maxim Levitsky here:
   http://thread.gmane.org/gmane.linux.kernel.mmc/4336
by no longer assuming that 8-bit works by default.
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Tested-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Support Marvell PXA168/PXA910/MMP2 SD Host Controller.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Adding a new flash definition would need less code.
Keep the platform passing flash definition method.
If one flash is both defined in platform data and builtin table,
driver would select the one from platform data first.

By this way, platform could select the timing most suit for itself,
not need to follow the common settings.
Signed-off-by: NLei Wen <leiwen@marvell.com>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

mach-mmp needs to clear wake event in order to clear the keypad interrupt
Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

mach-mmp utilizes pxa27x_keypad code so we need to move header to
platform pxa directory.
Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

This fixes the compiler warning:

	arch/arm/plat-pxa/pwm.c: In function 'pwm_probe':
	arch/arm/plat-pxa/pwm.c:179: warning: initialization discards qualifiers from pointer target type
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Not tested and enabled on MMP at this moment, and since the IRQ
is different from mach-pxa, I'd prefer to move the PMU device
back into mach-pxa/. Will introduce the PMU device to MMP once
it's enabled and tested.
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

PMU is not tested and enabled on MMP architecture at this moment,
the device IRQ number, IRQ_PMU depends on ARCH_PXA. Build PMU only
for ARCH_PXA.
Signed-off-by: NJonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

In order to prevent code ambiguous, add namespace on functions in ssp driver.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Update mfp setting for mmp2.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NJulia Lawall <julia@diku.dk>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

The assignments of res to the results of the two calls to
platform_get_resource make it impossible to use res in the error handling
code in the arguments to release_mem_region.

The semantic match that finds the former problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@r exists@
expression E, E1;
identifier f;
statement S1,S3;
iterator iter;
@@

if ((E == NULL && ...) || ...)
{
 ... when != false ((E == NULL && ...) || ...)
     when != true  ((E != NULL && ...) || ...)
     when != iter(E,...) S1
     when != E = E1
(
 sizeof(E->f)
|
* E->f
)
 ... when any
 return ...;
}
else S3
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Support ssp devices in PXA168. PXA168 could reuse the code of PXA SSP.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Try to keep minimum ifdef in ssp.h.  Some of the definitions are valid
only to specific SoCs, and device drivers should be responsible to take
care of these difference.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Test the just-allocated value for NULL rather than some other value.

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression x,y;
statement S;
@@

x = \(kmalloc\|kcalloc\|kzalloc\)(...);
(
if ((x) == NULL) S
|
if (
-   y
+   x
       == NULL)
 S
)
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds an initcall for the pxa platforms so that they
register their PMU IRQs with the PMU framework in the Kernel.

Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h

percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: NTejun Heo <tj@kernel.org>
Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>

Use resource_size for {request/release}_mem_region and ioremap.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move
the pxa3xx_nand.h from mach directory to plat directoy.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Cc: David Woodhouse <david.woodhouse@intel.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Ensure we do not read/write outside array boundaries with a negative index.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Since MFP_PIN_GPIO* now includes 128-255, mfp_to_gpio() is no longer
valid for those additional pins, fix it.
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Add some debug information for PXA DMA :
 - descriptors queued
 - channels state
 - global state

--
Since V1: reverted to old register access (no more dma_readl() or dma_writel()).
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Reduce loop for dma irq handler callbacks to the minimum
required.

Since V1: included suggestion from Nicolas Pitre to improve
even further the loop.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Add and initialize the mfp setting of pxa935 chip.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

There is currently an uncovered case for MFP configuration on PXAs which
is selected by setting the PULL_SEL bit but none of the PULL{UP,DOWN}_EN
bits. This case is needed to explicitly let pins float, even if the
selected alternate function would default to a configuration with a pull
resistor enabled.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

As slab is available early now, use kzalloc() rather than
alloc_bootmem_low() in pxa_init_gpio_chip().

This removes the following boot time warning:

<4>------------[ cut here ]------------
<4>WARNING: at mm/bootmem.c:535 alloc_arch_preferred_bootmem+0x2c/0x54()
<d>Modules linked in:
[<c0029430>] (unwind_backtrace+0x0/0xdc) from [<c0036f64>] (warn_slowpath_common+0x4c/0x80)
[<c0036f64>] (warn_slowpath_common+0x4c/0x80) from [<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54)
[<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54) from [<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0)
[<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0) from [<c000f6e4>] (___alloc_bootmem+0xc/0x34)
[<c000f6e4>] (___alloc_bootmem+0xc/0x34) from [<c000cb20>] (pxa_init_gpio+0x48/0x228)
[<c000cb20>] (pxa_init_gpio+0x48/0x228) from [<c0009794>] (init_IRQ+0x34/0x44)
[<c0009794>] (init_IRQ+0x34/0x44) from [<c00089d4>] (start_kernel+0x144/0x264)
[<c00089d4>] (start_kernel+0x144/0x264) from [<a0008034>] (0xa0008034)
<4>---[ end trace 1b75b31a2719ed1c ]---
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMingwei Wang <mingwei.wang@marvell.com>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

Signed-off-by: NEric Miao <eric.miao@marvell.com>

Signed-off-by: NPaul Shen <paul.shen@marvell.com>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

pxa_gpio_irq_type() and pxa_unmask_muxed_gpio() will touch non-muxed GPIOs
(0 and 1 on PXA2xx/PXA3xx) bits in GRERx and GFERx, which is incorrect.
Actually, only those bits should get updated if the corresponding bits are
set in c->irq_mask as well. Fix this by updating only those relevant bits.
Reported-and-tested-by: NDaniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

arch/arm/plat-pxa/mfp.c is not intended to be use by PXA25x/PXA27x,
make it explicit here only for use by PXA3xx or ARCH_MMP.
Reported-by: NGuennadi Liakhovestski <g.liakhovestski@gmx.de>
Reported-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

Signed-off-by: NBin Yang <bin.yang@marvell.com>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

Signed-off-by: NEric Miao <eric.miao@marvell.com>