1. 15 11月, 2013 1 次提交
  2. 15 10月, 2013 1 次提交
    • J
      spi: Fix checkpatch issue · 5fe5f05e
      Jingoo Han 提交于
      Fix the following checkpatch error and warnings.
      
        ERROR: space required after that ',' (ctx:VxV)
        WARNING: quoted string split across lines
        WARNING: max() should probably be max_t(int, nb, master->num_chipselect)
        WARNING: sizeof *spi should be sizeof(*spi)
        WARNING: sizeof *master should be sizeof(*master)
        WARNING: sizeof x should be sizeof(x)
      Signed-off-by: NJingoo Han <jg1.han@samsung.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      5fe5f05e
  3. 12 10月, 2013 2 次提交
    • M
      spi: Provide common spi_message processing loop · b158935f
      Mark Brown 提交于
      The loops which SPI controller drivers use to process the list of transfers
      in a spi_message are typically very similar and have some error prone areas
      such as the handling of /CS. Help simplify drivers by factoring this code
      out into the core - if drivers provide a transfer_one() function instead
      of a transfer_one_message() function the core will handle processing at the
      message level.
      
      /CS can be controlled by either setting cs_gpio or providing a set_cs
      function. If this is not possible for hardware reasons then both can be
      omitted and the driver should continue to implement manual /CS handling.
      
      This is a first step in refactoring and it is expected that there will be
      further enhancements, for example factoring out of the mapping of transfers
      for DMA and the initiation and completion of interrupt driven transfers.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      b158935f
    • M
      spi: Provide per-message prepare and unprepare operations · 2841a5fc
      Mark Brown 提交于
      Many SPI drivers perform setup and tear down on every message, usually
      doing things like DMA mapping the message. Provide hooks for them to use
      to provide such operations.
      
      This is of limited value for drivers that implement transfer_one_message()
      but will be of much greater utility with future factoring out of standard
      implementations of that function.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      2841a5fc
  4. 11 10月, 2013 2 次提交
  5. 08 10月, 2013 2 次提交
  6. 27 9月, 2013 2 次提交
  7. 17 9月, 2013 1 次提交
  8. 01 9月, 2013 2 次提交
    • W
      spi: quad: fix the name of DT property · a110f93d
      wangyuhang 提交于
      spi: quad: fix the name of DT property in patch
      
      The previous property name spi-tx-nbits and spi-rx-nbits looks not
      human-readable. To make it consistent with other devices, using property
      name spi-tx-bus-width and spi-rx-bus-width instead of the previous one
      specify the number of data wires that spi controller will work in.
      Add the specification in spi-bus.txt.
      Signed-off-by: Nwangyuhang <wangyuhang2014@gmail.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      a110f93d
    • A
      spi: core: Fix spi_register_master error handling · e93b0724
      Axel Lin 提交于
      In the case spi_master_initialize_queue() fails, current code calls
      device_unregister() before return error from spi_register_master().
      However, all the drivers call spi_master_put() in the error path if
      spi_register_master() fails. Thus we should call device_del() rather than
      device_unregister() before return error from spi_register_master().
      
      This also makes all the spi_register_master() error handling consistent,
      because all other error paths of spi_register_master() expect drivers to
      call spi_master_put() if spi_register_master() fails.
      Signed-off-by: NAxel Lin <axel.lin@ingics.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      e93b0724
  9. 31 8月, 2013 2 次提交
  10. 23 8月, 2013 2 次提交
    • A
      spi: Remove a redundant test for master->running in spi_queued_transfer · 96b3eace
      Axel Lin 提交于
      We have tested master->running immediately after grab the master->queue_lock.
      The status of master->running won't be changed until we release the lock.
      Thus remove a redundant test for master->running.
      Signed-off-by: NAxel Lin <axel.lin@ingics.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      96b3eace
    • S
      spi: conditional checking of mode and transfer bits. · db90a441
      Sourav Poddar 提交于
      There is a bug in the following patch:
      http://comments.gmane.org/gmane.linux.kernel.spi.devel/14420
      
      spi: DUAL and QUAD support
      
          fix the previous patch some mistake below:
          1. DT in slave node, use "spi-tx-nbits = <1/2/4>" in place of using
             "spi-tx-dual, spi-tx-quad" directly, same to rx. So correct the
             previous way to get the property in @of_register_spi_devices().
          2. Change the value of transfer bit macro(SPI_NBITS_SINGLE, SPI_NBITS_DUAL
             SPI_NBITS_QUAD) to 0x01, 0x02 and 0x04 to match the actual wires.
          3. Add the following check
             (1)keep the tx_nbits and rx_nbits in spi_transfer is not beyond the
                single, dual and quad.
             (2)keep tx_nbits and rx_nbits are contained by @spi_device->mode
                example: if @spi_device->mode = DUAL, then tx/rx_nbits can not be set
                         to QUAD(SPI_NBITS_QUAD)
             (3)if "@spi_device->mode & SPI_3WIRE", then tx/rx_nbits should be in
                single(SPI_NBITS_SINGLE)
      
      Checking of the tx/rx transfer bits and mode bits should be done conditionally
      based on type of buffer filled else EINVAL condition will
      always get hit either for rx or tx.
      Signed-off-by: NSourav Poddar <sourav.poddar@ti.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      db90a441
  11. 22 8月, 2013 1 次提交
    • W
      spi: DUAL and QUAD support · f477b7fb
      wangyuhang 提交于
      fix the previous patch some mistake below:
      1. DT in slave node, use "spi-tx-nbits = <1/2/4>" in place of using
         "spi-tx-dual, spi-tx-quad" directly, same to rx. So correct the
         previous way to get the property in @of_register_spi_devices().
      2. Change the value of transfer bit macro(SPI_NBITS_SINGLE, SPI_NBITS_DUAL
         SPI_NBITS_QUAD) to 0x01, 0x02 and 0x04 to match the actual wires.
      3. Add the following check
         (1)keep the tx_nbits and rx_nbits in spi_transfer is not beyond the
            single, dual and quad.
         (2)keep tx_nbits and rx_nbits are contained by @spi_device->mode
            example: if @spi_device->mode = DUAL, then tx/rx_nbits can not be set
                     to QUAD(SPI_NBITS_QUAD)
         (3)if "@spi_device->mode & SPI_3WIRE", then tx/rx_nbits should be in
            single(SPI_NBITS_SINGLE)
      Signed-off-by: Nwangyuhang <wangyuhang2014@gmail.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      f477b7fb
  12. 15 8月, 2013 1 次提交
    • G
      spi: limit default transfer speed to controller's max speed · 56ede94a
      Gabor Juhos 提交于
      Since the 'spi: Support transfer speed checking in the core'
      change, the SPI core validates the desired speed of a given
      transfer against the minimum and maximum speeds supported by
      the controller.
      
      If the speed of a transfer is not specified, the core uses
      the maximum speed of the actual SPI device. However if the
      maximum speed of the actual device is greater than the
      maximum speed of the controller, the core will reject the
      transfer due to the aforementioned change.
      
      Change the code to use the maximum speed of the controller
      by default if that is below the device's maximum speed.
      Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      56ede94a
  13. 30 7月, 2013 1 次提交
  14. 18 7月, 2013 1 次提交
  15. 15 7月, 2013 2 次提交
  16. 04 7月, 2013 1 次提交
  17. 04 6月, 2013 1 次提交
  18. 07 4月, 2013 2 次提交
  19. 02 4月, 2013 1 次提交
  20. 01 4月, 2013 2 次提交
  21. 13 2月, 2013 1 次提交
  22. 11 2月, 2013 1 次提交
  23. 08 2月, 2013 1 次提交
  24. 07 2月, 2013 1 次提交
  25. 05 2月, 2013 3 次提交
  26. 15 12月, 2012 1 次提交
  27. 11 12月, 2012 1 次提交
  28. 08 12月, 2012 1 次提交