1. 06 3月, 2019 2 次提交
  2. 21 2月, 2019 1 次提交
  3. 19 2月, 2019 1 次提交
  4. 16 2月, 2019 1 次提交
  5. 05 2月, 2019 1 次提交
    • T
      drm/i915/selftests: Context SSEU reconfiguration tests · c06ee6ff
      Tvrtko Ursulin 提交于
      Exercise the context image reconfiguration logic for idle and busy
      contexts, with the resets thrown into the mix as well.
      
      Free from the uAPI restrictions this test runs on all Gen9+ platforms
      with slice power gating.
      
      v2:
       * Rename some helpers for clarity.
       * Include subtest names in error logs.
       * Remove unnecessary function export.
      
      v3:
       * Rebase for RUNTIME_INFO.
      
      v4:
       * Fix incomplete unexport from v2. (Chris Wilson)
      
      v5:
       * Rebased for runtime pm api changes.
      
      v6:
       * Rebased for i915_reset.c.
      
      v7:
       * Tidy checkpatch warnings.
       * Consolidate error checking and logging a bit.
       * Skip idle test phase if something failed before it.
      
      v8:
       (Chris Wilson)
       * Fix i915_request_wait error handling.
       * No need to PIN_HIGH the VMA.
       * Remove pointless GEM_BUG_ON before pointer dereference.
      
      v9:
       * Avoid rq leak if rpcs query fails. (Chris)
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> # v6
      Link: https://patchwork.freedesktop.org/patch/msgid/20190205095032.22673-5-tvrtko.ursulin@linux.intel.com
      c06ee6ff
  6. 22 1月, 2019 1 次提交
  7. 15 1月, 2019 3 次提交
  8. 02 1月, 2019 1 次提交
  9. 30 10月, 2018 1 次提交
  10. 26 10月, 2018 1 次提交
  11. 27 9月, 2018 1 次提交
  12. 21 9月, 2018 1 次提交
  13. 20 9月, 2018 2 次提交
  14. 13 7月, 2018 2 次提交
  15. 09 7月, 2018 1 次提交
    • C
      drm/i915: Provide a timeout to i915_gem_wait_for_idle() · ec625fb9
      Chris Wilson 提交于
      Usually we have no idea about the upper bound we need to wait to catch
      up with userspace when idling the device, but in a few situations we
      know the system was idle beforehand and can provide a short timeout in
      order to very quickly catch a failure, long before hangcheck kicks in.
      
      In the following patches, we will use the timeout to curtain two overly
      long waits, where we know we can expect the GPU to complete within a
      reasonable time or declare it broken.
      
      In particular, with a broken GPU we expect it to fail during the initial
      GPU setup where do a couple of context switches to record the defaults.
      This is a task that takes a few milliseconds even on the slowest of
      devices, but we may have to wait 60s for hangcheck to give in and
      declare the machine inoperable. In this a case where any gpu hang is
      unacceptable, both from a timeliness and practical standpoint.
      
      The other improvement is that in selftests, we do not need to arm an
      independent timer to inject a wedge, as we can just limit the timeout on
      the wait directly.
      
      v2: Include the timeout parameter in the trace.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180709122044.7028-1-chris@chris-wilson.co.uk
      ec625fb9
  16. 07 7月, 2018 3 次提交
  17. 06 7月, 2018 2 次提交
  18. 30 6月, 2018 1 次提交
  19. 29 6月, 2018 1 次提交
  20. 20 6月, 2018 1 次提交
  21. 14 6月, 2018 1 次提交
  22. 06 6月, 2018 1 次提交
  23. 24 5月, 2018 1 次提交
    • C
      drm/i915: Look for an active kernel context before switching · 09a4c02e
      Chris Wilson 提交于
      We were not very carefully checking to see if an older request on the
      engine was an earlier switch-to-kernel-context before deciding to emit a
      new switch. The end result would be that we could get into a permanent
      loop of trying to emit a new request to perform the switch simply to
      flush the existing switch.
      
      What we need is a means of tracking the completion of each timeline
      versus the kernel context, that is to detect if a more recent request
      has been submitted that would result in a switch away from the kernel
      context. To realise this, we need only to look in our syncmap on the
      kernel context and check that we have synchronized against all active
      rings.
      
      v2: Since all ringbuffer clients currently share the same timeline, we do
      have to use the gem_context to distinguish clients.
      
      As a bonus, include all the tracing used to debug the death inside
      suspend.
      
      v3: Test, test, test. Construct a selftest to exercise and assert the
      expected behaviour that multiple switch-to-contexts do not emit
      redundant requests.
      Reported-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Fixes: a89d1f92 ("drm/i915: Split i915_gem_timeline into individual timelines")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180524081135.15278-1-chris@chris-wilson.co.uk
      09a4c02e
  24. 08 5月, 2018 1 次提交
  25. 03 5月, 2018 2 次提交
    • C
      drm/i915: Split i915_gem_timeline into individual timelines · a89d1f92
      Chris Wilson 提交于
      We need to move to a more flexible timeline that doesn't assume one
      fence context per engine, and so allow for a single timeline to be used
      across a combination of engines. This means that preallocating a fence
      context per engine is now a hindrance, and so we want to introduce the
      singular timeline. From the code perspective, this has the notable
      advantage of clearing up a lot of mirky semantics and some clumsy
      pointer chasing.
      
      By splitting the timeline up into a single entity rather than an array
      of per-engine timelines, we can realise the goal of the previous patch
      of tracking the timeline alongside the ring.
      
      v2: Tweak wait_for_idle to stop the compiling thinking that ret may be
      uninitialised.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180502163839.3248-2-chris@chris-wilson.co.uk
      a89d1f92
    • C
      drm/i915: Move timeline from GTT to ring · 65fcb806
      Chris Wilson 提交于
      In the future, we want to move a request between engines. To achieve
      this, we first realise that we have two timelines in effect here. The
      first runs through the GTT is required for ordering vma access, which is
      tracked currently by engine. The second is implied by sequential
      execution of commands inside the ringbuffer. This timeline is one that
      maps to userspace's expectations when submitting requests (i.e. given the
      same context, batch A is executed before batch B). As the rings's
      timelines map to userspace and the GTT timeline an implementation
      detail, move the timeline from the GTT into the ring itself (per-context
      in logical-ring-contexts/execlists, or a global per-engine timeline for
      the shared ringbuffers in legacy submission.
      
      The two timelines are still assumed to be equivalent at the moment (no
      migrating requests between engines yet) and so we can simply move from
      one to the other without adding extra ordering.
      
      v2: Reinforce that one isn't allowed to mix the engine execution
      timeline with the client timeline from userspace (on the ring).
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180502163839.3248-1-chris@chris-wilson.co.uk
      65fcb806
  26. 22 2月, 2018 1 次提交
  27. 16 2月, 2018 1 次提交
  28. 01 12月, 2017 1 次提交
  29. 22 11月, 2017 1 次提交
  30. 20 11月, 2017 2 次提交