- 16 10月, 2014 1 次提交
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由 Wei Yan 提交于
I2C drivers for hix5hd2 soc series, including following chipset Hi3716CV200, Hi3719CV100, Hi3718CV100, Hi3719MV100, Hi3718MV100. Signed-off-by: NWei Yan <sledge.yanwei@huawei.com> Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org> [wsa: folded dt docs into this patch] Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 07 10月, 2014 4 次提交
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由 Fabio Estevam 提交于
In the case of errors during probe, we should disable i2c_imx->clk. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Carl Peng 提交于
Add support for AMD version of the DW I2C host controller. The device is enumerated from ACPI namespace with ACPI ID AMD0010. Because the core driver needs an input source clock, and this is not an Intel LPSS device where clocks are provided through drivers/acpi/acpi_lpss.c, we register the clock ourselves if the clock rate is given in ->driver_data Signed-off-by: NCarl Peng <carlpeng008@gmail.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Mika Westerberg 提交于
In order to be able to create missing clock for AMD (and in future possibly others) we move getting clock for the device a bit later. Also make ACPI/DT configuration in the same place depending on from where the device was enumerated from. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Mika Westerberg 提交于
There is no way in ACPI to tell in which speed the host controller is supposed to run, so we default to fast mode (400KHz). Since this has been the default all the time there should be no functional changes with this change. This is the first step required to refactor the driver probe so that we can supply source clock from ACPI part of the driver to the core. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 03 10月, 2014 3 次提交
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由 Anders Berg 提交于
Add I2C bus driver for the controller found in the LSI Axxia family SoCs. The driver implements 10-bit addressing and SMBus transfer modes via emulation (including SMBus block data read). Signed-off-by: NAnders Berg <anders.berg@avagotech.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Naveen Krishna Ch 提交于
The HSI2C module on Exynos7 differs in the transfer status bits. Transfer status bits were moved to INT_ENABLE and INT_STATUS registers This patch adds support for the HSI2C module on Exynos7. 1. Implementes a "hw" field in the variant struct to distinguish the hardware. 2. Updates the dt-new compatible in dt-binding documenation Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Janusz Użycki 提交于
i2cdetect scanned i2c bus slow because the i2c-mxs driver ignored the NO_SLAVE_ACK bit during busy-waiting loop. Thanks to the patch, the speedup happens. Signed-off-by: NJanusz Uzycki <j.uzycki@elproma.com.pl> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 30 9月, 2014 11 次提交
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由 Doug Anderson 提交于
In <https://lkml.org/lkml/2014/6/10/265> pointed out that the 10-bit flag in the cros_ec_tunnel was useless. It went into a 16-bit flags field but was defined at (1 << 16). Since we have no 10-bit i2c devices on the other side of the tunnel on any known devices this was never a problem. Until we do it makes sense to remove this code. On the EC side the code to handle this flag was removed in <https://chromium-review.googlesource.com/204162>. Reported-by: NDave Jones <davej@redhat.com> Signed-off-by: NDoug Anderson <dianders@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Sjoerd Simons 提交于
To enable the cros-ec-tunnel driver to be auto-loaded when build as a module add an of match table (and export it) to match the modalias information passed on to userspace as the Cros EC MFD driver registers the MFD subdevices with an of_compatibility string. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
gcc rightfully says: drivers/i2c/busses/i2c-rcar.c:198:10: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Fan Du 提交于
Software is allowed to allocate number of descriptor size from 2 to 256, this i2c controller could process more descriptor, but for i2c core soft ware layer, only one i2c transaction is allowed each time. So here switch to minimum 2 descriptor when initialization. Signed-off-by: NFan Du <fan.du@intel.com> Acked-by: NNeil Horman <nhorman@tuxdriver.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Haibo Chen 提交于
According to the i.mx spec, for multimaster mode, if I2C is enabled when the bus is busy and asserts start, hardware inhibits the transmission, clears MSTA without signaling a stop, generate an interrupt, and set I2C_I2SR[IAL] to indicate a failed attempt to engage the bus, which means arbitration lost. In this case, we should first test I2C_I2SR[IAL], and clear this bit if it is set, and then I2C controller default to slave receive mode. This patch check the IAL bit every time before an I2c transmission. if IAL is set, clear it and make I2C controller to default mode. Signed-off-by: NHaibo Chen <haibo.chen@freescale.com> Acked-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Doug Anderson 提交于
Having a transfer more than 32 bits is not all that unlikely. Remove the annotation. The unlikely in the IRQ handler can't gain us much. It's not in a loop, so at most it would save 1 instruction per IRQ, which isn't much. In fact on the compiler I tested it produced the exact same code. Remove it too. Suggested-by: NDmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Sergei Shtylyov 提交于
Check if the ICMSR register (masked with the ICMIER register) evaluates to 0 in the driver's interrupt handler and return IRQ_NONE in that case, like many other drivers do. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Sergei Shtylyov 提交于
rcar_i2c_prepare_msg() always returns 0, so we can make this function return *void* and thus remove the result check in rcar_i2c_master_xfer(). Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Sergei Shtylyov 提交于
rcar_i2c_master_xfer() needlessly compares the message pointers (using indirect addressing) in order to detect the last I2C message, while it's enough to only compare the message indexes. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Tan, Raymond 提交于
Use the platform data to set the clk_freq when there is no DT configuration available. The clk_freq in turn will determine the I2C speed mode. In Quark, there is currently no other configuration mechanism other than board files. Signed-off-by: NRaymond Tan <raymond.tan@intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NHock Leong Kweh <hock.leong.kweh@intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Romain Baeriswyl 提交于
Some legacy devices support ony I2C standard mode at 100kHz. This patch allows to select the standard mode through the DTS with the use of the existing clock-frequency parameter. When clock-frequency parameter is not set, the fast mode is selected. Only when the parameter is set at 100000, the standard mode is selected. Signed-off-by: NRomain Baeriswyl <romainba@abilis.com> Reviewed-by: NChristian Ruppert <christian.ruppert@abilis.com> Acked-by: NAlan Tull <atull@opensource.altera.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 21 9月, 2014 1 次提交
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由 addy ke 提交于
I2C_CLKDIV register descripted in the previous version of RK3x chip manual is incorrect. Plus 1 is required. The correct formula: - T(SCL_HIGH) = T(PCLK) * (CLKDIVH + 1) * 8 - T(SCL_LOW) = T(PCLK) * (CLKDIVL + 1) * 8 - (SCL Divsor) = 8 * ((CLKDIVL + 1) + (CLKDIVH + 1)) - SCL = PCLK / (CLK Divsor) It will be updated to the latest version of chip manual. Signed-off-by: NAddy Ke <addy.ke@rock-chips.com> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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- 20 9月, 2014 4 次提交
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由 Janusz Użycki 提交于
If I2C_M_RD flag is set SELECT command is sent and afterward READ command. The patch fixes READ command to return READ failure error message instead of SELECT failure error message. Signed-off-by: NJanusz Uzycki <j.uzycki@elproma.com.pl> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Fan Du 提交于
In block write mode, when encapsulating dma_buffer, first element is 'command', the rest is data buffer, so only copy actual data buffer starting from block[1] with the size indicating by block[0]. Signed-off-by: NFan Du <fan.du@intel.com> Acked-by: NNeil Horman <nhorman@tuxdriver.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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由 Sergei Shtylyov 提交于
Bits 8-31 of all registers reflect the value of bits 0-7 on reads and should be 0 on writes, according to the manuals. RCAR_IRQ_ACK_{RECV|SEND} macros have all 1's in bits 8-31, thus going against the manuals, so fix them. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: stable@vger.kernel.org Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Mikko Perttunen 提交于
Currently the i2c-tegra bus driver prepares, enables and set_rates its clocks separately for each transfer. This causes locking problems when doing I2C transfers from clock notifiers; see http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/268653.html This patch moves clk_prepare/unprepare and clk_set_rate calls to the probe function, leaving only clk_enable/disable to be done on each transfer. This solves the locking issue. Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 05 9月, 2014 1 次提交
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由 Sergei Shtylyov 提交于
This reverts commit 150b8be3. The I2C core's per-adapter locks can't protect from IRQs, so the driver still needs a spinlock to protect the register accesses. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: stable@vger.kernel.org # 3.16+ Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 02 9月, 2014 5 次提交
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由 Marek Roszko 提交于
The driver was not bound checking the received length byte to ensure it was within the the buffer size that is allocated for SMBus blocks. This resulted in buffer overflows whenever an invalid length byte was received. It also failed to ensure the length byte was not zero. If it received zero, it would end up in an infinite loop as the at91_twi_read_next_byte function returned immediately without allowing RHR to be read to clear the RXRDY interrupt. Tested agaisnt a SMBus compliant battery. Signed-off-by: NMarek Roszko <mark.roszko@gmail.com> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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由 addy ke 提交于
In rk3x SOC, the I2C controller can receive/transmit up to 32 bytes data in one chunk, so the size of data to be write/read to/from TXDATAx/RXDATAx must be less than or equal 32 bytes at a time. Tested on rk3288-pinky board, elan receive 158 bytes data. Signed-off-by: NAddy Ke <addy.ke@rock-chips.com> Acked-by: NMax Schwarz <max.schwarz@online.de> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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由 Simon Lindgren 提交于
There is a race condition in at91_do_twi_xfer when signals arrive. If a signal is recieved while waiting for a transfer to complete wait_for_completion_interruptible_timeout() will return -ERESTARTSYS. This is not handled correctly resulting in interrupts still being enabled and a transfer being in flight when we return. Symptoms include a range of oopses and bus lockups. Oopses can happen when the transfer completes because the interrupt handler will corrupt the stack. If a new transfer is started before the interrupt fires the controller will start a new transfer in the middle of the old one, resulting in confused slaves and a locked bus. To avoid this, use wait_for_completion_io_timeout instead so that we don't have to deal with gracefully shutting down the transfer and disabling the interrupts. Signed-off-by: NSimon Lindgren <simon@aqwary.com> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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由 Chen-Yu Tsai 提交于
The "clock-frequency" DT property is listed as optional, However, the current code stores the return value of of_property_read_u32 in the return code of mv64xxx_of_config, but then forgets to clear it after setting the default value of "clock-frequency". It is then passed out to the main probe function, resulting in a probe failure when "clock-frequency" is missing. This patch checks and then throws away the return value of of_property_read_u32, instead of storing it and having to clear it afterwards. This issue was discovered after the property was removed from all sunxi DTs. Fixes: 4c730a06 ("i2c: mv64xxx: Set bus frequency to 100kHz if clock-frequency is not provided") Signed-off-by: NChen-Yu Tsai <wens@csie.org> Cc: stable@vger.kernel.org Acked-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Sergei Shtylyov 提交于
Sometimes the MNR and MST interrupts happen simultaneously (stop automatically follows NACK, according to the manuals) and in such case the ID_NACK flag isn't set since the MST interrupt handling precedes MNR and all interrupts are cleared and disabled then, so that MNR interrupt is never noticed -- this causes NACK'ed transfers to be falsely reported as successful. Exchanging MNR and MST handlers fixes this issue, however the MNR bit somehow gets set again even after being explicitly cleared, so I decided to completely suppress handling of all disabled interrupts (which is a good thing anyway)... Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: stable@vger.kernel.org Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 19 8月, 2014 1 次提交
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由 Alan Cox 提交于
The SMBus host controller is the same as used in Baytrail so add the new PCI ID to the driver's list of supported IDs. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 09 8月, 2014 2 次提交
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由 Julia Lawall 提交于
Of_node_put supports NULL as its argument, so the initial test is not necessary. Suggested by Uwe Kleine-König. The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; @@ -if (e) of_node_put(e); // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 addy ke 提交于
If slave holds scl, I2C_IPD[7] will be set 1 by controller for debugging. Driver must ignore it. [ 5.752391] rk3x-i2c ff160000.i2c: unexpected irq in WRITE: 0x80 [ 5.939027] rk3x-i2c ff160000.i2c: timeout, ipd: 0x80, state: 4 Signed-off-by: NAddy Ke <addy.ke@rock-chips.com> Reviewed-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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- 07 8月, 2014 2 次提交
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由 Xiubo Li 提交于
Fixes the following by using %pR: drivers/i2c/busses/i2c-imx.c: In function i2c_imx_probe() drivers/i2c/busses/i2c-imx.c:689:2: warning: format 0x%x expects argument of type unsigned int, but argument 4 has type resource_size_t [-Wformat=] dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n", ^ ... Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Pramod Gurav 提交于
This fixes a error handling scenario where clocks were not being disabled when QUP_OUTPUT_BLOCK_SIZE returns a size greater than the size of blk_sizes array. So this patch adds a statement to jump to the fail lable to release the clocks. Signed-off-by: NPramod Gurav <pramod.gurav@smartplayin.com> Acked-by: NIvan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 05 8月, 2014 1 次提交
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由 Sachin Kamat 提交于
All Exynos5 platforms have HSI2C controllers and are needed by various IPs connected to the boards based on these SoCs. Thus select this by default for Exynos5 platforms. Signed-off-by: NSachin Kamat <sachin.kamat@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 02 8月, 2014 4 次提交
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由 Alan Cox 提交于
This may appear as PCI or ACPI depending upon the firmware so we have to list both. All share the same ACPI identifier but not the same PCI identifier. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Jean Delvare 提交于
Commit a0682a31 ("i2c: gpio: Use devm_gpio_request()") left unused code behind, clean it up. Fixes: a0682a31 ("i2c: gpio: Use devm_gpio_request()") Signed-off-by: NJean Delvare <jdelvare@suse.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Maxime COQUELIN 提交于
The i2c timing values specified in the driver are the minimun values defined in the I2C specifications. The I2C specification does not specify any default or maximum values. Some I2C devices are out of spec, such as the HDMI link of the Toshiba 19AV600 TV, and might not work properly with minimum values. This patch adds a 10% margin on all the timings in both Normal and Fast modes. Trial and error method have been used to find the minimum margin necessary to have the out-of-spec device working, and a security margin has been added. Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
dma_{un}map_* uses 'enum dma_data_direction' not 'enum dma_transfer_direction'. Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Cc: stable@kernel.org
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