A record of NXP LPC32xx SoC support is lost between LMxx hwmon drivers
and lockdep, rename and move it to a place where all other ARM
SoC and machines settle.

Note, NXP LPC32xx maintenance is actually about SoC series itself, SoC
peripherals and a number of machines powered by LPC32xx SoC, so while
we are here correct the title name to emphasize that the maintenance
concerns SoC support in general.
Signed-off-by: NVladimir Zapolskiy <vz@mleia.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Merge tag 'omap-for-v4.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Merge "SoC related changes for omaps for v4.7 merge window" from Tony Lindgren:

- Remove now unnecessary multi vs single SoC compile time optimizations
  as we are now using multiarch

- Configure dra7 powerdomains

- Clarify why omap-wakeupgen does not need to handle FROZEN transitions

- Add dra7 module configuration for MaASP, PWMSS and timer 12

- Add RTC module configuration unlock and lock functions

- Fix hwmod idle state sanity check sequence

* tag 'omap-for-v4.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: wakeupgen: Add comment for unhandled FROZEN transitions
  ARM: OMAP: DRA7: powerdomain data: Remove wrong OSWR capability
  ARM: OMAP: DRA7: powerdomain data: Fix "ON" state for memories
  ARM: OMAP: DRA7: powerdomain data: Erratum i892 workaround: Disable core INA
  ARM: OMAP2+: remove redundant multiplatform checks
  ARM: OMAP2+: hwmod: fix _idle() hwmod state sanity check sequence
  ARM: DRA7: hwmod: Add data for GPTimer 12
  ARM: AMx3xx: RTC: Add lock and unlock functions
  ARM: DRA7: RTC: Add lock and unlock functions
  ARM: OMAP2+: hwmod: RTC: Add lock and unlock functions
  ARM: OMAP2+: DRA7: Add hwmod entries for PWMSS
  ARM: DRA7: hwmod: Add data for McASP1/2/4/5/6/7/8
  ARM: DRA7: clockdomain: Implement timer workaround for errata i874
  ARM: OMAP2+: hwmod: Fix updating of sysconfig register

Merge "ARM: Add OXNAS Platform Support" from Neil Armstrong

This is for the ARM926 based ox810 chip used in some older
NAS appliances. There is another related ox820 chip based on
ARM11 that might get added here later.

* tag 'ox810se-arm-v4.6-rc3' of https://github.com/superna9999/linux:
  MAINTAINERS: add maintainer entry for ARM/OXNAS platform
  ARM: Add new mach-oxnas
  irqchip: versatile-fpga: add new compatible for OX810SE SoC

This patch update ARM Versatile Express entry to cover bits needed for
Cortex-M Prototyping System (MPS2 platform). So patches for the latter
are collected by existing Vexpress and Juno maintainers (Liviu, Sudeep,
Lorenzo) and find their way upstream via Vexpess and/or Juno trees.
Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>

The Cortex-M Prototyping System (or V2M-MPS2) is designed for
prototyping and evaluation Cortex-M family of processors including the
latest Cortex-M7

It comes with a range of useful peripherals including 8MB single cycle
SRAM, 16MB PSRAM, Ethernet, QSVGA touch screen panel, 4bit RGB VGA
connector, Audio, SPI and GPIO.
Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>

Add a maintainer entry for ARM/OXNAS platform and add myself as a maintainer.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Add mach-oxnas directory containing Kconfig.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Under the OX810SE, this exact same interface is used as "Reference Peripheral
Specification" Interrupt Controller, so add a new compatible string in order
to support the Oxford Semiconductor OX810SE SoC interrupt controller.
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Put nodes after of_address_to_resource() in case the nodes might be
released while parsing in them.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Merge tag 'renesas-soc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Merge "Renesas ARM Based SoC Updates for v4.7" from Simon Horman:

Drop support for Cortex A8 in timer code

* tag 'renesas-soc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: timer: Drop support for Cortex A8
  ARM: shmobile: timer: Fix preset_lpj leading to too short delays
  Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
  ARM: dts: r8a7791: Don't disable referenced optional clocks

Merge tag 'davinci-for-v4.7/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

Merge "DaVinci SoC updates for v4.7" from Sekhar Nori:

These are preparatory patches to support a USB PHY driver for USB on DA850
SoC. This should eventually lead to USB working again on this device.

* tag 'davinci-for-v4.7/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: clk: add set_parent callback for mux clocks
  ARM: davinci: da8xx: move usb code to new file
  ARM: davinci: use IRQCHIP_DECLARE for cp_intc
  ARM: davinci: remove unused DA8XX_NUM_UARTS
  ARM: davinci: simplify call to of populate
  ARM: DaVinci USB: removed deprecated properties from MUSB config

Merge tag 'for-v4.7/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.7/soc

ARM: OMAP2+: first set of hwmod changes for v4.7

For the DRA7xx platform, add IP block data for the McASP, PWMSS,
and GPTimer12 IP blocks.  Add lock and unlock functions for the
RTC IP blocks on the DRA7xx, AM33xx, and AM43xx devices.  And add
a fix for the hwmod core for device driver unbind operations for
IP blocks with hardreset lines.

Basic build, boot, and PM test results are available here:

http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.7/20160410132119/

Note that the testbed here does not have the DRA7xx board included yet.

Commit edf41009 ("ARM: shmobile: sh7372 dtsi: Remove Legacy
file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU
core (sh7372 aka SH-Mobile AP4), hence drop support for it in the
loops-per-jiffy preset code.

As "div" is always 1 for supported contemporary ARM processors, we can
simplify the code:
  - Absorb shmobile_setup_delay_hz(), which was always called with
    mult = div = 1,
  - Return earlier if the Cortex A7/A15 arch timer exists and support is
    enabled.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

On all shmobile ARM SoCs, loop-based delays may complete early, which
can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the
minimum required time.

This is caused by calculating preset_lpj based on incorrect assumptions
about the number of clock cycles per loop:
  - All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per
    CPU clock cycle,
  - As of commit 11d4bb1b ("ARM: 7907/1: lib: delay-loop: Add
    align directive to fix BogoMIPS calculation"), Cortex A8 runs
    __loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles.

On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as
delays use the ARM arch timer if available. R-Car Gen2 doesn't work if
the arch timer is disabled. However, APE6 can be used without the arch
timer.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This reverts commit 19417bd9 ("ARM: dts: porter: Enable SCIF_CLK
frequency and pins") as according to
http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf
the external oscillator for SCIF_CLK is not mounted on the porter boards.
Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

clk_get on a disabled clock node will return EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their clocks property.

Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them to prevent this.
Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Introduce a set_parent callback that will be used for mux clocks, such as
the USB PHY muxes and the async3 clock domain mux.
Signed-off-by: NDavid Lechner <david@lechnology.com>
[nsekhar@ti.com: checkpatch fixes]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

We will be adding more da8xx-specific code for phy and clocks, so it will
be better to have this in a separate file. This way we don't have a bunch
of #ifdefs for all of the da8xx stuff.

While at it, fix some checkpatch warnings coming from existing code.
Signed-off-by: NDavid Lechner <david@lechnology.com>
[nsekhar@ti.com: typo and checkpatch fixes]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Remove boilerplate code by using IRQCHIP_DECLARE macro.
Signed-off-by: NDavid Lechner <david@lechnology.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

DA8X_NUM_UARTS not used in the code anywhere and should be determined
by DT anyway.
Signed-off-by: NDavid Lechner <david@lechnology.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Take advantage of of_platoform_default_populate convience function.
Signed-off-by: NDavid Lechner <david@lechnology.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The following properties of the musb_hdrc_config structure
are deprecated and no longer required/used by the MUSB driver:

.dyn_fifo
.soft_con
.dma
.dma_channels
.eps_bits
Signed-off-by: NPetr Kulhavy <petr@barix.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Merge tag 'sti-soc-for-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/soc

Highlights:
-----------
 - Add CPUFreq and RProc drivers to STI maintainers file list
 - Improve STi's menuconfig help entry

* tag 'sti-soc-for-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
  ARM: STi: Update platform level menuconfig 'help'
  MAINTAINERS: Add ST's Remote Processor Driver to ARM/STI ARCHITECTURE
  MAINTAINERS: Add ST's CPUFreq driver to the STI file list
Signed-off-by: NOlof Johansson <olof@lixom.net>

FROZEN hotplug notifiers are not handled and do not have to be. Insert
a comment to remember that the lack of the FROZEN transitions is no
accident.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: linux-omap@vger.kernel.org
Signed-off-by: NAnna-Maria Gleixner <anna-maria@linutronix.de>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Open Switch Retention(OSWR) is a retention state which is unsupported
in DRA7 SoC. This state is achieved when power state is set to
retention and logic power state is set to OFF.

Even though DRA7 architecture is a OMAP derivative, none of the
powerdomains are actually implemented to achieve OSWR in the SoC.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

When the power domain is in "ON" state, the memories should be always
in "ON", even though the hardware register allows other states to be
written, wrong states may confuse certain hardware blocks.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Erratum i892 as will be documented in the upcoming G or later revision
of DRA7xx/ AM57xx errata documentation (SPRZ398F) states that L3 clock
needs to be kept active all the time to ensure that asymmetric aging
degradation is minimal and within the design allowed margin.

By allowing core domain to transition to INA and allowing L3 clock to be
turned off for extended periods of time, there is a risk of functional
issues and device failure as a result.

Ref: http://www.ti.com/lit/er/sprz429h/sprz429h.pdfSigned-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The directory arch/arm/mach-omap2 is only selected for compilation if
CONFIG_ARCH_OMAP2PLUS is selected. CONFIG_ARCH_OMAP2PLUS itself is a
silent option and all machines selecting this option are multiplatform
devices. As a consequence checks for CONFIG_ARCH_MULTIPLATFORM as well
as CONFIG_ARCH_OMAP2PLUS within that directory are superfluous and can
be removed.
Signed-off-by: NJonas Rabenstein <jonas.rabenstein@studium.uni-erlangen.de>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Merge tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc

First SoC batch for 4.7:
- chipid registers reading for SoC detection

* tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
  ARM: at91/soc: reference the whole sama5d2 family
  ARM: at91: use chipid device for soc detection
Signed-off-by: NOlof Johansson <olof@lixom.net>

Pull ARM fixes from Russell King:
 "A couple of small fixes, and wiring up the new syscalls which appeared
  during the merge window"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8550/1: protect idiv patching against undefined gcc behavior
  ARM: wire up preadv2 and pwritev2 syscalls
  ARM: SMP enable of cache maintanence broadcast

Pull MMC fixes from Ulf Hansson:
 "Here are a couple of mmc fixes intended for v4.6 rc3:

  MMC host:
   - sdhci: Fix regression setting power on Trats2 board
   - sdhci-pci: Add support and PCI IDs for more Broxton host controllers"

* tag 'mmc-v4.6-rc1' of git://git.linaro.org/people/ulf.hansson/mmc:
  mmc: sdhci-pci: Add support and PCI IDs for more Broxton host controllers
  mmc: sdhci: Fix regression setting power on Trats2 board

Pull i2c fixes from Wolfram Sang:
 "Some bugfixes from I2C:

   - fix a uevent triggered boot problem by removing a useless debug
     print

   - fix sysfs-attributes of the new i2c-demux-pinctrl driver to follow
     standard kernel behaviour

   - fix a potential division-by-zero error (needed two takes)"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: jz4780: really prevent potential division by zero
  Revert "i2c: jz4780: prevent potential division by zero"
  i2c: jz4780: prevent potential division by zero
  i2c: mux: demux-pinctrl: Update docs to new sysfs-attributes
  i2c: mux: demux-pinctrl: Clean up sysfs attributes
  i2c: prevent endless uevent loop with CONFIG_I2C_DEBUG_CORE

This reverts commit 1028b55b.

It's broken: it makes ext4 return an error at an invalid point, causing
the readdir wrappers to write the the position of the last successful
directory entry into the position field, which means that the next
readdir will now return that last successful entry _again_.

You can only return fatal errors (that terminate the readdir directory
walk) from within the filesystem readdir functions, the "normal" errors
(that happen when the readdir buffer fills up, for example) happen in
the iterorator where we know the position of the actual failing entry.

I do have a very different patch that does the "signal_pending()"
handling inside the iterator function where it is allowable, but while
that one passes all the sanity checks, I screwed up something like four
times while emailing it out, so I'm not going to commit it today.

So my track record is not good enough, and the stars will have to align
better before that one gets committed.  And it would be good to get some
review too, of course, since celestial alignments are always an iffy
debugging model.

IOW, let's just revert the commit that caused the problem for now.
Reported-by: NGreg Thelen <gthelen@google.com>
Cc: Theodore Ts'o <tytso@mit.edu>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The omap_hwmod _enable() function can return success without setting
the hwmod state to _HWMOD_STATE_ENABLED for IPs with reset lines when
all of the reset lines are asserted. The omap_hwmod _idle() function
also performs a similar check, but after checking for the hwmod state
first. This triggers the WARN when pm_runtime_get and pm_runtime_put
are invoked on IPs with all reset lines asserted. Reverse the checks
for hwmod state and reset lines status to fix this.

Issue found during a unbind operation on a device with reset lines
still asserted, example backtrace below

 ------------[ cut here ]------------
 WARNING: CPU: 1 PID: 879 at arch/arm/mach-omap2/omap_hwmod.c:2207 _idle+0x1e4/0x240()
 omap_hwmod: mmu_dsp: idle state can only be entered from enabled state
 Modules linked in:
 CPU: 1 PID: 879 Comm: sh Not tainted 4.4.0-00008-ga989d951331a #3
 Hardware name: Generic OMAP5 (Flattened Device Tree)
 [<c0018e60>] (unwind_backtrace) from [<c0014dc4>] (show_stack+0x10/0x14)
 [<c0014dc4>] (show_stack) from [<c037ac28>] (dump_stack+0x90/0xc0)
 [<c037ac28>] (dump_stack) from [<c003f420>] (warn_slowpath_common+0x78/0xb4)
 [<c003f420>] (warn_slowpath_common) from [<c003f48c>] (warn_slowpath_fmt+0x30/0x40)
 [<c003f48c>] (warn_slowpath_fmt) from [<c0028c20>] (_idle+0x1e4/0x240)
 [<c0028c20>] (_idle) from [<c0029080>] (omap_hwmod_idle+0x28/0x48)
 [<c0029080>] (omap_hwmod_idle) from [<c002a5a4>] (omap_device_idle+0x3c/0x90)
 [<c002a5a4>] (omap_device_idle) from [<c0427a90>] (__rpm_callback+0x2c/0x60)
 [<c0427a90>] (__rpm_callback) from [<c0427ae4>] (rpm_callback+0x20/0x80)
 [<c0427ae4>] (rpm_callback) from [<c0427f84>] (rpm_suspend+0x138/0x74c)
 [<c0427f84>] (rpm_suspend) from [<c0428b78>] (__pm_runtime_idle+0x78/0xa8)
 [<c0428b78>] (__pm_runtime_idle) from [<c041f514>] (__device_release_driver+0x64/0x100)
 [<c041f514>] (__device_release_driver) from [<c041f5d0>] (device_release_driver+0x20/0x2c)
 [<c041f5d0>] (device_release_driver) from [<c041d85c>] (unbind_store+0x78/0xf8)
 [<c041d85c>] (unbind_store) from [<c0206df8>] (kernfs_fop_write+0xc0/0x1c4)
 [<c0206df8>] (kernfs_fop_write) from [<c018a120>] (__vfs_write+0x20/0xdc)
 [<c018a120>] (__vfs_write) from [<c018a9cc>] (vfs_write+0x90/0x164)
 [<c018a9cc>] (vfs_write) from [<c018b1f0>] (SyS_write+0x44/0x9c)
 [<c018b1f0>] (SyS_write) from [<c0010420>] (ret_fast_syscall+0x0/0x1c)
 ---[ end trace a4182013c75a9f50 ]---

While at this, fix the sequence in _shutdown() as well, though there
is no easy reproducible scenario.

Fixes: 747834ab ("ARM: OMAP2+: hwmod: revise hardreset behavior")
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add the hwmod data for GPTimer 12. GPTimer 12 is present in
WKUPAON power domain and is clocked from a secure 32K clock.
GPTimer 12 serves as a secure timer on HS devices, but is
available for kernel on regular GP devices.

The hwmod link is registered only on GP devices. The hwmod data
also reused the existing timer class instead of reintroducing
the identical dra7xx_timer_secure_sysc class which was dropped
in commit edec1786 ("ARM: DRA7: hwmod: Fix the hwmod class
for GPTimer4").

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Hook omap_hwmod_rtc_unlock/lock functions into RTC hwmod,
so that SYSCONFIG register is updated properly.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Hook omap_hwmod_rtc_unlock/lock functions into RTC hwmod,
so that SYSCONFIG register is updated properly
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

RTC IP have kicker feature which prevents spurious writes to its registers.
In order to write into any of the RTC registers, KICK values has to be
written to KICK registers. Also, RTC busy flag needs to be polled for
non-TC registers as well, without which update is not proper and confirmed
it by testing on DRA7-evm.
Introduce omap_hwmod_rtc_unlock/lock functions, which  writes into these
KICK registers inorder to lock and unlock RTC registers.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
[paul@pwsan.com: fixed subject line]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add hwmod entries for the PWMSS on DRA7.

Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
equal to L4PER2_L3_GICLK/2(l3_iclk_div/2).
Signed-off-by: NVignesh R <vigneshr@ti.com>
[fcooper@ti.com: Do not add eQEP, ePWM and eCAP hwmod entries]
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
[paul@pwsan.com: fixed sparse warnings; added missing comments]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>