The location at which the boot address is specified for secondary
CPUs of EXYNOS5420 is SYSRAM base + 4. Update the cpu_boot_reg
function accordingly.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace the (setup/remove)_irq calls for local timer registration with
(request/free)_irq calls. This generalizes the local timer registration API.
Suggested by Mark Rutland.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add initial device tree nodes for EXYNOS5420 SoC and SMDK5420 board.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The EXYNOS5420 clocks are statically listed and registered using
the Samsung specific common clock helper functions.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Use chipid[27:20] bits to identify the EXYNOS family while setting
up the serial port during the uncompression setup. This uses four
additional bits of chipid to identify the EXYNOS family since this
is required for identifying EXYNOS5420 SoC.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

All EXYNOS4/5 SoCs share a common driver data in the samsung serial
driver. Hence, let the driver data inclusion be based on ARCH_EXYNOS
instead of SOC specific definition.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Reviewed by: Girish K S <ks.giri@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

EXYNOS5420 is new SoC in Samsung's Exynos5 SoC series. Add
initial support for this new SoC.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Instead of having to specify the number for CPUs in EXYNOS5250 in
platsmp.c file, let the number of CPUs be determined by having this
information listed in EXYNOS5250 device tree file.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In preparation of adding support for EXYNOS5420, which has many
peripherals similar to EXYNOS5250, a new common EXYNOS5 device tree
source file is created out of the exising EXYNOS5250 device tree
source file. Only the common nodes required for basic boot up on
EXYNOS5420 based boards are moved into this new file and the rest
of the common nodes would be moved subsequently.

EXYNOS5440 SoC is quite different from EXYNOS5250 and EXYNOS5420.
Hence it is not possible to reuse "exynos5.dtsi" for EXYNOS5440.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds enum entries for div_i2s1 and div_i2s2 which are
required for i2s1 and i2s2 controllers.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch updates the samsung i2s documentation for pinmux and
clock entries.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add clock lookup information for i2s controllers on exynos5250 SoC.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Audio subsystem introduced in s5pv210 and exynos platforms
which has a internal clock controller. This patch adds a node
for the same on exynos5250.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace /include/ (dtc) with #include (C pre-processor) for all
Samsung DT files
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit 9ee51f01 (tty: serial/samsung: make register definitions
global) removed the S3C2410_PA_UARTX defines that the newly merged
s3c2416 dt support still expected.

So update mach-s3c2416-dt.c to use the S3C24XX_PA_UART constant until
we have support for the common clock framework the the s3c2416-dt.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The LDO for LCD driver is currently not handled by any of the drivers.
This disables the LDO during booting time. To fix this, the LDO
is forced to enabled always.
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added FIMD and display timing node to Origen4210 board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adds pinctrl entries required by FIMD.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

PWM nodes are added to EXYNOS4210 pinctrl DT file.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds examples to samsung-pinctrl.txt documentaion file
on how to make gpio binding and gpio request
Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

By default the exynos RTC is disabled.  Enable it for snow.  There's
also an external RTC on the max77686 PMIC but we haven't yet enabled
that.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The issues reported in commit 522ccdb6 ("ARM: dts: Disable the RTC
by default on exynos5") are no longer reproduced on EXYNOS5250 based
Arndale board. Hence re-enabling RTC support for Arndale board.

This is helpful for testing S2R on Arndale board.
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since the pdma works only in secure mode, accessing the same
in hypervisor mode gives an abort. As we are not using pdma
anywhere, removing the same.
Signed-off-by: NGiridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since ssdk5440 and sd5v1 have 8GiB memory, this patch
updates bootargs for them.
Signed-off-by: NSubash Patel <subash.rp@samsung.com>
Signed-off-by: NJungseok Lee <jays.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch updates cpu frequency level from 1500 to 800MHZ in steps
of 100MHZ. The corresponding voltage(in uV) is also added.
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds the required regulator supplies and properties
for wm8994 codec on smdk5250 board.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch enables the SPI in EXYNOS5440 SoC. The NOR
Flash can be accessed by enabling the spi interface
Signed-off-by: NGirish K S <ks.giri@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

EXYNOS5440 includes both OHCI and EHCI usb host controllers.
This patch adds device tree nodes for both of them. And the
EHCI and OHCI controllers on exynos5440 do not need any
explicit phy configuration. So need to assign a different
compatible value for these controllers.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added clock entry definitions to G2D bindings document.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added clock entries to G2D node for exynos4x12 DT file.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added clock entries to G2D node.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

G2D node got added twice in exynos4412-smdk4412.dts instead of
getting added to exynos4412-origen.dts. Remove the duplicate entry
and add it to exynos4412-origen.dts.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add G2D clocks for Exynos4x12 SoC and sclk_fimg2d required by G2D
IP.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The exynos5-dp node needs a clock specified using the common clock
framework.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add pin state information for DP HPD support that requires
pin configuration support using pinctrl interface.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds dts support for the sata controller
Signed-off-by: NGirish K S <ks.giri@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch is to add vmmc regulator node at MSHC and SDHCI for ODROID-X
board file.
Signed-off-by: NDongjin Kim <tobetter@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

ODROID-X board have a max77686 PMIC on i2c channel 0. The properties of used
LDO and BUCK are defined according the schematic.
Signed-off-by: NDongjin Kim <tobetter@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>