1. 25 4月, 2019 1 次提交
    • L
      RDMA/hns: Bugfix for mapping user db · 2557fabd
      Lijun Ou 提交于
      When the maximum send wr delivered by the user is zero, the qp does not
      have a sq.
      
      When allocating the sq db buffer to store the user sq pi pointer and map
      it to the kernel mode, max_send_wr is used as the trigger condition, while
      the kernel does not consider the max_send_wr trigger condition when
      mapmping db. It will cause sq record doorbell map fail and create qp fail.
      
      The failed print information as follows:
      
       hns3 0000:7d:00.1: Send cmd: tail - 418, opcode - 0x8504, flag - 0x0011, retval - 0x0000
       hns3 0000:7d:00.1: Send cmd: 0xe59dc000 0x00000000 0x00000000 0x00000000 0x00000116 0x0000ffff
       hns3 0000:7d:00.1: sq record doorbell map failed!
       hns3 0000:7d:00.1: Create RC QP failed
      
      Fixes: 0425e3e6 ("RDMA/hns: Support flush cqe for hip08 in kernel space")
      Signed-off-by: NLijun Ou <oulijun@huawei.com>
      Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>
      2557fabd
  2. 09 4月, 2019 1 次提交
    • Y
      RDMA/hns: Bugfix for SCC hem free · 00fb67ec
      Yangyang Li 提交于
      The method of hem free for SCC context is different from qp context.
      
      In the current version, if free SCC hem during the execution of qp free,
      there may be smmu error as below:
      
       arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
       arm-smmu-v3 arm-smmu-v3.1.auto:  0x00007d0000000010
       arm-smmu-v3 arm-smmu-v3.1.auto:  0x000012000000017c
       arm-smmu-v3 arm-smmu-v3.1.auto:  0x00000000000009e0
       arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000000
      
      As SCC context is still used by hardware after qp free, we can solve this
      problem by removing SCC hem free from hns_roce_qp_free.
      
      Fixes: 6a157f7d ("RDMA/hns: Add SCC context allocation support for hip08")
      Signed-off-by: NYangyang Li <liyangyang20@huawei.com>
      Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>
      00fb67ec
  3. 16 2月, 2019 1 次提交
  4. 15 2月, 2019 1 次提交
  5. 12 2月, 2019 1 次提交
  6. 25 1月, 2019 2 次提交
  7. 19 1月, 2019 1 次提交
  8. 11 1月, 2019 1 次提交
  9. 08 1月, 2019 1 次提交
  10. 19 12月, 2018 1 次提交
  11. 05 12月, 2018 1 次提交
  12. 04 10月, 2018 4 次提交
  13. 16 8月, 2018 1 次提交
  14. 03 8月, 2018 1 次提交
    • Y
      RDMA/hns: Support flush cqe for hip08 in kernel space · 0425e3e6
      Yixian Liu 提交于
      According to IB protocol, there are some cases that work requests must
      return the flush error completion status through the completion queue. Due
      to hardware limitation, the driver needs to assist the flush process.
      
      This patch adds the support of flush cqe for hip08 in the cases that
      needed, such as poll cqe, post send, post recv and aeqe handle.
      
      The patch also considered the compatibility between kernel and user space.
      Signed-off-by: NYixian Liu <liuyixian@huawei.com>
      Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>
      0425e3e6
  15. 09 5月, 2018 2 次提交
  16. 28 4月, 2018 1 次提交
  17. 16 3月, 2018 1 次提交
  18. 14 3月, 2018 2 次提交
  19. 05 2月, 2018 1 次提交
    • O
      RDMA/hns: Fix the endian problem for hns · 8b9b8d14
      oulijun 提交于
      The hip06 and hip08 run on a little endian ARM, it needs to
      revise the annotations to indicate that the HW uses little
      endian data in the various DMA buffers, and flow the necessary
      swaps throughout.
      
      The imm_data use big endian mode. The cpu_to_le32/le32_to_cpu
      swaps are no-op for this, which makes the only substantive
      change the handling of imm_data which is now mandatory swapped.
      
      This also keep match with the userspace hns driver and resolve
      the warning by sparse.
      Signed-off-by: NLijun Ou <oulijun@huawei.com>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      8b9b8d14
  20. 17 1月, 2018 1 次提交
  21. 04 1月, 2018 1 次提交
  22. 23 12月, 2017 1 次提交
  23. 11 11月, 2017 1 次提交
  24. 26 10月, 2017 1 次提交
  25. 27 9月, 2017 5 次提交
  26. 29 7月, 2017 1 次提交
  27. 26 4月, 2017 1 次提交
  28. 25 1月, 2017 1 次提交
  29. 04 12月, 2016 2 次提交