1. 08 10月, 2016 4 次提交
  2. 06 10月, 2016 6 次提交
    • B
      xen/x86: Update topology map for PV VCPUs · a6a198bc
      Boris Ostrovsky 提交于
      Early during boot topology_update_package_map() computes
      logical_pkg_ids for all present processors.
      
      Later, when processors are brought up, identify_cpu() updates
      these values based on phys_pkg_id which is a function of
      initial_apicid. On PV guests the latter may point to a
      non-existing node, causing logical_pkg_ids to be set to -1.
      
      Intel's RAPL uses logical_pkg_id (as topology_logical_package_id())
      to index its arrays and therefore in this case will point to index
      65535 (since logical_pkg_id is a u16). This could lead to either a
      crash or may actually access random memory location.
      
      As a workaround, we recompute topology during CPU bringup to reset
      logical_pkg_id to a valid value.
      
      (The reason for initial_apicid being bogus is because it is
      initial_apicid of the processor from which the guest is launched.
      This value is CPUID(1).EBX[31:24])
      Signed-off-by: NBoris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com>
      a6a198bc
    • R
      ARM: fix delays · fb833b1f
      Russell King 提交于
      Commit 215e362d ("ARM: 8306/1: loop_udelay: remove bogomips value
      limitation") tried to increase the bogomips limitation, but in doing
      so messed up udelay such that it always gives about a 5% error in the
      delay, even if we use a timer.
      
      The calculation is:
      
      	loops = UDELAY_MULT * us_delay * ticks_per_jiffy >> UDELAY_SHIFT
      
      Originally, UDELAY_MULT was ((UL(2199023) * HZ) >> 11) and UDELAY_SHIFT
      30.  Assuming HZ=100, us_delay of 1000 and ticks_per_jiffy of 1660000
      (eg, 166MHz timer, 1ms delay) this would calculate:
      
      	((UL(2199023) * HZ) >> 11) * 1000 * 1660000 >> 30
      		=> 165999
      
      With the new values of 2047 * HZ + 483648 * HZ / 1000000 and 31, we get:
      
      	(2047 * HZ + 483648 * HZ / 1000000) * 1000 * 1660000 >> 31
      		=> 158269
      
      which is incorrect.  This is due to a typo - correcting it gives:
      
      	(2147 * HZ + 483648 * HZ / 1000000) * 1000 * 1660000 >> 31
      		=> 165999
      
      i.o.w, the original value.
      
      Fixes: 215e362d ("ARM: 8306/1: loop_udelay: remove bogomips value limitation")
      Cc: <stable@vger.kernel.org>
      Reviewed-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      fb833b1f
    • N
      sparc: fixing ident and beautifying code · 98e98eb6
      netmonk@netmonk.org 提交于
      Good evening,
      
      Following LinuxCodingStyle documentation and with the help of Sam, fixed
      severals identation issues in the code, and few others cosmetic changes
      
      And last and i hope least fixing my name :)
      
      Signed-off-by : Dominique Carrel <netmonk@netmonk.org>
      Acked-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      98e98eb6
    • C
      sparc64: Enable setting "relaxed ordering" in IOMMU mappings · aa7bde1a
      chris hyser 提交于
      Enable relaxed ordering for memory writes in IOMMU TSB entry from
      dma_4v_alloc_coherent(), dma_4v_map_page() and dma_4v_map_sg() when
      dma_attrs DMA_ATTR_WEAK_ORDERING is set. This requires PCI IOMMU I/O
      Translation Services version 2.0 API.
      
      Many PCIe devices allow enabling relaxed-ordering (memory writes bypassing
      other memory writes) for various DMA buffers. A notable exception is the
      Mellanox mlx4 IB adapter. Due to the nature of x86 HW this appears to have
      little performance impact there. On SPARC HW however, this results in major
      performance degradation getting only about 3Gbps. Enabling RO in the IOMMU
      entries corresponding to mlx4 data buffers increases the throughput to
      about 13 Gbps.
      
      Orabug: 19245907
      Signed-off-by: NChris Hyser <chris.hyser@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      aa7bde1a
    • C
      sparc64: Enable PCI IOMMU version 2 API · 8914391b
      chris hyser 提交于
      Enable Version 2 of the PCI IOMMU API needed for advanced features
      such as PCI Relaxed Ordering and greater than 2 GB DMA address
      space per root complex.
      Signed-off-by: NChris Hyser <chris.hyser@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8914391b
    • P
      sparc: migrate exception table users off module.h and onto extable.h · cdd4f4c7
      Paul Gortmaker 提交于
      These files were only including module.h for exception table
      related functions.  We've now separated that content out into its
      own file "extable.h" so now move over to that and avoid all the
      extra header content in module.h that we don't really need to compile
      these files.
      
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: sparclinux@vger.kernel.org
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cdd4f4c7
  3. 05 10月, 2016 2 次提交
  4. 03 10月, 2016 1 次提交
  5. 02 10月, 2016 1 次提交
    • P
      MIPS: CM: Fix mips_cm_max_vp_width for non-MT kernels on MT systems · 6605d156
      Paul Burton 提交于
      When discovering the number of VPEs per core, smp_num_siblings will be
      incorrect for kernels built without support for the MIPS MultiThreading
      (MT) ASE running on systems which implement said ASE. This leads to
      accesses to VPEs in secondary cores being performed incorrectly since
      mips_cm_vp_id calculates the wrong ID to write to the local "other"
      registers. Fix this by examining the number of VPEs in the core as
      reported by the CM.
      
      This patch presumes that the number of VPEs will be the same in each
      core of the system. As this path only applies to systems with CM version
      2.5 or lower, and this property is true of all such known systems, this
      is likely to be fine but is described in a comment for good measure.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14338/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      6605d156
  6. 01 10月, 2016 19 次提交
    • V
      ARC: [plat*] enables MODULE* · ef25bacb
      Vineet Gupta 提交于
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      ef25bacb
    • V
      ARCv2: fix local_save_flags · cd5d38b0
      Vineet Gupta 提交于
      Commit d9676fa1 ("ARCv2: Enable LOCKDEP"), changed
      local_save_flags() to not return raw STATUS32 but encoded in the form
      such that it could be fed directly to CLRI/SETI instructions.
      However the STATUS32.E[] was not captured correctly as it corresponds to
      bits [4:1] in the register and not [3:0]
      
      Fixes: d9676fa1 ("ARCv2: Enable LOCKDEP")
      Cc: Evgeny Voevodin <evgeny.voevodin@intel.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      cd5d38b0
    • N
      ARC: CONFIG_NODES_SHIFT fix default values · 3528f84f
      Noam Camus 提交于
      Seem like values assigned as absolute number and not and
      shift value, i.e. should be 0 for one node (2^0) and 1 for
      couple of nodes (2^1)
      Signed-off-by: NNoam Camus <noamca@mellanox.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      3528f84f
    • Y
      ARCv2: intc: Use kflag if STATUS32.IE must be reset · bc0c7ece
      Yuriy Kolerov 提交于
      In the end of "arc_init_IRQ" STATUS32.IE flag is going to be affected by
      "flag" instruction but "flag" never touches IE flag on ARCv2. So "kflag"
      instruction must be used instead of "flag".
      Signed-off-by: NYuriy Kolerov <yuriy.kolerov@synopsys.com>
      Cc: stable@vger.kernel.org #4.2+
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      bc0c7ece
    • V
      ARC: .exit.* sections can be discarded in .eh_frame regime · 99a2ca65
      Vineet Gupta 提交于
      We used to keep the .exit.* sections as linker would fail in final link
      due to references from .debug_frame which itself could not be discardrd
      due to the forced "write,alloc" attributes for it.
      
      |   LD      init/built-in.o
      | `.exit.text' referenced in section `.debug_frame' of arch/arc/built-in.o: defined in discarded section `.exit.text' of arch/arc/built-in.o
      | Makefile:949: recipe for target 'vmlinux' failed
      
      With .debug_frame now retired, this hack is no longer needed.
      kernel binary is now a little bit smaller as well.
      
      closes STAR 9000549913
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      99a2ca65
    • V
      ARC: dw2 unwind: enable cfi pseudo ops in string lib · 86effd0d
      Vineet Gupta 提交于
      This uses a new set of annoations viz. ENTRY_CFI/END_CFI to enabel cfi
      ops generation.
      
      Note that we didn't change the normal ENTRY/EXIT as we don't actually
      want unwind info in the trap/exception/interrutp handlers which use
      these, as unwinder then gets confused (it keeps recursing vs. stopping).
      Semantically these are leaf routines and unwinding should stop when it
      hits those routines.
      
      Before
      ------
      
          28.52%     1.19%          9929  hackbench  libuClibc-1.0.17.so   [.] __write_nocancel
                  |
                  ---__write_nocancel
                     |--8.95%--EV_Trap
                     |           --8.25%--sys_write
                     |                     |--3.93%--sock_write_iter
           ...
                     |--2.62%--memset   <==== [LEAF entry as no unwind info]
                               ^^^^^^
      
      After
      -----
      
          29.46%     1.24%         13622  hackbench  libuClibc-1.0.17.so   [.] __write_nocancel
                  |
                  ---__write_nocancel
                     |--9.31%--EV_Trap
                     |           --8.62%--sys_write
                     |                     |--4.17%--sock_write_iter
           ...
                     |--6.19%--sys_write
                     |           --6.19%--sock_write_iter
                     |                     unix_stream_sendmsg
                     |                     |--1.62%--sock_alloc_send_pskb
                     |                     |--0.89%--sock_def_readable
                     |                     |--0.88%--_raw_spin_unlock_irqrestore
                     |                     |--0.69%--memset
                     |                     |         ^^^^^^     <==== [now in proper callframe]
                     |                     |
                     |                      --0.52%--skb_copy_datagram_from_iter
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      86effd0d
    • V
      ARC: dw2 unwind: add infrastructure for adding cfi pseudo ops to asm · 5a205a32
      Vineet Gupta 提交于
      1. detect whether binutils supports the cfi pseudo ops
      2. define conditional macros to generate the ops
      3. define new ENTRY_CFI/END_CFI to annotate hand asm code.
         - Needed because we don't want to emit dwarf info in general ENTRY/END
           used by lowest level trap/exception/interrutp handlers as unwinder
           gets confused trying to unwind out of them. We want unwinder to
           instead stop when it hits onfo those routines
         - These provide minimal start/end cfi ops assuming routine doesn't
           touch stack memory/regs
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      5a205a32
    • V
      ARC: entry: make ret_from_system_call local label · 2dad1122
      Vineet Gupta 提交于
      This essentially removes ENTRY() assembler annotation for this symbol
      since it didn't have a pairing END()
      
      This in ahead of introducing cfi pseudo ops in ENTRY/END which expects
      paired cfi_startproc/cfi_endproc
      
      | ../arch/arc/kernel/entry.S: Assembler messages:
      | ../arch/arc/kernel/entry.S:270: Error: previous CFI entry not closed (missing .cfi_endproc)
      | ../scripts/Makefile.build:326: recipe for target 'arch/arc/kernel/entry-arcv2.o' failed
      | make[4]: *** [arch/arc/kernel/entry-arcv2.o] Error 1
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      2dad1122
    • V
      ARC: dw2 unwind: don't force dwarf 2 · 2d048642
      Vineet Gupta 提交于
      In .debug_frame based unwinding regime, we used to force -gdwarf-2 since
      kernel unwinder only claimed to handle dwarf 2. This changed since commit
      6d0d5060 ("ARC: dw2 unwind: Don't bail for CIE.version != 1")
      which added some support beyond dwarf 2, atleast to handle CIE != 1
      
      The ill-effect of -gdwarf-2 is that it forces generation of .debug_*
      sections, which bloats loadable modules .ko files. For the curious, this
      doesn't affect vmlinx binary since linker script discards .debug_* but
      same discard is not yet implemented for modules.
      
      So it seems we can drop the -gdwarf-2 toggle, which should not be needed
      anyways given that we now use .eh_frame based unwinding.
      
      I've verified using GNU 2016.09-engo10 that the actual unwind info is
      not different with or w/o this toggle - but the debug_* sections are
      gone for good.
      
      before
      -----
      arc-linux-readelf -S q_proc.ko-unwinding-1-eh_frame-switch | grep debug
        [15] .debug_info       PROGBITS        00000000 000300 00d08d 00 	0   0  1
        [16] .rela.debug_info  RELA            00000000 0162a0 008844 0c   I 29  15  4
        [17] .debug_abbrev     PROGBITS        00000000 00d38d 0005f8 00 	0   0  1
        [18] .debug_loc        PROGBITS        00000000 00d985 000070 00 	0   0  1
        [19] .rela.debug_loc   RELA            00000000 01eae4 0000c0 0c   I 29  18  4
        [20] .debug_aranges    PROGBITS        00000000 00d9f5 000040 00 	0   0  1
        [21] .rela.debug_arang RELA            00000000 01eba4 000030 0c   I 29  20  4
        [22] .debug_ranges     PROGBITS        00000000 00da35 000018 00 	0   0  1
        [23] .rela.debug_range RELA            00000000 01ebd4 000030 0c   I 29  22  4
        [24] .debug_line       PROGBITS        00000000 00da4d 000b5b 00 	0   0  1
        [25] .rela.debug_line  RELA            00000000 01ec04 0000cc 0c   I 29  24  4
        [26] .debug_str        PROGBITS        00000000 00e5a8 007831 01   MS 0   0  1
      
      after
      ----
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      2d048642
    • V
      ARC: dw2 unwind: switch to .eh_frame based unwinding · 6716dbbd
      Vineet Gupta 提交于
      So finally after almost 8 years of dealing with .debug_frame, we are
      finally switching to .eh_frame. The reason being stripped kernel
      binaries had non-functional unwinder as .debug_frame was gone.
      Also, in general .eh_frame seems more common way of doing unwinding.
      
      This also folds a revert of f52e126c ("ARC: unwind: ensure that
      .debug_frame is generated (vs. .eh_frame)") to ensure that we start
      getting .eh_frame
      Reported-by: NDaniel Mentz <danielmentz@google.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      6716dbbd
    • V
      ARC: dw2 unwind: factor CIE specifics for .eh_frame/.debug_frame · d040876b
      Vineet Gupta 提交于
      This paves way for switching to .eh_frame based unwindiing
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      d040876b
    • V
      ARC: module: support R_ARC_32_PCREL relocation · 94f4fb08
      Vineet Gupta 提交于
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      94f4fb08
    • A
      arc: perf: Enable generic "cache-references" and "cache-misses" events · e0d5321f
      Alexey Brodkin 提交于
      We used to live with PERF_COUNT_HW_CACHE_REFERENCES and
      PERF_COUNT_HW_CACHE_REFERENCES not specified on ARC.
      
      Those events are actually aliases to 2 cache events that we do support
      and so this change sets "cache-reference" and "cache-misses" events
      in the same way as "L1-dcache-loads" and L1-dcache-load-misses.
      
      And while at it adding debug info for cache events as well as doing a
      subtle fix in HW events debug info - config value is much better
      represented by hex so we may see not only event index but as well other
      control bits set (if they exist).
      Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-snps-arc@lists.infradead.org
      Cc: linux-kernel@vger.kernel.org
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      e0d5321f
    • N
      ARC: [plat-eznps] add missing atomic_fetch_xxx operations · ce0f4932
      Noam Camus 提交于
      Build brekeage since last changes to generic atomic operations.
      Added couple of missing macros which are now mandatory
      Signed-off-by: NNoam Camus <noamca@mellanox.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      ce0f4932
    • V
      ARCv2: Implement atomic64 based on LLOCKD/SCONDD instructions · ce636527
      Vineet Gupta 提交于
      ARCv2 ISA provides 64-bit exclusive load/stores so use them to implement
      the 64-bit atomics and elide the spinlock based generic 64-bit atomics
      
      boot tested with atomic64 self-test (and GOD bless the person who wrote
      them, I realized my inline assmebly is sloppy as hell)
      
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: linux-snps-arc@lists.infradead.org
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      ce636527
    • V
      ARCv2: Support dynamic peripheral address space in HS38 rel 3.0 cores · 26c01c49
      Vineet Gupta 提交于
      HS release 3.0 provides for even more flexibility in specifying the
      volatile address space for mapping peripherals.
      
      With HS 2.1 @start was made flexible / programmable - with HS 3.0 even
      @end can be setup (vs. fixed to 0xFFFF_FFFF before).
      
      So add code to reflect that and while at it remove an unused struct
      defintion
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      26c01c49
    • V
      ARCv2: identify HS38 rel 3.0 cores · f5076846
      Vineet Gupta 提交于
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      f5076846
    • V
      ARCv2: Add support for ZeBu Emulation platform for HS cores · 9efac679
      Vineet Gupta 提交于
      The cool thing is that same kernel image can run on
       - nsim OSCI simulation platform
       - SDPlite FPGA setups
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      9efac679
    • A
      arc: Add "model" properly in device tree description of all boards · 618a9cd0
      Alexey Brodkin 提交于
      As it was discussed quite some time ago (see
      https://lkml.org/lkml/2015/11/5/862) it's a good practice to add
      "model" property in .dts. Moreover as per ePAPR "model" property is
      required and should look like "manufacturer,model" so we do here.
      Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Jonas Gorski <jonas.gorski@gmail.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Rob Herring <robh@kernel.org>
      Cc: Christian Ruppert <christian.ruppert@alitech.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      618a9cd0
  7. 30 9月, 2016 7 次提交