- 17 9月, 2015 2 次提交
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由 Jyri Sarha 提交于
The slot_width is for essentially same thing. Instead of storing bclk_lrclk_ratio, just store the slot_width. Comments has been updated accordingly and some variable names changed to more descriptive. Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Jyri Sarha 提交于
Implements set_tdm_slot() callback for mcasp. Channel constraints are updated according to the configured tdm mask and slots each time set_tdm_slot() is called. The special case when slot width is set to zero is allowed and it means that slot width is the same as the sample width. Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 8月, 2015 1 次提交
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由 Axel Lin 提交于
Use devm_ioremap_resource() instead of open code. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 10 6月, 2015 1 次提交
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由 Jyri Sarha 提交于
Find the configured DMA controller by asking for a DMA channel in the probe phase and releasing it right after. The controller device can be found via the dma_chan struct and the controller is recognized from the compatible property of its device node. The patch assumes EDMA if there is no device node. Signed-off-by: NJyri Sarha <jsarha@ti.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 09 6月, 2015 1 次提交
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由 Misael Lopez Cruz 提交于
The default state when serializers are in inactive slots is Hi-Z. In some cases, there are no additional components driving the data lines to a safe state so they might have noise. While in inactive slots, the McASP AXR pins configured as outputs can be driven low through the serializer pin drive mode setting (DISMOD) to prevent such noise. Signed-off-by: NMisael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 01 5月, 2015 4 次提交
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由 Peter Ujfalusi 提交于
pm_runtime_enabled() will only tell if the pm runtime has been enabled for the device, which is done at probe time but will not tell the actual power state of the device. pm_runtime_active() provides this information. This patch fixes a kernel crash when doing suspend when McASP is not active. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Jyri Sarha 提交于
There is no need to copy the list of all supported sample-rates. Finding the supported endpoints within the current range is enough (see snd_interval_list()). Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Jyri Sarha 提交于
Set channel count constraints for multiple serializers case. On McASP the active channels mask is the same for all the serializers. With the current implementation this means that if more than one serializers is used, all TDM slots have to be active on all serializers. The patch sets the channel count constraints according to number of RX and TX serializers. Reported-by: NMisael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Jyri Sarha 提交于
The McASP driver currently always sends as many slots or channels to a i2s-wire as there are configured tdm_slots (see mcasp_i2s_hw_param()). Thus the BLCK rate does not depend on the amount of channels, just the configure amount of tdm-slots. Reported-by: NMisael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 07 4月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Passing &mcasp->ruledata[dir] to snd_pcm_hw_rule_add() is not correct since commit: 7b3d165a ASoC: davinci-mcasp: Index ruledata in drvdata with substream->stream now sets up the struct based on the substream->stream (0 or 1) while we pass a pointer which we take with dir (1 or 2). This will lead kernel crash. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 02 4月, 2015 1 次提交
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由 Jyri Sarha 提交于
The serializer direction definitions runs from 1 to 2, which does not suite the purpose. The substream->stream is perfect for the purpose and should have been used from the beginning. Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 3月, 2015 1 次提交
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由 Jyri Sarha 提交于
Set rule constraints to allow only combinations of sample-rate, sample-format, and channels counts that can be played/captured with reasonable sample-rate accuracy. The logic with tdm-slots and serializers (=i2s data wires) goes like this: The first wire will take all channels up to number of tdm-slots, before following wires (if any) are used. If the first wire is used fully, the remaining wires share the same clocks and the divider can be calculated for the first wire. Also, takes the number of tdm-slots into account when implicitly selecting the BLCK divider. Signed-off-by: NJyri Sarha <jsarha@ti.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 06 3月, 2015 2 次提交
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由 Peter Ujfalusi 提交于
Introduced by commit: 6afda7f5 ASoC: davinci-mcasp: Allow complete shutdown of McASP when not in use I'm really sorry for this... Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
Rearrange the pm_runtime_get/put_sync calls so the IP will be turned off when it is not in use. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 05 3月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
The edma-pcm performs as good as the old davinci-pcm and it's use does not require the 'ping-pong' mode of davinci-pcm, which was introduced to overcome under/over flow issues when using davinci-pcm. Keep the SND_DAVINCI_SOC config option to select the SND_EDMA_SOC to avoid regression in audio support. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 14 2月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Support for setups where codec is bitclock slave and frame master. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 03 2月, 2015 2 次提交
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由 Peter Ujfalusi 提交于
One of the McASP instances in DM646x line of DMSoC only supports DIT mode. This means that the given IP does not have support for rx and all the rx related resources are missing, like irq and DMA request. The driver should not fail if any or all of the RX resource is missing when the op_mode is set to DIT mode. Since RX is not possible in DIT mode, we can just ignore the rx resources when the McASP is used in DIT mode. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
On DA830 devices McASP0,1 and 2 shares a single combined interrupt request line. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 31 12月, 2014 1 次提交
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由 Peter Ujfalusi 提交于
Some SoC, like da850/OMAP-L138 uses one common interrupt request for TX/RX events. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 12 11月, 2014 1 次提交
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由 Misael Lopez Cruz 提交于
An underrun (playback) event occurs when the serializer transfer data from the XRBUF buffer to the XRSR shift register, but the XRBUF hasn't been filled. Similarly, the overrun (capture) event occurs when data from the XRSR shift register is transferred to the XRBUF but it hasn't been read yet. These events are handled as XRUN events that cause the pcm to stop. The stream has to be explicitly restarted by the userspace which ensures that after stopping/starting McASP the data transfer is aligned with DMA. The other possibility was to internally stop and start McASP without DMA even knowing about it. Signed-off-by: NMisael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 10 11月, 2014 6 次提交
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由 Misael Lopez Cruz 提交于
Active slots count depends on the number of channels in the stream and the number of active serializers. Each serializer will handle at most the number of channels specified via 'tdm-slots' parameter in DT. There are two possible scenarios: - Single serializer: channel count fits in the max slots supported by McASP serializers, active slots is same as channel count - Multiple serializers: channel count is bigger than max slots supported by a serializer. Channel count determines how many serializers are needed at their max slot count configuration Signed-off-by: NMisael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
In IIS (I2S, TDM, etc) mode the maximum number of allowed channels for either direction can be: number of serializers for the direction * tdm_slots. This constraint applicable for the first stream, while consequent stream should not have more channels then the first stream. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
Instead of validating the tdm_slots parameter every time at hw_params we can do it once during probe. If the parameter is not valid (<2 or >32) print an error and fix it up. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
When the bus is configured to have more BCLK then the data type demands we need to use the rotation to move the data to correct place. Reported-by: NMisael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
In IIS mode the tx and rx configuration is symmetric, the BCLK and FSYNC is shared. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Anil Kumar 提交于
If probe fails then we need to call pm_runtime_disable() to balance out the previous pm_runtime_enable() call. Signed-off-by: NAnil Kumar <anilk4.v@gmail.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 29 10月, 2014 4 次提交
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由 Peter Ujfalusi 提交于
In this way the start code for tx/rx going to be located at the same place. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
The AFIFO should not be stopped (or started for that matter) when McASP is running since it can cause unpredictable issues because we are switching off AFIFO for the direction which was handling the requests from McASP and was generating DMA request toward the system DMA. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
Follow the sequence described in the TRMs when starting RX. Write to RXBUF register was not correct and there is no need to release the RX state machine/Receive frame sync generator twice. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
Follow the sequence described in the TRMs when starting TX. This sequence will make sure that we are not facing with initial channel swap caused by no data available in McASP for transmit. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 20 10月, 2014 1 次提交
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由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 02 10月, 2014 2 次提交
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由 Peter Ujfalusi 提交于
If the board is sent to suspend (deep sleep) the McASP context will be lost. In case when suspend happens during active audio we need to save and restore more registers, which was configured during hw_param times as well. We need to add more config registers, AFIFO control registers and we also need to save and restore the serializer configuration as well. Since the number of serializers depends on the SoC we need to allocate the memory for it based on the num_serializer for the given McASP instance. With this patch the ongoing stream will resume after resuming from deep sleep. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Peter Ujfalusi 提交于
Instead of individual values use an array to store the registers need to be saved on suspend and restored on resume. It is going to be easier to add more registers to save and restore. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 04 9月, 2014 1 次提交
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由 Peter Ujfalusi 提交于
In case of capture we should not use rotation. The reverse and mask is enough to get the data align correctly from the bus to MCU: Format data from bus after reverse (XRBUF) S16_LE: |LSB|MSB|xxx|xxx| |xxx|xxx|MSB|LSB| S24_3LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB| S24_LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB| S32_LE: |LSB|DAT|DAT|MSB| |MSB|DAT|DAT|LSB| With this patch all supported formats will work for playback and capture. Reported-by: Jyri Sarha <jsarha@ti.com> (broken S24_3LE capture) Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 13 8月, 2014 1 次提交
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由 Jyri Sarha 提交于
The implicit BLCK divider setting was broken by "ASoC: mcasp: don't override bclk divider if it was provided by the machine"-patch. After the BCLK divider is implicitly set for the first time the mcasp->bclk_div gets a non zero value and the implicit setting is "turned off". Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 17 7月, 2014 2 次提交
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由 Daniel Mack 提交于
If a machine driver provides an BCLK divider to the McASP driver, skip the automatic calculation. This fixes machines on which the physical sample transport always works in 32 bits, even though not all of them are actually used. snd_soc_params_to_bclk() will fail to address such cases properly. Signed-off-by: NDaniel Mack <zonque@gmail.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Peter Ujfalusi 提交于
Use the edma-pcm with AM335x and AM437x SoCs. Keep using the davinci-pcm for daVinci devices, they can be switched to use the dmaengine based driver later when they are verified to work correctly. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NDaniel Mack <daniel@zonque.org> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 30 6月, 2014 1 次提交
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由 Peter Ujfalusi 提交于
In case of S24_LE/U24_LE modes we expect 24bits on the bus while the samples are stored and transferred in memory on 32bits (lower 3 bytes of the 4 bytes). Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NDaniel Mack <daniel@zonque.org> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 21 6月, 2014 2 次提交
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由 Jyri Sarha 提交于
Do not fail if the exact BLCK rate can not be produced, just print a warning. Check that sysclk frequency is set before implicitly setting the BCLK divider. Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Jyri Sarha 提交于
Fixes build with SND_DAVINCI_SOC or SND_OMAP_SOC alone and adds build dependecy to SND_DAVINCI_SOC or SND_OMAP_SOC. Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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