The ts72xx platform has been updated to use the generic platform nand
driver (plat_nand.c).  This removes the now-defunct ts7250.c nand driver.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Matthieu Crapet <mcrapet@gmail.com>
Cc: Jesse Off <joff@embeddedARM.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

MTD_NAND_PXA3xx module is shared between ARCH_PXA and ARCH_MMP. Update
this configuration according to it.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Additionally, some excessive newlines removed.
Signed-off-by: NMichael Roth <mroth@nessie.de>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Signed-off-by: NLeo Hao Chen <leochen@broadcom.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds DMA mode support for nand prefetch/post-write engine.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds prefetch support to access nand flash in mpu mode.
This patch also adds 8-bit nand support (omap_read/write_buf8).
Prefetch can be used for both 8- and 16-bit devices.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add w90p910 NAND driver for w90p910 evaluation board
based on w90p910,there is a K8F1G08 NAND on my board.

[dwmw2: depend on MTD_PARTITIONS]
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

.ko is normally not included in Kconfig help, make it consistent.
Signed-off-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Add s3c6400 support to the s3c2410 driver. The nand controller in
the s3c64xx devices is compatible with the one in the s3c2412, so
simply reuse that code.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Acked-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This driver is present in the OMAP tree, now pushing it to MTD.

Original author(s):
       Jian Zhang <jzhang@ti.com>
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Cc: Jian Zhang <jzhang@ti.com>
Cc: Artem Bityutskiy <dedekind@infradead.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NIlya Yanok <yanok@emcraft.com>
Acked-by: NWolfgang Grandegger <wg@grandegger.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds support for the integrated NAND flash controller of the
TXx9 family.

Once upon a time there were tx4925ndfmc and tx4938ndfmc driver.  They
were removed due to bitrot in 2005.
This new driver is completely rewritten based on a driver in CELF patch
archive.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: Ralf Bächle <ralf@linux-mips.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This is a device driver for the NAND flash controller found on the various
DaVinci family chips.  It handles up to four SoC chipselects, and some
flavors of secondary chipselect (e.g.  based on upper bits of the address
bus) as used with some multichip packages.  (Including the 2 GiB chips
used on some TI devel boards.)

The 1-bit ECC hardware is supported (3 bytes ECC per 512 bytes data); but
not yet the newer 4-bit ECC (10 bytes ECC per 512 bytes data), as
available on chips like the DM355 or OMAP-L137 and needed with the more
error-prone MLC NAND chips.

This is a cleaned-up version of code that's been in use for several years
now; sanity checked with the new drivers/mtd/tests.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

X86_PC is the only remaining 'sub' architecture, so we dont need
it anymore.

This also cleans up a few spurious references to X86_PC in the
driver space - those certainly should be X86.
Signed-off-by: NYinghai Lu <yinghai@kernel.org>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

X86_GENERICARCH is a misnomer - it contains non-PC 32-bit architectures
that are not included in the default build.

Rename it to X86_32_NON_STANDARD.
Signed-off-by: NIngo Molnar <mingo@elte.hu>

The current ndfc driver only compiles under arch/ppc. This arch was
removed from the kernel. I notice the event entry for the ndfc in
Kconfig has been removed in 2.6.28.

This patch converts the ndfc to a proper OF (OpenFirmware) driver. I
can give a working example of the DTS if needed.

The patch has been in production use on the PIKA Warp Appliance and is
in use by others. The Warp basically boots from NAND, so the ndfc driver
is very important to us.
Signed-off-by: NSean MacLennan <smaclennan@pikatech.com>
Acked-By: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Not all architectures provide readsb(). We should probably move to using
ioread8_rep() instead.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The patch adds support for NAND flashes connected to GPIOs.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash.
This driver support SH7723.
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Removed the Kconfig associated with 'NDFC NanD Flash Controller'.
We can't enable !CONFIG_PPC_MERGE so there is no way to enable
this.  Additionally the code needs to get updated for arch/powerpc.

For the time being lets just remove the Kconfig option so we can
actually remove CONFIG_PPC_MERGE.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch extends the FSL UPM NAND driver from Anton Vorontsov to
support hardware which does not have the R/B pin of the NAND chip
connected, like the TQM8548 module:

- The OF_GPIO dependency has been removed from the Kconfig option
  because GPIO is not needed. The relevant gpio_* function are then
  stubbed out in <linux/gpio.h>.

- It re-introduces the chip-delay property to define an appropriate
  maximum delay time (tR) required for read operations. The binding
  will be documented in a separate patch.
Signed-off-by: NWolfgang Grandegger <wg@grandegger.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds support for the integrated NAND flash controller of the
i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3
aswell.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which
allows to disable usage of builtin flash-type table.  Not enabling this
option saves some space in the generated driver.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The TMIO chips are only found (and thus tested) on ARM machines.
Moreover, we don't want the TMIO cells to be built if one of the TMIO
driver is not selected (which indirectly make the TMIO cells drivers
depend on ARM as well).
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

This patch adds support for the NAND controller commonly found in
TMIO based MFDs.
Signed-off-by: NIan Molton <spyro@f2s.com>
Acked-By: NDavid Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

This was a reference board for which support never got merged upstream.
Kill it off, at rmk's suggestion.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

There's no reason to prevent the Atmel NAND driver from
building as a module.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: NAndrew Victor <linux@maxim.org.za>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Make the atmel_nand driver selectable on AVR32, and update the Kconfig
help text to reflect this.
Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

The AT91 NAND driver needs just a few tiny modifications to work on
AVR32 as well. Rename it atmel_nand to reflect this.

Also move the ECC register definitions into drivers/mtd/nand since they
are only useful to the atmel_nand driver, and get rid of the useless
filename at the top of each file.
Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Once upon a time, the MTD repository was using CVS.

This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.

This also includes code that printed them to the user.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This is a patch to use the hardware ECC controller of
the AT91SAM9260 and AT91SAM9263 for the AT91 nand.
On AT91 NAND, there's now a choice between ECC soft,
ECC hard or no ECC (for debug).

It has been tested on AT91SAM9263 with 8 bits large
and small page NAND.
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This is very simple driver, NAND is connected through localbus,
and User-Programmable Machine is doing various adjustments to
speak NAND. No special efforts needed to do read and write cycles,
though to control ALE and CLE phases, we ask UPM to generate exact
pre-programmed signals on the localbus lines.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This is preliminary since:

1. It supports only _one_ chip select at the moment. As there is no
   existing platforms available using two chip selects of the NAND
   controller, it shall really not include code for supporting the
   2nd chip select for now, as such code cannot be verified.

2. It resorts to the default and simpliest memory based badblock
   table

3. Only limited types of nand flash are currently supported. Most
   PXA3xx processors come with on-chip NAND flash dies, so there
   isn't much flexibility for other types of NAND.

4. The NAND controller should be configured to detect the device's
   ID, thus making it difficult to use nand_scan_ident() to assist
   the detection process (though it's not impossible)

TODO: fix all the above limitations of cuz :-)
Signed-off-by: Neric miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Reviewed-by: NTzachi Perelstein <tzachi@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NNicolas Pitre <nico@marvell.com>