The EthernetAVB should not depend on the bootloader to setup correct
drive-strength values.  Values for drive-strength where found by
examining the registers after the bootloader has configured the
registers and successfully used the EthernetAVB.

Based on:
* commit 7d73a4da ("arm64: dts: r8a7795: salvator-x: Set drive-strength
  for ravb pins")
* commit 4903987033be ("arm64: dts: r8a7796: salvator-x: Set drive-strength
  for ravb pins")

Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>

Enable the HDMI encoders for the H3 Salvator-X board. The number of
encoders varies between the H3 and M3-W SoCs, so they can't be enabled
in the common salvator-x.dtsi file.
Signed-off-by: NKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The DU1 and DU2 external dot clocks are provided by the fixed frequency
clock generators X21 and X22, while the DU0 and DU3 clocks are provided
by the programmable Versaclock5 clock generator.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The Salvator-X board has two HDMI output connectors. Add them to the
common salvator-x.dtsi.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The DU1 and DU2 external dot clocks are fixed frequency clock generators
running at 33MHz, while the DU0 and DU3 external dot clocks are
generated by an I2C-controlled programmable clock generator.

All those clock generators are available on both the H3 and M3-W
Salvator-X boards. Add them to the salvator-x.dtsi file.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add DT nodes for the two HDMI encoders in disabled state.

Based on work by Koji Matsuoka.
Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The panel backlight is controlled through a GPIO and a PWM channel.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[simon: apply to salvator-x.dtsi instead of r8a7795-salvator-x.dts]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds PWM{0,1,2,3,4,5,6} device nodes for R8A7796 SoC.
Signed-off-by: NTakeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: added resets, shortened reg lengths to 8]
Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add device nodes for two Maxim max961x current sense amplifiers
sensing VDD_08 and DVFS_08 lines.
Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org>
[geert: r8a7796-salvator-x.dts => salvator-x.dtsi]
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The Renesas ULCB development board can be equipped with either an R-Car
H3 or M3-W SiP, which are pin-compatible.  Both boards use different
DTBs.

Reduce duplication by extracting common ULCB board support into its own
.dtsi file.  References to SoC-specific clocks are handled through cpp
definitions.  Sort device nodes while at it.

For H3ULCB, there are no functional changes.

For M3ULCB, the following new devices are now described in DT:
  - External audio, CAN, and PCIe clocks,
  - CS2000 clock generator,
  - AK4613 Audio Codec.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The Renesas Salvator-X development board can be equipped with either an
R-Car H3 or M3-W SiP, which are pin-compatible.  Both boards use
different DTBs.

Reduce duplication by extracting common Salvator-X board support into
its own .dtsi file.  References to SoC-specific clocks are handled
through cpp definitions.  Sort device nodes while at it.

For boards with an R-Car H3 SiP, there are no functional changes.

For boards with an R-Car M3-W SiP, the following new devices are now
described in DT:
  - External audio, CAN, and PCIe clocks,
  - USB Vbus regulator,
  - CS2000 clock generator,
  - AK4613 Audio Codec,
  - VGA.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add empty device nodes serving as placeholders for devices that are not
yet supported and/or tested on R-Car M3-W, but are supported and used on
Salvator-X or H3ULCB boards equipped with an R-Car H3 SoC.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the external PCIe bus clock as a zero Hz fixed-frequency clock.
Boards that provide this clock should override it.

Based on r8a7795.dtsi.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the external audio clocks as zero Hz fixed-frequency clocks.
Boards that provide these clocks should override them.

Based on commit 623197b9 ("arm64: renesas: r8a7795: Sound SSI
PIO support").
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.

My analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e6060000.pfc and pfc@e6060000 to
e6060000.pin-controller and pin-controller@e6060000.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>

The EthernetAVB should not depend on the bootloader to setup correct
drive-strength values.  Values for drive-strength where found by
examining the registers after the bootloader has configured the
registers and successfully used the EthernetAVB.

Based on commit 7d73a4da ("arm64: dts: r8a7795: salvator-x: Set
drive-strength for ravb pins").
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Cfr. commit b2407c56 ("arm64: dts: r8a7795: enable nfs root on
Salvator-X board").
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Set PHY rxc-skew-ps to 1500 and all other values to their default values.

This is intended to to address failures in the case of 1Gbps communication
using the salvator-x board with the KSZ9031RNX phy. This has been
reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.

Based in a similar patch for the r8a7796 salvator-x by Kazuya Mizuguchi.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This supports HS200 mode for eMMC on H3ULCB board
Signed-off-by: NVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This supports HS200 mode for eMMC on M3ULCB board
Signed-off-by: NVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch addes memory region:

  - After changes, the Salvator-X board has the following map:
    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
    Bank1: 1GiB RAM : 0x000500000000 -> 0x0053fffffff
    Bank2: 1GiB RAM : 0x000600000000 -> 0x0063fffffff
    Bank3: 1GiB RAM : 0x000700000000 -> 0x0073fffffff

  - Before changes, the old map looked like this:
    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
Signed-off-by: NTakeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This supports Ethernet AVB on M3ULCB board
Signed-off-by: NVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Tested-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch updates memory region:

  - After changes, the new map of the m3ulcb board on R8A7796 SoC
    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
    Bank1: 1GiB RAM : 0x000600000000 -> 0x0063fffffff

  - Before changes, the old map looked like this:
    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
Signed-off-by: NVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Tested-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This supports I2C2 bus on M3ULCB board
Signed-off-by: NVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

SC9860G is a 8 cores of A53 SoC with 4G LTE support SoC from Spreadtrum.

According to regular hierarchy of sprd dts, whale2.dtsi contains SoC
peripherals IP nodes, sc9860.dtsi contains stuff related to ARM core stuff
and sp9860g dts is for the board level.
Signed-off-by: NOrson Zhai <orson.zhai@spreadtrum.com>
Signed-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com>
Reviewed-by: NMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add fixed clock of 400MHz to system controller driver.  This clock is
used as SD/eMMC clock source.
Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com>
Reviewed-by: NOmri Itach <omrii@marvell.com>
Reviewed-by: NHanna Hawa <hannah@marvell.com>
[fixed up conflicts, added error handling --rmk]
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property

Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Reported-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reported-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NRob Herring <robh@kernel.org>
[k.kozlowski: Split patch per ARM and ARM64]
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>

Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property

Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Reported-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reported-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NRob Herring <robh@kernel.org>
[k.kozlowski: Split patch per ARM and ARM64]
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>

This patch adds the panel device tree node for s6e3hf2 display
controller to TM2e dts.
Signed-off-by: NHoegeun Kwon <hoegeun.kwon@samsung.com>
Reviewed-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>

Commit a8d4636f ("arm64: cacheinfo: Remove CCSIDR-based cache
information probing") removed mechanism to extract cache information
based on CCSIDR register as the architecture explicitly states no
inference about the actual sizes of caches based on CCSIDR registers.

Commit 9a802431 ("arm64: cacheinfo: add support to override cache
levels via device tree") had already provided options to override cache
information from the device tree.

This patch adds the information about L1 and L2 caches on all variants
of Juno platform.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>

This patch fixes the following set of warnings on juno.

 smb@08000000 unit name should not have leading 0s
 sysctl@020000 simple-bus unit address format error, expected "20000"
 apbregs@010000 simple-bus unit address format error, expected "10000"
 mmci@050000 simple-bus unit address format error, expected "50000"
 kmi@060000 simple-bus unit address format error, expected "60000"
 kmi@070000 simple-bus unit address format error, expected "70000"
 wdt@0f0000 simple-bus unit address format error, expected "f0000"
Acked-by: NLiviu Dudau <liviu.dudau@arm.com>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>